TO -92 MAC97A8 4Q Triac 1 May 2015 Product data sheet 1. General description Planar passivated very sensitive gate four quadrant triac in a SOT54 plastic package intended to be interfaced directly to microcontrollers, logic integrated circuits and other low power gate trigger circuits. 2. Features and benefits * * * * * * Direct interfacing to logic level ICs Direct interfacing to low power gate drivers and microcontrollers High blocking voltage capability Planar passivated for voltage ruggedness and reliability Triggering in all four quadrants Very sensitive gate 3. Applications * * * General purpose low power phase control General purpose low power switching Solid-state relay 4. Quick reference data Table 1. Quick reference data Symbol Parameter VDRM Conditions Min Typ Max Unit repetitive peak offstate voltage - - 600 V ITSM non-repetitive peak on- full sine wave; Tj(init) = 25 C; state current tp = 20 ms; Fig. 4; Fig. 5 - - 8 A IT(RMS) RMS on-state current - - 0.6 A - 1 5 mA - 2 5 mA - 2 5 mA full sine wave; Tlead 50 C; Fig. 1; Fig. 2; Fig. 3 Static characteristics IGT gate trigger current VD = 12 V; IT = 0.1 A; T2+ G+; Tj = 25 C; Fig. 7 VD = 12 V; IT = 0.1 A; T2+ G-; Tj = 25 C; Fig. 7 VD = 12 V; IT = 0.1 A; T2- G-; Tj = 25 C; Fig. 7 Scan or click this QR code to view the latest information for this product MAC97A8 NXP Semiconductors 4Q Triac Symbol Parameter Conditions Min Typ Max Unit VD = 12 V; IT = 0.1 A; T2- G+; - 4 7 mA Tj = 25 C; Fig. 7 5. Pinning information Table 2. Pinning information Pin Symbol Description 1 T2 main terminal 2 2 G gate 3 T1 main terminal 1 Simplified outline Graphic symbol T2 sym051 T1 G 321 TO-92 (SOT54) 6. Ordering information Table 3. Ordering information Type number Package Name Description Version MAC97A8 TO-92 plastic single-ended leaded (through hole) package; 3 leads SOT54 MAC97A8/DG TO-92 plastic single-ended leaded (through hole) package; 3 leads SOT54 MAC97A8 Product data sheet All information provided in this document is subject to legal disclaimers. 1 May 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved 2 / 12 MAC97A8 NXP Semiconductors 4Q Triac 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions VDRM repetitive peak off-state voltage IT(RMS) RMS on-state current full sine wave; Tlead 50 C; Fig. 1; Min Max Unit - 600 V - 0.6 A - 8 A - 8.8 A Fig. 2; Fig. 3 ITSM non-repetitive peak on-state current full sine wave; Tj(init) = 25 C; tp = 20 ms; Fig. 4; Fig. 5 full sine wave; Tj(init) = 25 C; tp = 16.7 ms I t I2t for fusing tp = 10 ms; SIN - 0.32 A s dIT/dt rate of rise of on-state current IG = 10 mA; T2+ G+ - 50 A/s IG = 10 mA; T2+ G- - 50 A/s IG = 14 mA; T2- G+ - 10 A/s IG = 10 mA; T2- G- - 50 A/s t = 2 microsecs (max) - 1 A - 5 W - 0.1 W 2 2 IGM peak gate current PGM peak gate power PG(AV) average gate power Tstg storage temperature -40 150 C Tj junction temperature - 125 C over any 20 ms period; T(lead) 80 C; t = 2 microseconds (max) 003aaa041 3 aaa-009816 0.8 IT(RMS) (A) IT(RMS) (A) 0.6 2 0.4 1 0.2 0 10-3 Fig. 1. 10-2 1 tsurge (S) RMS on-state current as a function of surge duration; maximum values MAC97A8 Product data sheet 0 10 Fig. 2. 0 100 Tlead (C) 150 RMS on-state current as a function of lead temperature; maximum values All information provided in this document is subject to legal disclaimers. 1 May 2015 50 (c) NXP Semiconductors N.V. 2015. All rights reserved 3 / 12 MAC97A8 NXP Semiconductors 4Q Triac 003aaa036 1.2 Ptot (W) 0.8 conduction angle, (degrees) form factor a 30 60 90 120 180 2.816 1.967 1.570 1.329 1.110 003aaa038 10 ITSM (A) = 180 8 120 90 6 60 30 4 0.4 2 0 0 0 0.2 0.4 0.8 0.6 IT(RMS) (A) 10 102 n 103 f = 50 Hz = conduction angle a = form factor = IT(RMS) / IT(AV) Fig. 3. 1 Fig. 4. Total power dissipation as a function of RMS on-state current; maximum values Non-repetitive peak on-state current as a function of the number of sinusoidal current cycles; maximum values 003aaa040 103 ITSM IT ITSM (A) t Tp 102 dlT/dt limit T2- G+ quadrant 10 1 10-5 10-4 10-3 10-2 tp (s) 10-1 tp 20 ms Fig. 5. Non-repetitive peak on-state current as a function of pulse width; maximum values MAC97A8 Product data sheet All information provided in this document is subject to legal disclaimers. 1 May 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved 4 / 12 MAC97A8 NXP Semiconductors 4Q Triac 8. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-lead) thermal resistance from junction to lead full cycle; Fig. 6 - - 60 K/W half cycle - - 80 K/W thermal resistance from junction to ambient printed circuit board mounted: lead length = 4 mm - 150 - K/W Rth(j-a) 003aaa029 103 Zth(j-a) (K/W) 102 10 P tp 1 10-5 Fig. 6. 10-4 10-3 10-2 10-1 1 tp (s) t 10 Transient thermal impedance from junction to ambient as a function of pulse width MAC97A8 Product data sheet All information provided in this document is subject to legal disclaimers. 1 May 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved 5 / 12 MAC97A8 NXP Semiconductors 4Q Triac 9. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit VD = 12 V; IT = 0.1 A; T2+ G+; - 1 5 mA - 2 5 mA - 2 5 mA - 4 7 mA - 1 10 mA - 5 10 mA - 1 10 mA - 2 10 mA Static characteristics IGT gate trigger current Tj = 25 C; Fig. 7 VD = 12 V; IT = 0.1 A; T2+ G-; Tj = 25 C; Fig. 7 VD = 12 V; IT = 0.1 A; T2- G-; Tj = 25 C; Fig. 7 VD = 12 V; IT = 0.1 A; T2- G+; Tj = 25 C; Fig. 7 IL latching current VD = 12 V; IG = 0.1 A; T2+ G+; Tj = 25 C; Fig. 8 VD = 12 V; IG = 0.1 A; T2+ G-; Tj = 25 C; Fig. 8 VD = 12 V; IG = 0.1 A; T2- G-; Tj = 25 C; Fig. 8 VD = 12 V; IG = 0.1 A; T2- G+; Tj = 25 C; Fig. 8 IH holding current VD = 12 V; Tj = 25 C; Fig. 9 - 1 10 mA VT on-state voltage IT = 0.85 A; Tj = 25 C; Fig. 10 - 1.4 1.9 V VGT gate trigger voltage VD = 12 V; IT = 0.1 A; Tj = 25 C; - 0.9 1.5 V 0.1 0.7 - V VD = 600 V; Tj = 110 C - 3 100 A VDM = 402 V; Tj = 110 C; (VDM = 67% 30 45 - V/s - 5 - V/s - 2 - s Fig. 11 VD = 400 V; IT = 0.1 A; Tj = 110 C; Fig. 11 ID off-state current Dynamic characteristics dVD/dt rate of rise of off-state voltage of VDRM); exponential waveform; gate open circuit; Fig. 12 dVcom/dt tgt rate of change of commutating voltage VD = 600 V; Tj = 50 C; dIcom/dt = 0.3 A/ ms; IT = 0.84 A; gate open circuit gate-controlled turn-on ITM = 1 A; VD = 600 V; IG = 25 mA; dIG/ time dt = 5 A/s MAC97A8 Product data sheet All information provided in this document is subject to legal disclaimers. 1 May 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved 6 / 12 MAC97A8 NXP Semiconductors 4Q Triac 003aaa030 3 IL IL(25C) IGT IGT(25C) (1) (2) 2 003aaa031 3 2 (3) (4) (1) (2) (3) 1 0 -60 1 (4) -10 40 90 Tj (C) 0 -60 140 (1) T2- G+ (2) T2- G(3) T2+ G(4) T2+ G+ Fig. 7. Fig. 8. -10 40 90 140 Normalized latching current as a function of junction temperature Normalized gate trigger current as a function of junction temperature 003aaa032 2.0 003aaa033 1.6 IH IH(25C) IT (A) 1.5 1.2 1.0 0.8 (1) 0 -60 (2) (3) 0.4 0.5 Fig. 9. Tj (C) -10 40 90 Tj (C) 0 140 0 0.8 1.6 VT (V) 2.4 Vo = 1.45 V; Rs = 0.1875 Normalized holding current as a function of junction temperature (1) Tj = 125 C; typical values (2) Tj = 125 C; maximum values (3) Tj = 25 C; maximum values Fig. 10. On-state current as a function of on-state voltage MAC97A8 Product data sheet All information provided in this document is subject to legal disclaimers. 1 May 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved 7 / 12 MAC97A8 NXP Semiconductors 4Q Triac 003aaa039 1.6 VGT VGT(25C) 1.2 0.8 0.4 0 -60 -10 40 90 Tj (C) 140 Fig. 11. Normalized gate trigger voltage as a function of junction temperature 003aaa034 103 dVD/dt (V/s) 102 10 1 0 25 50 75 100 Tj (C) 125 Fig. 12. Critical rate of rise of off-state voltage as a function of junction temperature; typical values MAC97A8 Product data sheet All information provided in this document is subject to legal disclaimers. 1 May 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved 8 / 12 MAC97A8 NXP Semiconductors 4Q Triac 10. Package outline Plastic single-ended leaded (through hole) package; 3 leads SOT54 c E d A L b 1 e1 2 D e 3 b1 L1 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A b b1 c D d E e e1 L L1(1) mm 5.2 5.0 0.48 0.40 0.66 0.55 0.45 0.38 4.8 4.4 1.7 1.4 4.2 3.6 2.54 1.27 14.5 12.7 2.5 max. Note 1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities. OUTLINE VERSION SOT54 REFERENCES IEC JEDEC JEITA TO-92 SC-43A EUROPEAN PROJECTION ISSUE DATE 04-06-28 04-11-16 Fig. 13. Package outline TO-92 (SOT54) MAC97A8 Product data sheet All information provided in this document is subject to legal disclaimers. 1 May 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved 9 / 12 MAC97A8 NXP Semiconductors 4Q Triac In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 11. 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Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Limiting values .......................................................3 8 Thermal characteristics .........................................5 9 Characteristics ....................................................... 6 10 Package outline ..................................................... 9 11 11.1 11.2 11.3 11.4 Legal information .................................................10 Data sheet status ............................................... 10 Definitions ...........................................................10 Disclaimers .........................................................10 Trademarks ........................................................ 11 (c) NXP Semiconductors N.V. 2015. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 1 May 2015 MAC97A8 Product data sheet All information provided in this document is subject to legal disclaimers. 1 May 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved 12 / 12 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: NXP: MAC97A8/DG,116 MAC97A8,412 MAC97A8,116 MAC97A8/DG,412