NC7SZ175P6X - ON SEMICONDUCTOR

June, 2019 − Rev. 3

1Publication Order Number:

NC7SZ175/D

NC7SZ175

TinyLogic UHS D-Type

Flip-Flop with

Asynchronous Clear

Description

The NC7SZ175 is a single positive edge−triggered D−type CMOS

Flip−Flop with Asynchronous Clear from ON Semiconductor’s Ultra

High Speed Series of TinyLogic in the space saving SC70 6−lead

package. The device is fabricated with advanced CMOS technology to

achieve ultra high speed with high output drive while maintaining low

static power dissipation over a very broad VCC operating range. The

device is specified to operate over the 1.65 V to 5.5 V VCC range. The

inputs and output are high impedance when VCC is 0 V. Inputs tolerate

voltages up to 5.5 V independent of VCC operating voltage. This

single flip−flop will store the state of the D input that meets the setup

and hold time requirements on the LOW−to−HIGH Clock (CP)

transition. A LOW input to Clear sets the Q output to LOW level. The

Clear input is independent of clock.

Features

•Space Saving SC70 6−Lead Package

•Ultra Small MicroPak™ Leadless Package

•Ultra High Speed: tPD 2.6 ns Typ into 50 pF at 5 V VCC

•High Output Drive: ±24 mA at 3 V VCC

•Broad VCC Operating Range: 1.65 V to 5.5 V

•Matches the Performance of LCX when Operated at 3.3 V VCC

•Power Down High Impedance Inputs / Output

•Overvoltage Tolerant Inputs Facilitate 5 V to 3 V Translation

•Proprietary Noise / EMI Reduction Circuitry Implemented

•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

Figure 1. Logic Symbol

IEEC / IEC

See detailed ordering, marking and shipping information in the

package dimensions section on page 6 of this data sheet.

ORDERING INFORMATION

MARKING

DIAGRAMS

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SC−88

(SC−70 6 Lead)

1.25x2

CASE 419AD−01

SIP6 1.45x1.0

CASE 127EB

C4KK

XYZ

C4, Z75 = Specific Device Code

KK = 2−Digit Lot Run Traceability Code

XY = 2−Digit Date Code Format

Z = Assembly Plant Code

= Year Coding Scheme

= Plant Code Identifier

T = Die Run Code

= Eight−Week Datacoding Scheme

Z75T

Pin 1

NC7SZ175

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Connection Diagrams

Figure 2. SC70 (Top View)

(Top View) AAA

Pin One

CP 1 6 C

GND 2 5 VCC

D 3 4 Q

CP C

GND VCC

Figure 3. Pin 1 Orientation

Figure 4. MicroPak (Top Through View)

AAA represents Product Code Top Mark − see ordering code.

NOTE: Orientation of Top Mark determines Pin One location.

Read the Top Product Code Mark left to right, Pin One

is the lower left pin (see diagram).

D Q

PIN DESCRIPTIONS

Pin Name Description

D Data Input

CP Clock Pulse Input

CClear Input

QFlip−Flop Output

FUNCTION TABLE

Inputs Output

CP D C Q

L H L

HHH

X H Qn

X X L L

H = HIGH Logic Level Qn = No Change in Data

L = LOW Logic Level X = Immaterial

NC7SZ175

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ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Min Max Unit

VCC Supply Voltage −0.5 +6.5 V

VIN DC Input Voltage −0.5 +6.5 V

VOUT DC Output Voltage −0.5 +6.5 V

IIK DC Input Diode Current VIN < 0 V − −50 mA

IOK DC Output Diode Current VOUT < 0 V − −50 mA

IOUT DC Output Source / Sink Current −±50 mA

ICC / IGND DC VCC / GND Current −±50 mA

TSTG Storage Temperature Range −65 +150 °C

TJJunction Temperature under Bias −150 °C

TLJunction Lead Temperature (Soldering, 10 Seconds) −260 °C

PDPower Dissipation @ +85°CSC70 −190 mW

MicroPak −327

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Conditions Min Max Unit

VCC Supply Voltage Operating 1.65 5.5 V

Supply Voltage Data Retention 1.5 5.5

VIN Input Voltage 0 5.5 V

VOUT Output Voltage 0 VCC V

tr, tfInput Rise and Fall Time VCC = 1.8 V, 2.5 V ±0.2 V 0 20 ns/V

VCC = 3.3 V ±0.3 V 0 10

VCC = 5.5 V ±0.5 V 0 5

TAOperating Temperature −40 +85 °C

qJA Thermal Resistance SC70−5−659 °C/W

MicroPak −382

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond

the Recommended Operating Ranges limits may affect device reliability.

1. Unused inputs must be held HIGH or LOW. They may not float.

NC7SZ175

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DC ELECTICAL CHARACTERISTICS

Symbol Parameter VCC (V) Conditions

TA = +25°C TA = −40 to +85°C

Unit

Min Typ Max Min Max

VIH HIGH Level Input

Control Voltage

1.65 to 1.95 0.65 VCC − − 0.65 VCC −V

2.3 to 5.5 0.7 VCC − − 0.7 VCC −

VIL LOW Level Input

Control Voltage

1.65 to 1.95 − − 0.35 VCC −0.35 VCC V

2.3 to 5.5 − − 0.3 VCC −0.3 VCC

VOH HIGH Level Control

Output Voltage

1.65 VIN = VIH

or VIL

IOH = −100 mA 1.55 1.65 −1.55 −V

1.8 1.7 1.8 −1.7 −

2.3 2.2 2.3 −2.2 −

3.0 2.9 3.0 −2.9 −

4.5 4.4 4.5 −4.4 −

1.65 IOH = −4 mA 1.24 1.52 −1.29 −

2.3 IOH = −8 mA 1.9 2.15 −1.9 −

3.0 IOH = −16 mA 2.4 2.8 −2.4 −

3.0 IOH = −24 mA 2.3 2.68 −2.3 −

4.5 IOH = −32 mA 3.8 4.2 −3.8 −

VOL LOW Level Control

Output Voltage

1.65 VIN = VIL

or VIH

IOL = 100 mA−0.0 0.1 −0.1 V

1.8 −0.0 0.1 −0.1

2.3 −0.0 0.1 −0.1

3.0 −0.0 0.1 −0.1

4.5 −0.0 0.1 −0.1

1.65 IOL = 4 mA −0.08 0.24 −0.24

2.3 IOL = 8 mA −0.10 0.3 −0.3

3.0 IOL = 16 mA −0.15 0.4 −0.4

3.0 IOL = 24 mA −0.22 0.55 −0.55

4.5 IOL = 32 mA −0.22 0.55 −0.55

IIN Input Leakage

Current

1.65 to 5.5 0 ≤ VIN ≤ 5.5 V − − ±0.1 −±1.0 mA

IOFF Power Off Leakage

Current

0.0 VIN or VOUT = 5.5 V − − 1.0 −10 mA

ICC Quiescent Supply

Current

1.65 to 5.5 VIN = 5.5 V, GND − − 1.0 −10.0 mA

NC7SZ175

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AC ELECTRICAL CHARACTERISTICS

Symbol Parameter VCC (V) Conditions

TA = +25°C TA = −40 to +85°C

Min Typ Max Min Max Unit

fMAX Maximum Clock Frequency

(Figures 5, 8)

1.65 CL = 50 pF,

RL = 500 W

− − − 100 −MHz

1.8 − − − 100 −

2.5 ±0.2 − − − 125 −

3.3 ±0.3 − − − 150 −

5.0 ±0.5 − − − 175 −

tPLH, tPHL Propagation Delay CP to Q

(Figures 5, 7)

1.65 CL = 15 pF,

RL = 1 MW

−9.8 15.0 −16.5 ns

1.8 −6.5 10.0 −11.0

2.5 ±0.2 −3.8 6.5 −7.0

3.3 ±0.3 −2.8 4.5 −5.0

5.0 ±0.5 −2.2 3.5 −3.8

3.3 ±0.3 CL = 50 pF,

RL = 500 W

−3.4 5.5 −6.2

5.0 ±0.5 −2.6 4.0 −4.7

tPHL Propagation Delay C to Q

(Figures 5, 7)

1.65 CL = 15 pF,

RL = 1 MW

−9.8 13.5 −15.0 ns

1.8 −6.5 9.0 −10.0

2.5 ±0.2 −3.8 6.0 −6.4

3.3 ±0.3 −2.8 4.3 −4.6

5.0 ±0.5 −2.2 3.2 −3.5

3.3 ±0.3 CL = 50 pF,

RL = 500 W

−3.4 5.3 −5.8

5.0 ±0.5 −2.7 4.0 −4.5

tSSetup Time, CP to D

(Figures 5, 8)

2.5 ±0.2 CL = 50 pF,

RL = 500 W

− − − 2.5 −ns

3.3 ±0.3 − − − 2.0 −

5.0 ±0.5 − − 1.5 −

tHHold Time, CP to D

(Figures 5, 8)

2.5 ±0.2 CL = 50 pF,

RL = 500 W

− − − 1.5 −ns

3.3 ±0.3 − − − 1.5 −

5.0 ±0.5 − − − 1.5 −

tWPulse Width, CP

(Figures 5, 8)

2.5 ±0.2 CL = 50 pF,

RL = 500 W

− − − 3.0 −ns

3.3 ±0.3 − − − 2.8 −

5.0 ±0.5 − − − 2.5 −

Pulse Width, C

(Figures 5, 8)

2.5 ±0.2 Clock HIGH

or LOW

CL = 50 pF,

RL = 500 W

− − − 3.0 −ns

3.3 ±0.3 − − − 2.8 −

5.0 ±0.5 − − − 2.5 −

trec Recovery Time, C to CP

(Figures 5, 8)

2.5 ±0.2 CL = 50 pF,

RL = 500 W

− − − 1.0 −ns

3.3 ±0.3 − − − 1.0 −

5.0 ±0.5 − − − 1.0 −

NC7SZ175

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CAPACITANCE (TA = +25°C, f = 1 MHz)

Symbol Parameter Condition Typ Max Units

CIN Input Capacitance VCC = Open, VIN = 0 V or VCC 3−pF

COUT Output Capacitance VCC = 3.3 V, VIN = 0 V or VCC 4−pF

CPD Power Dissipation Capacitance

(Note 2)

VCC = 3.3 V

VCC = 5.0 V

−

2. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at

no output loading and operating at 50% duty cycle. (See Figure 6)

CPD is related to ICCD dynamic operating current by the expression: ICCD = (CPD) (VCC) (fIN) + (ICCstatic).

AC Loading and Waveforms

CL includes load and stray capacitance

Input PRR = 1.0 MHz, tW = 500 ns.

Figure 5. AC Test Circuit

CP Input = AC Waveform; tr = tf = 1.8 ns;

CP Input PRR = 10 MHz; Duty Cycle = 50%

D Input PRR = 5 MHz; Duty Cycle = 50%.

VCC

Figure 6. ICCD Test Circuit

VCC

CLRL

OUTPUT

Figure 7. AC Waveforms

CP Input

CD Input

C Input

Q Output

Figure 8. AC Waveforms

DEVICE ORDERING INFORMATION

Device Top Mark Packages Shipping†

NC7SZ175P6X Z75 6−Lead SC70, EIAJ SC88, 1.25 mm Wide 3000 / Tape & Reel

NC7SZ175L6X C4 6−Lead MicroPak, 1.00 mm Wide 5000 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

MicroPak is trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.

SIP6 1.45X1.0

CASE 127EB

ISSUE O

DATE 31 AUG 2016

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding

the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically

disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the

rights of others.

98AON13590G

DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1

SIP6 1.45X1.0

SC−88 (SC−70 6 Lead), 1.25x2

CASE 419AD−01

ISSUE A

DATE 07 JUL 2010

L1 L2

bA1

TOP VIEW

SIDE VIEW END VIEW

Notes:

(1) All dimensions are in millimeters. Angles in degrees.

(2) Complies with JEDEC MO-203.

SYMBOL MIN NOM MAX

0º 8º

0.00

0.15

0.10

0.26

1.80

1.15

0.65 BSC

0.15 BSC

1.10

0.10

0.30

0.18

0.46

2.20

2.40

1.35

0.80

θ1 4º 10º

A2 0.80 1.00

0.42 REF

0.36

2.00

2.10

1.25

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding

the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically

disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the

rights of others.

98AON34266E

DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1

SC−88 (SC−70 6 LEAD), 1.25X2

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coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.

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PUBLICATION ORDERING INFORMATION

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Voice Mail: 1 800−282−9855 Toll Free USA/Canada

Phone: 011 421 33 790 2910

LITERATURE FULFILLMENT:

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