i ABXSRAS HASXSRA SMT (ERE, HESS. tt * BRABRA, LAX. * RARSNRREARRE, -55C ~+S85CLiHEA, RRR S115%, * SEGAGE, RAAT St. * BRAM, AT Eee. A * SATSERR, BAEK. Eman RTA S BAT MRSS ss MULTILAYER CHIP CERAMIC CAPACITOR 0805 x 105 K 500 N T TO OT T! T TT T T @ @ OR+ Ot, HS O#BERE(PF) Oprz= mall mise | select) | 241%) ag | sree RATK | Tee Kis | FRE 0402 | 0.04x 0.02 | 1.00 0.50 x X5R 104 | 10x10* +5% 0603 | 0.06x 0.03 | 1.60 0.80 105 |10x10 K +10% 0805 | 0.08 x 0.05 | 2.00x 1.25 106 | 10x10 1206 | 0.12 0.06 | 3.20 1.60 OL(rE OFTRSI OMA RDA | WEE RATHI mat ec 6R3 6.3V S sanDe Te Reeth REMARK 100 10V C SSE T mapas ef 250 25V N =e eee B BASwee ( SEAR Se) e DBRT Fag Se BHF) Aa Zea T WB 0402 1005 1.00+0.05| 0.50+0.05] 0.50+0.05} 0.25+0.10 0603 1608 1.604+0.10} 0.80+0.10) 0.80+0.10) 0.30+0.10 0805 2012 2.00+0.20] 1.254+0.20] 0.80+0.10] 0.50+0.25 1.00+0.10 1.25+0.20 1206 | 3216 | 3.20+0.30| 1.60+0.20]0.80+0.10] 0.50+0.25 1.00+0.10 1.25+0.20 25Maze WB X5R Multilayer Chip Ceramic Capacitor X5R MLCC for General-use is class J] low frequency capacitor, its capacitance is stable. Features Capacitance is big, unit capacitance is big. * * The Capacitance is stable, its operating temperature is -55C and +85C, within the range, the temperature coefficient is +15%. * It has multi-layer monolithic structure, has high reliability. * It has good solderability and soldering resistance, suitable for flow soldering/reflow soldering. e Application * It is suitable for all kinds of filter and coupling circuits. Product Part Number Expression 0805 xX 105 K 500 N T To To OTS T T T T @ @ @Dimensions @Dielectric @Normal @Capacitance ; Type Capacitance(PF) Tolerance Type British Metric , , (Inch) (mm) Code |Dielectric} |Expression| Actual Code| Tolerance Material Method | Value 0402 | 0.04 0.02 1.00 x 0.50 x X5R J 45% 104 10x10* 0603 | 0.06 x 0.03 1.60 x 0.80 K +10% 105 10x10 0805 | 0.08 x 0.05 2.00 x 1.25 106 10x10 1206 | 0.12x0.06 3.20 x 1.60 Termination Type Expression | Termination Material @Package Method Rated Voltage eee Expression| Packaging Expression| Actual S Pure Silver NERS Method |Value Cc Pure Copper No Mark | Bulk Packaging 6RS 6.3V N Three L Plati ens : ree Layers Plating : , 400 40V Terminal (Silver or qT Taping Packaging Copper layer/ Nickel Bulk Plastic 250 25V layer /Tin layer) Box Packaging e Outside Dimension Type Dimension (mm) British Metric expression | expression L a q WB 0402 1005 1.00+0.05 |0.50+0.05 |0.50+0.05)0.2540.10 0603 1608 1.60+0.10 |0.80+0.10 |0.80+0.10/0.30+0.10 0805 2012 2.00+0.20 |1.25+0.20 |0.80+0.10/0.50+0.25 1.00+0.10 1.25+0.20 1206 3216 3.20+0.30 |1.60+0.20 |0.804+0.10}0.50+0.25 1.00+0.10 1.25+0.20 26= BAT MRS Sse MULTILAYER CHIP CERAMIC CAPACITOR ja 3B REIXSREA Rt 0402 0603 0805 1206 T(EEEB | 6.38V|10V/16V |25V |6.3V] 10V|16V|25V/6.3V|10V}16V/25V|6.3V] 1 OV} 16V| 25V aA 1nF 2.2nF 3.3nF 4.7nF 6.8nF 10nF 22nF 33nF 47nF 68nF 100nF 220nF 830NnF 470nF 680nF Tur 2.2 uF 3.3 uF 4.7uF 6.8uF 10uF 22 uF 383 uF 47 uF 27Maze e Capacitance Range Item X5R MLCC for general-use DImension 0402 0603 0805 1206 Rated Voltage 6.3V 10V 16V 25V 6.3V 10V 16V 25V 6.3V 10V 16V 25V 6.3V TOV} 16V| 25V Capacitance 1nF 2.2nF 3.3nF 4.7nF 6.8nF 10nF 22nF 33nF 47nF 68nF 100nF 220nF 830NnF 470nF 680nF Tur 2.2uF 3.3 uF 4.7uF 6.8uF 10uF 22 uF 83 uF 47 uF 28S BAT MRSS ss MULTILAYER CHIP CERAMIC CAPACITOR Mie AWX7R, XSR, Z5U, YOVAy se tt A HK aa Sik JAB BE aA wa _ X5R: -55T ~85C Z5U: 10C ~85C 1 | tei a X7RA: -55C ~125C Y5V: -25C~85C 1. ABR A-RES. 2% AR ARG LES. 3.2 ie eS) se BK ZUR FLI. 2 | She 4. BBR FL BR Xt > x10 ENR TE. RHAAUS. 5 . im SE Ha WE FRE (EA Se Bk HE AH BOR Re. 3 | Rt HAERTHRA XPAFORRBBER. 4 BAe ERE RESEDA <THE: HP4278A8#8, HP4284848. X5R,X7R Z5U,Y5V seca yg Ur>50V, Df< 250x107 Ur> 50V,DF < 500 x 10% 1 WEEE: 25 450, = Ur=25V,16V: Df< 350 x 10 |Ur=25v: RS ance ao S| BRBRO) | Ur=10V: Df<500 10" C<1.0 p RDF < 700 x 10 ae Ur=6.3V: _ 4 2. Alt B:1.0+0.2V, C<3.3uF, Df<500x10% | C?1-0uFDF<900x10 (Y5V)0.5 + 0.2V(Z5U), C>3.3uF, DF<1000x 10% JUr=16V, 10V, 6.3V: apeee, DE< 1250 x10" 3. AStHBZE: 1.0 + O.1 KHz, 3x iB Bah ae BS <A A BE Hh: 6 4h HA (1R.) C<25nF,IR> 10000MQ C<25nF,IR>4000MQ SF251 1 ffs Se ial at Be). RCIA, C>25nF,RxC2500S IC>25nF,RxC2>500S Bat ERIE LBB 60+5 HAM Bee Bie. XMS LIES ER, HAM 6O+1 7 heeR Re >3xt LIFER eh, RHRBSRRHARE / BW & BE i(KF5OmA. BITRE: MB7T 150+0/-10T SAME 6O+5 388, SURE Bink HER BLE 24+ 2 |v. 8 BRERESH | ELFRREARARARASHERBEARERX KZE -55 ~ 125C atay-55 ~ B85 C(X7R. X5R);-25C ~85C +10T~85C(Y5V ~Z5U Sm ANRESE SEA EAH FeocC RPGnet Le BEES m A. XHEASSRECBAREAAF. PRR IZ YA A HH235+5C ( MH245 9 pce 75% i ERBAT +5C) HHRAKS WR 240.5%. AIRE: 25+2.5mm/*b. 31MbBBzei e@ X7R, X5R, Z5U, Y5V MLCC for general use reliability test method Number Item Standard Test Method Oo ti Temperature XR: -55 ~ 85C Z5U: 10 ~ 85C - ~ YBV: -25 ~85T Range X7R: -55C ~125C Appearance 1.Good ceramic body color Check by using continuity. microscope >10x . 2.The chips have no visualdamages and must be very smooth. 3.No exposed inner- electrode, no cracks or holes. 2 4.The outer electrode should have no cracks, holes, damages or surface oxidation. 5.Outer electrode no prolongation or the prolongation is less than half of that of the termination width. 3 Dimensions Within the specified dimensions * Using micrometer or vernier calipers 4 Capacitance) | Within the specified tolerance * Measuring Equipments: HP4278 capacitance meter, Dissipation X5R,X7R Z5U,Y5V HP4284 capacitance, Factor (OF) [urs soy, DF<250x10 * [Ur=S0VDF<50010~ _ | Measuring Conditions: 5 Ur=25V,16V: DF < 350 x 10 | Ur=25V: 1.Measuring Temperature: Ur=10V: DF < 500 x 10 * C<1,.0nFDF< 70010) 25045. Hurnidity: 30% ~ 75%. Ur=6.3V: C>1.0nFDF<900x 10] 2.Measuring Voltage: 1.0 + 0.2V. C<3.3uF, DF <500x10 * |Ur=16V, 10V, 6.3V: 3,.Measuring Frequency: C>3.3uF DF<1000x 10%] DF<1250x 10% 1.0 + 0.1MHz : * Measuring Equipment meee 5 C<25nF IR 2 10000MO C<25nF,IR > 40000MQ insulation resistance meter C>25nF,R x G2 5008S 1 C>25nF,R x C2 5008 (such as Sf2511 insulation 6 resistance). Measuring Method: Must measure at rated voltage, and measure the IR within 60 + 5 seconds. 7 Withstanding | >93Ur Must measure at 3 times rated Voltage voltage, dwell time: 60 + 1 seconds, no short and the changing/discharging current less than 50mA. Capacitance | Must meet the capacitor First, pre-heat: heat treat Temperature | character temperature G0 +5 tore at {50+ OF oc, va _ . en set it for 24+ 2 hours a Characteristic coefficient requirements room temperature. 8 within the operating Measure the capacitance at temperature range. -55~125T or -55~85C, the capacitance change ratio comparing to that of 25C must be within the specified range. Solderability Tin coverage should be Dip the capacitor into ethanol 75% of the outer electrode or colophony solution,and then 9 dip it into 245+ 5 eutectic solder solution for 2 +0.5 seconds. Dipping speed: 25 + 2.5mm/second. 52= BAT MRS Sse MULTILAYER CHIP CERAMIC CAPACITOR ao aE ge wate Shite $e AAPA SET: 34 150+0/-10C Mme BSESUe | X7R, X5R:220%8 RN 60+ 538, RATES RATM E24 + Qh. Z5U, YEV-ESOMERA | Ge TRRMESE. ELBE DF. Fela ea 26515C AES 1021. Bee 10 | myvsieee LR. Flaca HER CE RHE O4 + 2 Re, SSIES. SARE: 25+2.5mm/#b. RRMA CEM: Bee ge FP 1 100C120C| 14>% 2 170CT200C| 145>% KEARSE SEE 1 ber FISCA( PRS) Lb. RES SAFy abn 1ON fo), HSER eat Ae FBSA ET, TEMBER, ble BEM SARS HARE RRR. 11 | eemeeee | THR RRS CR. P|<+ 10N,10 + 1% RE: 1.0mm /Rb HY , RSA fal She SRE NSM RSIS MBLC ( RESTA) L. ese aS ee A ESA METMMEH, HMR 1.5mm, x : EVE O55Hz 2 ABS, HERA IM( 4E10 DF Pease aE Z5SHZANBE 10Hz) mBZEA SMA PSERR. HRI fE= AE A SET ON ( ABBY G NEE) 12 | TeReTE 2 XMAS EASIER S hari BlEtI ( BUGIRSLRIIEI) tL, ABER 4 RHA MH. HEA SE EAE, Th ARSE, DESEY TERS HRMS RRR. 13 | ql heRE FRM SR BLE ERS 53MbBBzei Number Item Standard Test Method 10 Resistance to Soldering Appearance No defects visible Cap. Change ratio X7R, X5R: within 20% Z5U, Y5V: within 30% DF Same as original spec. IR Same as original spec. %< First pre-heat: heat treat for G05 minutes at 150+0/-10C, then set it for 24+2 hours at room temperature. *xThen pre-heat tne capacitance according to the following chart. Dip the capacitor into 265+5C eutectic solder solution for 10+1s. Then set it for 24+2 hours at room temperature, then measure. Dipping speed: 25+ 2.5mm/second. Preheat conditions: Stage |Temperature 1 100C1 20C 2 170C200C Time 1 minute 1 minute 11 Adhesive Strength of Termination No removal of the terminations or other defect shall occur * Solder the capacitor to the test jig (glass epoxy resin board) shown in Fig.1 using a eutectic solder. Then apply a 10N force in the direction shown as the arrowhead. The soldering shall be done either with an iron or using the reflow method and shall be conducted with care so that the soldering is uniform and free of defects such as heat shock, etc. ( |-}10N, 1041s ww Speed:1.0 mm/s Glss epoxy resinboard Fig.1 12 Resistance to Vibration Appearance No defects or abnormities Capacitance Within the specified tolerance range D.F. Same as original spec. Solder the capacitor to the test jig (glass epoxy resin board). The capacitor should be subjected to a simple harmonic motion having a total amplitude of 1.5mm, the frequency being varied uniformly between the approximate limits of 10 and 55Hz, shall be traversed (from 10 Hz to 55 Hz then 10 Hz again) in approximately 1 minute. This motion shall be applied for a period of 2 hours in each 3 mutually perpendicular directions (total is 6 hours). Fif.2 13 Bending Resistance No cracks or other defects shall occur Solder the capacitor to the test jig (glass epoxy resin board) shown in Fig.3 using a eutectic solder. Then apply a 10N force in the direction shown as Fig.4. The soldering shall be done either with an iron or using the reflow method and shall be conducted with care so that the soldering is uniform and free of defects such as heat shock, etc. 34= BAT MRSS se MULTILAYER CHIP CERAMIC CAPACITOR Sri ja RE HBAS 20, 50mm J) Es 1. Omm /$o Al | im 3 b 4.5mm R230 tc 9 Oy Hil 1 NNE EE oy 13 | dif ea TERE * 100mm . Fas FA4 LXW Fes} (mm) (mm) a b c d 4.5*%2.0/3.5]7.0] 2.4 4.56%3.273.5]7.0/3.7]1.0 5.7*%6.3]/4.5]8.0 15.6 we KSLA BRED iE ( C) FT ( S882) ; ink ( Ei eee re DOKEmA 1 | SRI =3 | 30+3 ea eeyeym Z5U, Y5V: 2 iim 2-3 14 | iE 72 + 30%Sh IN 3 | BS L(iBe+2 30+3 DF. Rasa a ai 2-3 LR. ase Shi RR KE 404 20H 9095% BREET Re 500+24/-0/)\FF, zee X7R, X5R: RRS HAS aie MREME 4842 i, ETH. tL 7E + 20%H EA 15 : Z5U, Y5V: EGER) Ze = 30%R8 rs D.F aE LR. ADReE Sb FRR DAF Fe KZE 40 +2C Hl 9095% ENR RR Rim EE BRea X7R, X5R: 500+24/-O/)\RF. ARR SFIS ik TMS Se #4 + 20% 9 4842 /\e, iE4THIE. Z5U, Y5V: 16 BEB 4 + SOE EIN D.F ASR LR asa dai ARORA | oe ae mB am Beh Me FE ABLGE T(E AEE O00 + 120, 38 = X7R, X5R: . oa ie HE + 20% Bal Hy BRESRTRBIBOMA, FABAASRRETRERE Z5U, Y5V: 48+2 .\R, He. 17 | =e # + 30% BA D.F MRR LR MRE 55_i fz ii Number] Item Standard Test Method Bending Resistance mo, Force adding <e speed: 1. Ommn/f | Force adding .b, 4.5mm R230 }t E - a NN WN & Flexure:<1 >| v Capacitance meter a 45m 45mm 90mm Fig. 3 Fig.4 LXW Dimension (mm) a b c d 4.5X2.0]3.5]7.0]2.4 4.5X3.2]3.5|7.0]3.7/1.0 5.7X6.314.5| 8.0] 5.6 Temperature) Appearance | No defects Stage Temperature CC) Time Cmin.) Cycle Cap. Change] X7R, X5R 1 Min. Operating Temperature+3 30+3 ratio within 220% 2 Room Temperature 2-3 14 within 30% 3 Max. Operating Temperature 2 3043 DF. Same as orginal 4 Room Temperature 23 standard LR. same as orginal standard Humidity |Appearance |No defects Set the capacitor for 500+24/-0 hours at the Steady Cap. Change| X7R, X5R condition of 40+2C and 90-95% humidity. Then remove State ratio within 20% and set it for 48+2 hours at room temperature, then 15 within +30% measure. D.F. Same as original standard IR. Same as original standard Humidity Appearance |No defects *xApply rated voltage to the capacitor for 500+24/0 Load Cap. Changel X7R, X5R: hours at the condition of 40+2C and 90-95% humidity. ratio within 20% Remove and set it for 48+2 hours at room temperature, Y5V: + within +30% then measure. D.F. Same as original standard IR. Same as original standard Life Test Appearance | No defects *x Apply two times rated voltage to the capacitor for Cap. Changel X7R, X5R: 1000+1 2 hours at the upper temperature limits, the ratio within +20% charging current should be less than 50mA. Remove Z5U, Y5V: i within 30% and set it for 24 2 hours at room temperature, 17 then measure. D.F. Same as original standard LR. Same as original standard 56= BAT MRSS se MULTILAYER CHIP CERAMIC CAPACITOR BAZ HASEHR e COG#IPH, RH, SH, TH, UHRSl : : X7Rig RRR ia Be tet 15% 10% 10% 5% 5% am 0% Yt Er (O% eth Pah 7 -5% Pt PSS 88 a -10% 5% Lal co my -15% -10% -60T -40 -200 OU 200 40U GOT 80T 100t 120 5T -26C 0 OC 26c 50C 75C 100T 125 aE ink Z5 Ui Bee Y SV i Be te 20% 40% 0% 20% -20% ov dil NI dl -20% = ~40% NI 2 -40% N RE -60% N fg -60% a NI eS -80% HE -80% 100% -55C -25C OC 25C 50C 75C 100C 125C meee 280 200 Boe 78 1001280 3 ime (fea hBeia Mi: COG :1MHZ X7R,Z5U,Y8V:1 KHZ 40% 20% 14 a hy -20% -40% we 760% HH -80% Y5V 50V -100% 0 10 20 30 40 50 Hitt fi B[Vdc] ZA VRE Ree ZAR erHea Hee: COG :1MHZ X7R,Z5U,Y5V:1 KHZ 10% 0% Bl -10% Ih -20% Hill -30% Y5V BR 40% rT = """60G 56V" a 0 50 100 1000 10000 35 Hit [Vrms] Be [Hr] 57MbBBzei Mi GENEREL-USE MLCC CHARCCTER PROFILES e COG and PH. RH, SH, TH. UH siries temperature coefficent -60T -40T -20T OT 20C 40C GOT 80T 100T 120 Temperature O 10% Oo 6 am 5% 9 a Q 0% SSE St Bee 3 SEB -5% m~ US a a O -10% _ 9 Pa Oo Z5U temperature character 20% O o DO 0% 9 2. -20% @ N QO -40%| 0 NI QO. & -60% aN nN oO -80% Oo ~ M& -55C -25C OC 250 50C 75C 100C 125C o Temperature DC Voltage Characteristics Measuring condition COG :1MHz X7R, Z5U. Y5V:1KHz O i 40% 8 20% = 0% 520% a- O_40% o 33-60% g Qe Y5V 50V D100% 3 0 10 20 30 40 50 S DC Voltage[Vdc] Capacitance-AC Voltage Characterics Measuring condition: COG :1MHz X7R,Z5U,Y5V:1 KHZ QO SB + 80% O. +60% s +40% O +20% g mR 0% @ -20% mm o 3 ACH AE[Vrms] oles SHueyo soueyoeden ones esGbueyo souryoedeg ones eBueyo eoueyoeden wm oe X7R tempreture characteristics 15% 10% 5% 0% -5% -10% -15% -55C =-25 oc 25 50 Temperature 75C 100C 125 Y5V temperature characteristics 40% 20% 0% -20% -40% -60% -80% -100% -55C -25C oc 250 50C 75C 100C 125 Temperature e Capacitance change aging 10% 0% -10% -20% -30% -40% 0 50 100 1000 10000 Time[Hr]Bek 0 ns Rae = Rr ese MULTILAYER CHIP CERAMIC CAPACITOR * JAA 0402,0603, 0805, 12006 FH RTERHWRERT Kak * A B c D E F G H J T A AS 0402 0.65 | 115 | 8.00 | 350 | 1.75 | 2.00 | 2.00 | 4.00 | 1.50-0/ | (+ +0.10 | +0.10 | +0.10 | 0.05 | 0.10 | +0.05 | +0.05 | +0.10 | +0.10 | 0.80 0603 1.10 | 1.90 | 8.00 | 3.50 | 1.75 | 4.00 | 2.00 | 4.00 | 1.50-0/ | (RF 0.20 | +0.20 | +0.20 | +0.05 | +0.10 | 0.10 | +0.10 | +0.10 | +0.10 1.10 0805 1.45 | 2.30 | 8.00 | 3.50 | 1.75 | 4.00 | 2.00 | 4.00 | 1.50-0/ | (+ +0.20 | +0.20 | +0.20 | +0.05 | +0.10 | +0.10 | +0.10 | +0.10 | +0.10 1.10 1006 1.80 | 3.40 | 8.00 | 3.50 | 1.75 | 4.00 | 2.00 | 4.00 | 1.50-0/ | (RF 0.20 | +0.20 | +0.20 | +0.05 | 0.10 | +0.10 | +0.10 | +0.10 | +0.10 1.10 137Maze Mi Package e Paper Tape Taping Top cover tape Carrier tape(paper) Polyatyrene reel S Cavity for chip Dimensions of paper take taping for0402,0603, 0805, 1206 Sprocket Hole J Cavity for chip Code * A B Cc D E F G H J T Paper size 0402 0.65 | 1.15 8.00 | 3.50 1.75 2.00 | 2.00 | 4.00 | 1.50-0/ | Below +0.10 | +0.10 +0.10 +0.05 |} +0.10 +0.05 | +0.05 +0.10 +0.10 0.80 0603 1.10 | 1.90 8.00 | 3.50 1.75 4.00 | 2.00 | 4.00 | 1.50-0/ | Below +0.20| +0.20 | +0.20] +0.05] +0.10 | +0.10] +0.10 | +0.10| +0.10 1.10 0805 1.45 | 2.30 8.00 | 3.50 1.75 4.00 | 2.00 | 4.00 | 1.50-0/ | Below +0.20| +0.20 | +0.20] +0.05|] +0.10 | +0.10] +0.10 | +0.10| +0.10 1.10 1.80 | 3.40 8.00 | 3.50 1.75 4.00 | 2.00 | 4.00 | 1.50-0/ | Below 1206 +0.20] +0.20 | +0.20] +0.05] +010 | +010] +0.10 | +0.10] +0.10 1.10 138Bex 0 ns Rae = Rr ese MULTILAYER CHIP CERAMIC CAPACITOR ait * A B c D E F G H J T AR Hs BA 0805 1.55 | 2.35 | 8.00 | 3.50 | 1.75 | 4.00 | 2.00 | 4.00 | 1.50-0/ | (EF 0.20 | 40.20 | +0.20 | +0.05 | +0.10 | 40.10 | +0.10 | 0.10 | +0.10 1.50 1206 1.95 | 3.60 | 8.00 | 3.50 | 1.75 | 4.00 | 2.00 | 4.00 | 1.50-0/ | (+ 0.20 | 40.20 | +0.20 | +0.05 | +0.10 | +0.10 | #0.10 | 0.10 | +0.10 1.85 1240 2.70 | 342 | 8.00 | 3.50 | 1.75 | 4.00 | 2.00 | 4.00 | 1.50-0/ | (+ 0.10 | 40.10 | 0.10 | 40.05 | +0.10 | 40.10 | +0.05 | 0.10 | +0.10 3.2 1808 2.20 | 4.95 | 12.00 | 5.50 | 1.75 | 4.00 | 2.00 | 4.00 | 1.50-0/ | (+ 0.10 | 40.10 | +0.10 | +0.05 | +0.10 | +0.10 | +0.05 | 0.10 | +0.10 3.0 4812 3.66 | 4.95 | 12.00 | 5.50 | 1.75 | 8.00 | 2.00 | 4.00 | 1.50-0/ | (e+ +0.10 | +0.10 | +0.10 | +0.05 | +0.10 | #0.10 | #0.05 | +0.10 | +0.10 4.0 HE RALRARY HERE 139Maze e Embossed Taping Top cover tape Carrier tape Polystyrene reel Cavity for chip * Dimensions of embossed taping for 0805, 1206, 1210, 1808, 1812 type Sprocket J Cavity for chip an Code A B C D E F G H J T Tape size 0805 155 | 235 | 800 | 350 | 1.75 | 400 | 200 | 4.00 | 1.50-0/ | &F +0.20 | +0.20| +0.20| +0.05 | +0.10 | +0.10 | +0.10 | +0.10| +010 | 1.50 1495 | 360 | 800 | 350 | 1.75 | 400 | 200 | 4.00 | 1.50-0/ | 1206 +0.20 | +0.20| +0.20| +0.05 | +0.10 | +0.10 | +0.10 | +0.10 | +010 | 1.85 121 270 | 3.42 | 8.00 | 350 | 1.75 | 400 | 200 | 4.00 | 1.50-c0/ | EF 0 +0.10 | +0.10| +0.10 | +0.05 | +0.10 | +0.10 | +0.05 | +0.10 | +010 | 3.2 1 2.20 | 495 | 12.00 | 550 | 1.75 | 4.00 | 2.00 | 4.00 | 1.50-0/ | &F 808 +0.10 | +0.10| +0.10 | +0.05 | +0.10 | +0.10 | +0.05 | +0.10 | +010 | 3.0 4812 3.66 | 495 | 1209 | 5.50 | 1.75 | 8.00 | 2.00 | 4.00 | 1.50-0/ | RF +0.10 | +0.10 | +0.10 +0.05 |} +0.10 | +0.10 | 40.05 | 40.10 +0.10 4.0 Note:The place with "*" means where needs exactly dimensions. 140e BASH Ame EB( 3%) = Rr ese MULTILAYER CHIP CERAMIC CAPACITOR a Fe | Se oR ( HB) 0 0 0000 | //0000 00 J UU I-A l1 KF200mm *F200mm KF200mm PIAA e S88 RY (Stz:mm) A E oF OL G eRTRE A B Cc D E F G 178,00 + 2.00 3.00 | 13.00+0.50 21.00 + 0.80 D50.00RE A 10.00+1.50 |412MAX 330.00 + 2.00 3.00 | 13.00+0.50 21.00 + 0.80 50.008 EA 10.00+1.50 |12MAX 141Maze e Structure of leader part and end part of the carrier paper End(Vacant position) | Chip carrier | Vacant position Leader part(covertape) QO 0 Q0O000 | //0000 00 FUU UU 0 UV Over200mm e Reel Dimensions (unit: mm) Over200mm Over200mm Feeding direction E | F U G e Code A B Cc D E F G 178.004+2.00 | 3.00 13.00+0.50 21.00+0.80 | 50.00 ormax | 10.00+1.50 | 12MAX 330.004+2.00 | 3.00 13.00+0.50 21.00+0.80 | 50.00 ormax | 10.00+1.50 | 12MAX 142Tea HS Rl mie (Aan wee ee es i S BAT MRSS ss MULTILAYER CHIP CERAMIC CAPACITOR / C (B) Re Rafe: O.1N<RIRESEEE<O.7N; ZERIBER:, ARG REAARRE, MHA RETSTERE. EBL. e ERR MAR 2a A B T C D E Rt 6.80 +0.10 8.80 + 1.00 12.00+0.10 | 15.00+0.10/-0} 2.00+0/-0.10 | 4.70+0.10 =n F Ww G H L | R+t| 31.50+0.20/-0 | 36.00+0/-0.2 | 19.00+0.35 7.00 + 0.35 110.00+0.70 | 5.00+0.35 gee eeeeeee nese ee eeeaeeeseseaeeeeseneeeeeeaees Le F (oe zy 1St5hL E I F W I L c ARS Rt BERANE AR he Base We Ra] ALE 0402] 10000 20000 5000 0603! 4000 15000 5000 0805} 4000 | 3000 10000 5000 1206] 4000 | TSX1.35mm 3000} 5000 5000 T>1. 35mm 2000 T<1. 80mm 2000 1210 TS 1, 80mm 1000 2000 1808 2000 2000 <1. 1812 TS Sean 500. 2000 2225 500 500 3035 500 He: BRACKET RR AHERRE. 143MbBBzei i TAPING SPECIFICATION e Top cover tape peeling strength (A)Paper Taping (6)Cover tape peeling direction . sO 4nd givect wad give" N \ verte 0 we O ex ON Cover taps 5 Cove T 0-15 Carrier Standard: 0.1N<peeling forc<0.7N; No paper dirty remains on the scotch when peeling, and no sticks to top and bottom cover tape. Bulk Case Package Symbol A B T Cc D E Dimension} 6.80+0.10 8.8041.00 |12.0040.10)15.00+0. 10/-1}2.0040/-0.10} 4.70+0.10 Symol F WwW G H L | Dimension |31 .50+0.20/-0) 36.00+0/-0.2}19.00+0.35} 7.00+0.35 | 110.00+0.70} 5.00+0.35 pretense escnscesseescesccsscescescosscessesconas Lr Pee l zy = E I F Ww L e Pack Quantity ; Pakaging method and quantity Size Note: W h ki Paper tape| Plastistic | |Bulkplastic | Normal bulk |INOl@: Ve can Choose packing taping embossed taping | box packaging] packaging style and quantity can be according to the 0402 10000 20000 5000 customer's requirement. 0603 4000 15000 5000 0805 4000 3000 10000 5000 1206 4000 TS 1. 35mm 3000 5000 5000 T>1. 35mm 2000 TS1. 80mm 2000 1210 T>1. 80mm 1000 2000 1808 2000 2000 <1. 1812 TS 85mm 500. 2000 2225 500 500 3035 500 144