Preliminary Revised August 2001 74LVTH32952 Low Voltage 32-Bit Registered Transceiver with 3-STATE Outputs (Preliminary) General Description Features The LVTH32952 is a 32-bit registered transceiver. Four 8-bit back to back registers store data flowing in both directions between two bidirectional buses. Separate clock, clock enable, and output enable signals are provided for each register. Input and output interface capability to systems at 5V VCC The LVTH32952 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. The registered transceiver is designed for low voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVTH32952 is fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining low power dissipation. Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs Live insertion/extraction permitted Power Up/Down high impedance provides glitch-free bus loading Outputs source/sink -32 mA/+64 mA ESD performance: Human-body model > 2000V Machine model > 200V Charged-device model > 1000V Packaged in plastic Fine-Pitch Ball Grid Array (FBGA) (Preliminary) Ordering Code: Order Number 74LVTH32952GX (Note 1) Package Number BGA114A (Preliminary) Package Description 114-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide [TAPE and REEL] Note 1: BGA package available in Tape and Reel only. (c) 2001 Fairchild Semiconductor Corporation DS500411 www.fairchildsemi.com 74LVTH32952 Low Voltage 32-Bit Registered Transceiver with 3-STATE Outputs (Preliminary) September 2000 74LVTH32952 Preliminary Connection Diagram Pin Descriptions Pin Names Description A0-A31 Data Register A Inputs B-Register 3-STATE Outputs B0-B31 Data Register B Inputs A-Register 3-STATE Outputs CPABn, CPBAn Clock Pulse Inputs CEAn, CEBn Clock Enable OEABn, OEBAn Output Enable Inputs Pin Assignments for FBGA (Top Thru View) Truth Table (Note 2) Inputs A Internal Register Output CPABn CEAn OEABn Value B 1 2 A0 CEA1 CPAB1 CPBA1 CEB1 B0 A1 OEAB1 OEBA1 B1 B2 C A4 A3 GND GND B3 B4 D A6 A5 VCC1 VCC1 B5 B6 E A8 A7 GND GND B7 B8 F A10 A9 GND GND B9 B10 G A12 A11 VCC1 VCC1 B11 B12 H A13 A14 GND GND B14 B13 CEB2 B15 J A15 CEA2 K NC CPAB3 OEAB2 OEBA2 CPBA3 NC L A16 CEA3 OEAB3 OEBA3 CEB3 B16 A18 A17 GND GND B17 B18 N A20 A19 VCC2 VCC2 B19 B20 P A22 A21 GND GND B21 B22 R A24 A23 GND GND B23 B24 T A26 A25 VCC2 VCC2 B25 B26 GND GND B27 B28 B30 B29 CEB4 B31 NC B0 X X H H NC Z L L L L U A28 A27 L H L Z V A29 A30 W A31 X L L H H L H H Z L X L NC B0 X H X L NC B0 X L X H NC Z X H X H NC Z H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = Output High Impedance = LOW-to-HIGH Transition. NC = No Change (state established by last valid CP) B0 = State established by last valid CP Note 2: A to B data flow shown; B to A flow control is the same, but uses OEBAn, CPBAn and CEBn. www.fairchildsemi.com 2 CPAB2 CPBA2 M L H 6 A2 H H 5 A X L 4 B X L 3 CPAB4 CPBA4 CEA4 OEAB4 OEBA4 Preliminary 74LVTH32952 Logic Diagram Byte 1 of 4 n = 1 for Byte 1, n = 2 for Byte 2, etc. Byte 1: A0 - A7, B0 - B7 Byte 2: A8 - A15, B8 - B15 Byte 3: A16 - A23, B16 - B23 Byte 4: A24 - A31, B24 - B31 VCC1 is associated with Bytes 1 and 2 VCC2 is associated with Bytes 3 and 4 Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 www.fairchildsemi.com 74LVTH32952 Preliminary Absolute Maximum Ratings(Note 3) Symbol Parameter Value Conditions Units VCC Supply Voltage -0.5 to +4.6 VI DC Input Voltage -0.5 to +7.0 VO DC Output Voltage -0.5 to +7.0 Output in 3-STATE -0.5 to +7.0 Output in HIGH or LOW State (Note 4) V V V IIK DC Input Diode Current -50 IOK DC Output Diode Current -50 VO < GND IO DC Output Current 64 VO > VCC Output at HIGH State 128 VO > VCC Output at LOW State V VI < GND mA mA mA ICC DC Supply Current per Supply Pin 64 mA IGND DC Ground Current per Ground Pin 128 mA TSTG Storage Temperature -65 to +150 C Recommended Operating Conditions Symbol Parameter Min Max Units 2.7 3.6 V 0 5.5 V VCC Supply Voltage VI Input Voltage IOH HIGH Level Output Current -32 IOL LOW Level Output Current 64 TA Free-Air Operating Temperature t/V Input Edge Rate, VIN = 0.8V-2.0V, VCC = 3.0V mA -40 +85 C 0 10 ns/V Note 3: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied. Note 4: IO Absolute Maximum Rating must be observed. DC Electrical Characteristics Symbol T A = -40C to +85C VCC Parameter (V) Min Max -1.2 Units Conditions II = -18 mA VIK Input Clamp Diode Voltage VIH Input HIGH Voltage 2.7-3.6 VIL Input LOW Voltage 2.7-3.6 VOH Output HIGH Voltage 2.7-3.6 VCC - 0.2 V IOH = -100 A 2.7 2.4 V IOH = -8 mA 3.0 2.0 VOL II(HOLD) II(OD) 2.7 Output LOW Voltage 2.0 0.8 2.7 Bushold Input Minimum Drive 0.2 Control Pins Data Pins IOFF Power Off Leakage Current IPU/PD Power Up/Down 3-STATE VO VCC - 0.1V V IOH = -32 mA V IOL = 100 A 0.5 V IOL = 24 mA 0.4 V IOL = 16 mA 3.0 0.5 V IOL = 32 mA 3.0 0.55 V IOL = 64 mA 75 A VI = 0.8V -75 A VI = 2.0V 500 A (Note 5) -500 A (Note 6) 3.0 Input Current VO 0.1V or 2.7 Current to Change State II V 3.0 3.0 Bushold Input Over-Drive V 3.6 10 A VI = 5.5V 3.6 1 A VI = 0V or VCC -5 A VI = 0V 1 A VI = VCC 100 A 3.6 0 0V VI or VO 5.5V VO = 0.5V to 3.0V 0-1.5V 100 A IOZL 3-STATE Output Leakage Current 3.6 -5 A VO = 0.0V IOZH 3-STATE Output Leakage Current 3.6 5 A VO = 3.6V IOZH+ 3-STATE Output Leakage Current 3.6 10 A VCC < V O 5.5V Output Current www.fairchildsemi.com 4 VI = GND or VCC Preliminary Symbol 74LVTH32952 DC Electrical Characteristics (Continued) T A = -40C to +85C VCC Parameter (V) Min Units Conditions Max ICCH Power Supply Current VCC1 or VCC2 3.6 0.19 mA Outputs High ICCL Power Supply Current VCC1 or VCC2 3.6 5 mA Outputs Low ICCZ Power Supply Current VCC1 or VCC2 3.6 0.19 mA Outputs Disabled ICCZ+ Power Supply Current VCC1 or VCC2 3.6 0.19 mA VCC VO 5.5V, ICC Increase in Power Supply Current Outputs Disabled VCC1 or VCC2 (Note 7) 3.6 0.2 One Input at VCC - 0.6V mA Other Inputs at VCC or GND Note 5: An external driver must source at least the specified current to switch from LOW-to-HIGH. Note 6: An external driver must sink at least the specified current to switch from HIGH-to-LOW. Note 7: This is the increase in supply current for each input that is at the specified voltage level rather than VCC or GND. Dynamic Switching Characteristics Symbol (Note 8) TA = 25C VCC Parameter (V) Min Typ Max Conditions Units CL = 50 pF, RL = 500 VOLP Quiet Output Maximum Dynamic VOL 3.3 0.8 V (Note 9) VOLV Quiet Output Minimum Dynamic VOL 3.3 -0.8 V (Note 9) Note 8: Characterized in SSOP package. Guaranteed parameter, but not tested. Note 9: Max number of outputs defined as (n). n-1 data inputs are driven 0V to 3V. Output under test held LOW. AC Electrical Characteristics TA = -40C to +85C Symbol CL = 50 pF, RL = 500 Parameter VCC = 3.3 0.3V Min Max Min Max fMAX Maximum Clock Frequency 150 tPLH Propagation Delay 1.3 4.4 1.3 4.7 tPHL CPBA or CPAB to A or B 1.3 4.8 1.3 5.0 tPZH Output Enable Time 1.0 4.3 1.0 4.9 1.0 4.8 1.0 5.7 tPZL OE to A or B Units VCC = 2.7V 150 MHz tPHZ Output Disable Time 2.1 5.7 2.1 6.2 tPLZ OE to A or B 2.1 5.1 2.1 5.3 tW Pulse Width, CPAB or CPBA HIGH or LOW 3.3 3.3 tS Setup Time A or B before CPAB or CPBA 1.7 2.5 CEA or CEB before CPAB or CPBA 2.0 2.8 A or B after CPAB or CPBA 0.8 0.0 CEA or CEB after CPAB or CPBA 0.4 0.0 ns ns ns ns ns tH Hold Time ns Capacitance (Note 10) Typical Units CIN Symbol Input Capacitance Parameter VCC = OPEN, VI = 0V or VCC Conditions 4 pF CI/O Input/Output Capacitance VCC = 3.0V, VO = 0V or VCC 8 pF Note 10: Capacitance is measured at frequency f = 1 MHz, per MIL-STD-883, Method 3012. 5 www.fairchildsemi.com 74LVTH32952 Low Voltage 32-Bit Registered Transceiver with 3-STATE Outputs (Preliminary) Preliminary Physical Dimensions inches (millimeters) unless otherwise noted 114-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Package Number BGA114A Preliminary Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 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