USAR DATA BOOK 1994
product specifications
UR6HCPCS
129
Keyboard Input Port
The UR6HCPCS provides a fully
functional keyboard controller (8042)
emulation port. Keyboard-compatible
devices connected to this port will
receive all the signals, commands and
responses as if they were connected to
a PS/2-compatible system. Furthermore,
when the UR6HCPCS is set in the ASCII
mode, it will perform all the BIOS
functions necessary to interface the
input device all the way up to the
application level. If, for example, the
user presses the Num Lock key, the IC
will set the NumLock LED properly and
will start interpreting scan codes into
their capital ASCII equivalent.
Communication with the keyboard-
compatible device is achieved through
the EKC, EKC1 and EKD Lines.
EKC and EKC1 are both connected to
the Clock Line of the keyboard-
compatible device. EKD is connected to
the Data Line.
Upon power-on, the UR6HCPCS will set
the keyboard to the default Scan Code
Set 2, which is the most widely
supported mode for AT keyboards.
Output Modes
The UR6HCPS provides two output
modes: Strobed Parallel and Serial.
Data from the keyboard-compatible
device is presented simultaneously on
both the parallel and the serial output
ports. The serial port also supports
bidirectional communication between
the host system and the keyboard.
Parallel Output Mode
In this mode the UR6HCPCS provides a
Strobed Parallel Output of the equivalent
ASCII data input entered from the
keyboard-compatible device. The DR
Output Line provides an active low
signal to the host whenever new data is
present on the output port. The host
system can disable the DR line by
holding the PINH line low. For parallel
output, RTS and CTS should be tied
together.
Pin Description
Pin Number
Mnemonic DIP PLCC TYPE NAME AND FUNCTION
Vcc 40 44 I PPoowweerr SSuuppppllyy::+5V.
Vss 20 22 I GGrroouunndd
OSCI 39 43 I OOsscciillllaattoorr IInnppuutt//OOuuttppuutt::these pins
OSCO 38 42 O provide input for an on-chip clock
oscillator circuit. A 4MHZ crystal or
ceramic resonator or an external signal
(OSCI) connects to these pins providing
the converter clock.
RST 1 1 I RReesseett::used to reset the converter to the
default start-up state. The reset signal is
active low.
EKC 9 10 I/O These three open collector bidirectional
EKC1 37 41 I/O pins implement the electrical interface
EKD 10 11 I/O with the keyboard-compatible device.
EKD is connected to the Data Line, while
both EKC and EKC1 are connected to
the Clock Line of the keyboard
compatible device.
TxD 30 33 I/O These four pins implement the RS232
RxD 29 32 I/O Protocol. TxD and RxD are used to
CTS 28 31 O Transmit data in an NRZ format.
RTS 31 34 I CTS (Clear to Send) is an output pin.
When it is high, data can be transferred
to the converter from the host. RTS
(Request to Send) is an active low signal
input. A high level on this pin prohibits
the converter from sending data to the
host.
SW0 21 24 RReesseerrvveedd::for future applications.
SW1-SW5 22-26 25-29 I The SW1-SW3 input pins are used to
select the baud rate of the serial
transmission. SW4 input selects Pass-
Through or ASCII Ttranslation Mode.
SW5 determines whether keys will be
repeating or not.
PD0-PD4 12-16 13-17 O These seven output lines comprise the
PD5-PD7 17-19 19-21 Parallel Output Port.
DR 11 12 O DDaattaa RReeaaddyy::an active low output pin that
is sued to signal the host system when
new data is present on the Parallel
Output Port.
PINH 4 5 I An active low input pin that can be used
to inhibit the DR Line from going low,
disabling communications for both serial
and parallel port.
ID1-ID4 32-34, 35-37, I DDeevviiccee iiddeennttiittyy ppiinnss::reserved.