Sample & Buy Product Folder Technical Documents Support & Community Tools & Software LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 LM3410, LM3410-Q1 525-kHz and 1.6-MHz, Constant-Current Boost and SEPIC LED Driver With Internal Compensation 1 Features 3 Description * * The LM3410 and LM3410-Q1 constant current LED driver are a monolithic, high frequency, PWM DC-DC converter, available in 6-pin WSON, 8-pin MSOPPowerPadTM, and 5-pin SOT-23 packages. With a minimum of external components the LM3410 and LM3410-Q1 are easy to use. It can drive 2.8-A (typical) peak currents with an internal 170-m NMOS switch. Switching frequency is internally set to either 525 kHz or 1.6 MHz, allowing the use of extremely small surface mount inductors and chip capacitors. Even though the operating frequency is high, efficiencies up to 88% are easy to achieve. External shutdown is included, featuring an ultra-low standby current of 80 nA. The LM3410 and LM3410Q1 use current-mode control and internal compensation to provide high-performance over a wide range of operating conditions. Additional features include PWM dimming, cycle-by-cycle current limit, and thermal shutdown. 1 * * * * * * * * * * Qualified for Automotive Applications AEC-Q100 Test Guidance With the Following: - Device Temperature Grade 1: -40C to 125C Ambient Operating Temperature Range - Device HBM ESD Classification Level 2 - Device CDM ESD Classification Level C6 Space-Saving SOT-23 and WSON Packages Input Voltage From 2.7 V to 5.5 V Output Voltage From 3 V to 24 V 2.8-A (Typical) Switch Current Limit High Switching Frequency - 525 KHz (LM3410Y) - 1.6 MHz (LM3410X) 170-m NMOS Switch 190-mV Internal Voltage Reference Internal Soft Start Current-Mode, PWM Operation Thermal Shutdown PART NUMBER LM3410, LM3410Q 2 Applications * * * * * Device Information(1) LED Backlight Current Sources LiIon Backlight OLED and HB LED Drivers Handheld Devices LED Flash Drivers Automotive Applications BODY SIZE (NOM) 3.00 mm x 3.00 mm MSOP-PowerPAD (8) 2.90 mm x 1.60 mm SOT-23 (5) 3.00 mm x 3.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Typical Boost Application Circuit L1 PACKAGE WSON (6) Typical Efficiency (LM3410X) D1 DIMM 4 DIM 5 C1 VIN L M3410 VIN 3 FB 2 GND 1 LEDs C2 SW R1 Copyright (c) 2016, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 4 4 4 4 5 6 Detailed Description .............................................. 8 7.1 7.2 7.3 7.4 8 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Overview ................................................................... 8 Functional Block Diagram ....................................... 10 Feature Description................................................. 10 Device Functional Modes........................................ 10 Application and Implementation ........................ 11 8.1 Application Information............................................ 11 8.2 Typical Applications ................................................ 19 9 Power Supply Recommendations...................... 31 10 Layout................................................................... 32 10.1 Layout Guidelines ................................................. 32 10.2 Layout Examples................................................... 32 10.3 Thermal Considerations ........................................ 33 11 Device and Documentation Support ................. 40 11.1 11.2 11.3 11.4 11.5 11.6 11.7 11.8 Device Support...................................................... Documentation Support ........................................ Related Links ........................................................ Receiving Notification of Documentation Updates Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 40 41 41 41 41 41 41 41 12 Mechanical, Packaging, and Orderable Information ........................................................... 42 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision G (April 2013) to Revision H Page * Added Device Information table, ESD Ratings table, Thermal Information table, Detailed Description section, Feature Description section, Device Functional Modes section, Application and Implementation section, Typical Application section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section.............................................................................. 1 * Added AEC-Q100 Test Guidance bullets to Features............................................................................................................ 1 * Changed RJA value for NGG package from 80C/W : to 55.3C/W ...................................................................................... 4 * Changed RJA value for DGN package from 80C/W : to 53.7C/W ...................................................................................... 4 * Changed RJA value for DBV package from 118C/W : to 164.2C/W ................................................................................... 4 * Changed RJC(top) value for NGG package from 18C/W : to 65.9C/W ................................................................................. 4 * Changed RJC(top) value for DGN package from 18C/W : to 61.4C/W ................................................................................. 4 * Changed RJC(top) value for DBV package from 60C/W : to 115.3C/W ................................................................................ 4 Changes from Revision F (May 2013) to Revision G * 2 Page Changed layout of National Semiconductor Data Sheet to TI format .................................................................................... 1 Submit Documentation Feedback Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 5 Pin Configuration and Functions NGG Package 6-Pin WSON Top View PGND 1 VIN 2 DIM 3 DAP DGN Package 8-Pin MSOP-PowerPad Top View 6 SW 5 AGND 4 FB NC 1 PGND 2 8 NC 7 SW DAP VIN 3 6 AGND DIM 4 5 FB Not to scale Not to scale DBV Package 5-Pin SOT-23 Top View SW 1 GND 2 FB 3 5 VIN 4 DIM Not to scale Pin Functions PIN I/O DESCRIPTION -- -- Signal ground pin. Place the bottom resistor of the feedback network as close as possible to this pin and FB. 4 4 I Dimming and shutdown control input. Logic high enables operation. Duty Cycle from 0% to 100%. Do not allow this pin to float or be greater than VIN + 0.3 V. 4 5 3 I Feedback pin. Connect FB to external resistor to set output current. DAP DAP -- -- Die attach pad. Signal and Power ground. Connect to PGND and AGND on top layer. Place 4 to 6 vias from DAP to bottom layer GND plane. -- -- 2 -- Signal and power ground pin. Place the bottom resistor of the feedback network as close as possible to this pin. NC -- 1, 8 -- -- No connection PGND 1 2 -- -- Power ground pin. Place PGND and output capacitor GND close together. SW 6 7 1 O Output switch. Connect to the inductor, output diode. VIN 2 3 5 I Supply voltage pin for power stage, and input supply voltage. NAME WSON MSOPPowerPAD SOT-23 AGND 5 6 DIM 3 FB GND Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 3 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) Input voltage Operating juction temperature MIN MAX VIN -0.5 7 SW -0.5 26.5 FB -0.5 3 DIM -0.5 7 (3) , TJ Storage temperature, Tstg (1) (2) (3) -65 UNIT V 150 C 150 C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. Thermal shutdown occurs if the junction temperature exceeds the maximum junction temperature of the device. 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) 2000 Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) 1000 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) VIN MAX 2.7 5.5 V 0 VIN V 3 24 V -40 125 C 400 mW (1) VDIM DIM control input VSW Switch output TJ Operating junction temperature Power dissipation (Internal) (1) MIN Input voltage SOT-23 UNIT Do not allow this pin to float or be greater than VIN + 0.3 V. 6.4 Thermal Information LM3410, LM3410-Q1 NGG (WSON) DGN (MSOPPowerPAD) DBV (SOT-23) 6 PINS 8 PINS 5 PINS 55.3 53.7 164.2 C/W RJC(top) Junction-to-case (top) thermal resistance 65.9 61.4 115.3 C/W RJB Junction-to-board thermal resistance 29.6 37.3 27 C/W JT Junction-to-top characterization parameter 1.1 7.1 12.8 C/W JB Junction-to-board characterization parameter 29.7 37 26.5 C/W RJC(bot) Junction-to-case (bottom) thermal resistance 9.3 6.8 -- C/W THERMAL METRIC (1) RJA (1) 4 Junction-to-ambient thermal resistance 0 LFPM Air Flow UNIT For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Documentation Feedback Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 6.5 Electrical Characteristics Typical values apply for TJ = 25C; Minimum and maximum limits apply for TJ = -40C to 125C and VIN = 5 V (unless otherwise noted). Typical values represent the most likely parametric norm at TJ = 25C, and are provided for reference purposes only. PARAMETER TEST CONDITIONS VFB Feedback voltage VFB/VIN Feedback voltage line regulation IFB Feedback input bias current fSW Switching frequency DMAX Maximum duty cycle DMIN Minimum duty cycle RDS(ON) Switch on resistance ICL Switch current limit SU Start-up time VDIM_H 0.06 0.1 1 1200 1600 2000 LM3410Y 360 525 680 LM3410X 88% 92% LM3410Y 90% 95% LM3410X 5% LM3410Y 2% MSOP and SOT-23 170 330 WSON 190 350 2.8 Undervoltage lockout 11 LM3410Y, VFB = 0.25 V 3.4 7 80 2.3 VIN falling 1.7 0.4 Enable threshold voltage 1.8 Switch leakage VSW = 24 V Dimming pin current Sink and source Thermal shutdown temperature (1) kHz m mA nA 2.65 1.9 Shutdown threshold voltage A s 7 VIN rising mV A LM3410X, VFB = 0.25 V All versions, VDIM = 0 V UNIT %/V LM3410X IDIM (1) 202 VIN = 2.7 V to 5.5 V ISW TSD MAX 190 20 Quiescent current (shutdown) UVLO TYP 178 2.1 Quiescent current (switching) IQ MIN V V 1 A 100 nA 165 C Thermal shutdown occurs if the junction temperature exceeds the maximum junction temperature of the device. Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 5 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com 6.6 Typical Characteristics All curves taken at VIN = 5 V with the 50-mA boost configuration shown in Figure 18. TJ = 25C, unless otherwise specified. RSET = 4 Figure 1. LM3410X Efficiency vs VIN 500-Hz DIM Frequency 6 Figure 2. LM3410X Start-Up Signature D = 50% Figure 3. Four 3.3-V LEDs Figure 4. DIM Frequency and Duty Cycle vs Average ILED Figure 5. Current Limit vs Temperature Figure 6. RDS(ON) vs Temperature Submit Documentation Feedback Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 Typical Characteristics (continued) All curves taken at VIN = 5 V with the 50-mA boost configuration shown in Figure 18. TJ = 25C, unless otherwise specified. LM3410X LM3410Y Figure 7. Oscillator Frequency vs Temperature Figure 8. Oscillator Frequency vs Temperature Figure 9. VFB vs Temperature Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 7 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com 7 Detailed Description 7.1 Overview The LM3410 and LM3410-Q1 are a constant frequency PWM, boost regulator IC. It delivers a minimum of 2.1-A peak switch current. The device operates very similar to a voltage regulated boost converter except that the device regulates the output current that passes through LEDs. The current magnitude is set with a series resistor. The converter regulates to the feedback voltage (190 mV) created by the multiplication of the series resistor and the LED current. The regulator has a preset switching frequency of either 525 kHz or 1.6 MHz. This high frequency allows the LM3410 or LM3410-Q1 to operate with small surface mount capacitors and inductors, resulting in a DC-DC converter that requires a minimum amount of board space. The LM3410 and LM3410-Q1 are internally compensated and requires few external components, making usage simple. The LM3410 and LM3410-Q1 use current-mode control to regulate the LED current. The LM3410 and LM3410-Q1 supply a regulated LED current by switching the internal NMOS control switch at constant frequency and variable duty cycle. A switching cycle begins at the falling edge of the reset pulse generated by the internal oscillator. When this pulse goes low, the output control logic turns on the internal NMOS control switch. During this ON time, the SW pin voltage (VSW) decreases to approximately GND, and the inductor current (IL) increases with a linear slope. IL is measured by the current sense amplifier, which generates an output proportional to the switch current. The sensed signal is summed with the regulator's corrective ramp and compared to the error amplifier's output, which is proportional to the difference between the feedback voltage and reference voltage (VREF). When the PWM comparator output goes high, the output switch turns off until the next switching cycle begins. During the switch OFF time, inductor current discharges through diode D1, which forces the SW pin to swing to the output voltage plus the forward voltage (VD) of the diode. The regulator loop adjusts the duty cycle (D) to maintain a regulated LED current. IL L1 Q1 VIN Control VO D1 IC + VSW C 1 I LED Figure 10. Simplified Boost Topology Schematic 8 Submit Documentation Feedback Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 Overview (continued) V OUT + VD Vsw ( t) t VIN VL(t) t VIN - VOUT - VD IL (t) iL t I DIODE(t) t ( iL - - iOUT ) I Capacitor(t) t - i OUT 'v VOUT(t) DTS TS Figure 11. Typical Waveforms Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 9 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com 7.2 Functional Block Diagram DIM VIN ThermalSHDN Control Logic + Ramp Artificial UVLO=2.3V Oscillator + - cv 1. 6 MHz + S R SW + NMOS + R Q - VFB + VREF = 190 mV Internal Compensation ILIMIT ISENSE + GND Copyright (c) 2016, Texas Instruments Incorporated 7.3 Feature Description 7.3.1 Current Limit The LM3410 and LM3410-Q1 use cycle-by-cycle current limiting to protect the internal NMOS switch. This current limit does not protect the output from excessive current during an output short circuit. The input supply is connected to the output by the series connection of an inductor and a diode. If a short circuit is placed on the output, excessive current can damage both the inductor and diode. 7.3.2 DIM Pin and Shutdown Mode The average LED current can be controlled using a PWM signal on the DIM pin. The duty cycle can be varied from 0 to 100%, to either increase or decrease LED brightness. PWM frequencies from 1 Hz to 25 kHz can be used. For controlling LED currents down to the A levels, it is best to use a PWM signal frequency from 200 to 1 kHz. The maximum LED current would be achieved using a 100% duty cycle, that is the DIM pin always high. 7.4 Device Functional Modes 7.4.1 Thermal Shutdown Thermal shutdown limits total power dissipation by turning off the output switch when the IC junction temperature exceeds 165C. After thermal shutdown occurs, the output switch does not turn on until the junction temperature drops to approximately 150C. 10 Submit Documentation Feedback Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information 8.1.1 Boost Converter 8.1.1.1 Setting the LED Current I LED V FB R SET Figure 12. Setting ILED The LED current is set using the following equation: VFB R SET = ILED where * RSET is connected between the FB pin and GND. (1) 8.1.1.2 LED-Drive Capability When using the LM3410 or LM3410-Q1 in the typical application configuration, with LEDs stacked in series between the VOUT and FB pin, the maximum number of LEDs that can be placed in series is dependent on the maximum LED forward voltage (VFMAX). (VFMAX x NLEDs) + 190 mV < 24 V (2) When inserting a value for maximum VFMAX the LED forward voltage variation over the operating temperature range must be considered. 8.1.1.3 Inductor Selection The inductor value determines the input ripple current. Lower inductor values decrease the physical size of the inductor, but increase the input ripple current. An increase in the inductor value decreases the input ripple current. Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 11 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com Application Information (continued) 'i L I L (t) iL VIN L VIN - VOUT L DTS TS t Figure 13. Inductor Current 2'iL VIN * = DTS (c) L VIN * x DTS 'iL = (c) 2L (3) The Duty Cycle (D) for a Boost converter can be approximated by using the ratio of output voltage (VOUT) to input voltage (VIN). 1 *= 1 = 1 - D Dc VOUT VIN (c) (4) Therefore: VOUT - VIN D= VOUT (5) Power losses due to the diode (D1) forward voltage drop, the voltage drop across the internal NMOS switch, the voltage drop across the inductor resistance (RDCR) and switching losses must be included to calculate a more accurate duty cycle (see Calculating Efficiency and Junction Temperature for a detailed explanation). A more accurate formula for calculating the conversion ratio is: V OUT V IN = K ' where * equals the efficiency of the device application. (6) Or: K 12 VOUT u ILED VIN u IIN Submit Documentation Feedback (7) Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 Application Information (continued) Therefore: VOUT KVIN VOUT D (8) Inductor ripple in a LED driver circuit can be greater than what would normally be allowed in a voltage regulator Boost and Sepic design. A good design practice is to allow the inductor to produce 20% to 50% ripple of maximum load. The increased ripple is unlikely to be a problem when illuminating LEDs. From the previous equations, the inductor value is then obtained. VIN * L = x DTS (c)2'iL where * 1 / TS = fSW (9) Ensure that the minimum current limit (2.1 A) is not exceeded, so the peak current in the inductor must be calculated. The peak current (Lpk I) in the inductor is calculated by Equation 10: ILpk = IIN + IL or ILpk = IOUT /D' + iL (10) When selecting an inductor, make sure that it is capable of supporting the peak input current without saturating. Inductor saturation results in a sudden reduction in inductance and prevent the regulator from operating correctly. Because of the speed of the internal current limit, the peak current of the inductor only needs to be specified for the required maximum input current. For example, if the designed maximum input current is 1.5 A and the peak current is 1.75 A, then the inductor must be specified with a saturation current limit of >1.75 A. There is no need to specify the saturation or peak current of the inductor at the 2.8-A typical switch current limit. Because of the operating frequency of the LM3410 and LM3410-Q1, ferrite based inductors are preferred to minimize core losses. This presents little restriction because the variety of ferrite-based inductors is huge. Lastly, inductors with lower series resistance (DCR) provides better operating efficiency. For recommended inductor value examples, see Typical Applications. 8.1.1.4 Input Capacitor An input capacitor is necessary to ensure that VIN does not drop excessively during switching transients. The primary specifications of the input capacitor are capacitance, voltage, RMS current rating, and ESL (Equivalent Series Inductance). TI recommens an input capacitance from 2.2 F to 22 F depending on the application. The capacitor manufacturer specifically states the input voltage rating. Make sure to check any recommended deratings and also verify if there is any significant change in capacitance at the operating input voltage and the operating temperature. The ESL of an input capacitor is usually determined by the effective cross sectional area of the current path. At the operating frequencies of the LM3410 and LM3410-Q1, certain capacitors may have an ESL so large that the resulting impedance (2fL) is higher than that required to provide stable operation. As a result, TI recommends surface mount capacitors. Multilayer ceramic capacitors (MLCC) are good choices for both input and output capacitors and have very low ESL. For MLCCs TI recommends use of X7R or X5R dielectrics. Consult the capacitor manufacturer's datasheet for rated capacitance variation over operating conditions. 8.1.1.5 Output Capacitor The LM3410 and LM3410-Q1 operate at frequencies allowing the use of ceramic output capacitors without compromising transient response. Ceramic capacitors allow higher inductor ripple without significantly increasing output ripple. The output capacitor is selected based upon the desired output ripple and transient response. The initial current of a load transient is provided mainly by the output capacitor. The output impedance therefore determines the maximum voltage perturbation. The output ripple of the converter is a function of the capacitor's reactance and its equivalent series resistance (ESR) (see Equation 11). Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 13 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com Application Information (continued) 'V OUT = 'iL x RESR + (c) V OUT x D * 2 x fSW x ROUT x COUT (11) When using MLCCs, the ESR is typically so low that the capacitive ripple may dominate. When this occurs, the output ripple is approximately sinusoidal and 90 phase shifted from the switching action. Given the availability and quality of MLCCs and the expected output voltage of designs using the LM3410 or LM3410-Q1, there no need to review any other capacitor technologies. Another benefit of ceramic capacitors is their ability to bypass high frequency noise. A certain amount of switching edge noise couples through parasitic capacitances in the inductor to the output. A ceramic capacitor bypasses this noise while a tantalum does not. Because the output capacitor is one of the two external components that control the stability of the regulator control loop, most applications requires a minimum at 0.47 F of output capacitance. Like the input capacitor, TI recommends X7R or X5R as multilayer ceramic capacitors. Again, verify actual capacitance at the desired operating voltage and temperature. 8.1.1.6 Diode The diode (D1) conducts during the switch off time. TI recommends Schottky diode for its fast switching times and low forward voltage drop. The diode must be chosen so that its current rating is greater than: ID1 IOUT (12) The reverse breakdown rating of the diode must be at least the maximum output voltage plus appropriate margin. 8.1.1.7 Output Overvoltage Protection A simple circuit consisting of an external Zener diode can be implemented to protect the output and the LM3410 or LM3410-Q1 device from an overvoltage fault condition. If an LED fails open, or is connected backwards, an output open circuit condition occurs. No current is conducted through the LEDs, and the feedback node equals zero volts. The LM3410 or LM3410-Q1 reacts to this fault by increasing the duty cycle, thinking the LED current has dropped. A simple circuit that protects the device is shown in Figure 14. Zener diode D2 and resistor R3 is placed from VOUT in parallel with the string of LEDs. If the output voltage exceeds the breakdown voltage of the Zener diode, current is drawn through the Zener diode, R3 and sense resistor R1. Once the voltage across R1 and R3 equals the feedback voltage of 190 mV, the LM3410 and LM3410-Q1 limits their duty cycle. No damage occurs to the device, the LEDs, or the Zener diode. Once the fault is corrected, the application will work as intended. 14 Submit Documentation Feedback Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 Application Information (continued) V SW D1 LEDs O V P D2 C2 R3 V FB R1 Figure 14. Overvoltage Protection Circuit 8.1.2 SEPIC Converter The LM3410 or LM3410-Q1 can easily be converted into a SEPIC converter. A SEPIC converter has the ability to regulate an output voltage that is either larger or smaller in magnitude than the input voltage. Other converters have this ability as well (CUK and Buck-Boost), but usually create an output voltage that is opposite in polarity to the input voltage. This topology is a perfect fit for Lithium Ion battery applications where the input voltage for a single cell Li-Ion battery varies from 2.7 V to 4.5 V and the output voltage is somewhere in between. Most of the analysis of the LM3410 Boost Converter is applicable to the LM3410 SEPIC Converter. Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 15 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com Application Information (continued) V IN L1 C1 LM 3410 1 6 2 5 3 4 VO D1 C3 C2 L2 HB / OLED R2 R1 Copyright (c) 2016, Texas Instruments Incorporated Figure 15. HB or OLED SEPIC Converter Schematic 8.1.2.1 SEPIC Equations SEPIC Conversion ratio without loss elements: VOUT VIN = D ' (13) Therefore: D= VOUT VOUT + VIN (14) Small ripple approximation: In a well-designed SEPIC converter, the output voltage, and input voltage ripple, the inductor ripple IL1 and IL2 is small in comparison to the DC magnitude. Therefore it is a safe approximation to assume a DC value for these components. The main objective of the Steady State Analysis is to determine the steady state duty cycle, voltage and current stresses on all components, and proper values for all components. In a steady-state converter, the net volt-seconds across an inductor after one cycle equals zero. Also, the charge into a capacitor equals the charge out of a capacitor in one cycle. Therefore: IL2 IL2 16 D' * u IL1 (c)D and D* ' u ILED (c)D Submit Documentation Feedback (15) Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 Application Information (continued) Substituting IL1 into IL2 IL2 = ILED (16) The average inductor current of L2 is the average output load. VL(t ) AREA 1 t (s) AREA 2 DTS TS Figure 16. Inductor Volt-Second Balance Waveform Applying Charge balance on C1: VC3 = D'( VOUT) D (17) Because there are no DC voltages across either inductor, and capacitor C3 is connected to Vin through L1 at one end, or to ground through L2 on the other end, we can say that VC3 = VIN (18) Therefore: VIN = D'( VOUT) D (19) This verifies the original conversion ratio equation. It is important to remember that the internal switch current is equal to IL1 and IL2 during the D interval. Design the converter so that the minimum ensured peak switch current limit (2.1 A) is not exceeded. Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 17 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com Application Information (continued) 8.1.2.2 Steady State Analysis with Loss Elements - iL1(t) v () C1 t + i i sw iD1(t) vD1(t) L 2 (t) VIN iC 2(t) - + RL1 i C1( t ) + L1(t) vL2(t ) + vC2(t) - Ron vO(t) - v + RL 2 Copyright (c) 2016, Texas Instruments Incorporated Figure 17. SEPIC Simplified Schematic 8.1.2.2.1 Details Using inductor volt-second balance and capacitor charge balance, the following equations are derived: IL2 = (ILED) (20) IL1 = (ILED) x (D/D') (21) and VOUT VIN * 1 D * = ' 2* * (c) D 1+ VD + R L2 * + D RON * + D RL1* (c) VOUT R '2 (c) R ' 2 (c) R (c)D (c)D (c) ROUT = (22) VOUT ILED (23) Therefore: * 1 K= 2 * * * 1+ VD + R L2 + D R ON * + D R L1 * 2 2 (c) VOUT ROUT D' (c)ROUT D' (c)R OUT (c) (c) (c) (24) All variables are known except for the duty cycle (D). A quadratic equation is needed to solve for D. A less accurate method of determining the duty cycle is to assume efficiency, and calculate the duty cycle. VOUT VIN 18 = D *xK 1 - D (c) Submit Documentation Feedback (25) Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 Application Information (continued) VOUT * D= (VIN x K) + VOUT (c) (26) Table 1. Efficiencies for Typical SEPIC Applications EXAMPLE 1 EXAMPLE 2 EXAMPLE 3 VIN 2.7 V VIN 3.3 V VIN 5V VOUT 3.1 V VOUT 3.1 V VOUT 3.1 V IIN 770 mA IIN 600 mA IIN 375 mA ILED 500 mA ILED 500 mA ILED 500 mA 75% 80% 83% 8.2 Typical Applications 8.2.1 Low Input Voltage, 1.6-MHz, 3 to 5 White LED Output at 50-mA Boost Converter L1 D1 DIMM 4 DIM L M3410 VIN 5 VIN C1 3 FB 2 GND 1 LEDs C2 SW R1 Copyright (c) 2016, Texas Instruments Incorporated Figure 18. Boost Schematic 8.2.1.1 Design Requirements For this design example, use the parameters listed in Table 2 as the input parameters. Table 2. Design Parameters PARAMETER EXAMPLE VALUE VIN 2.7 V to 5.5 V ILED 50 mA VOUT 14.6 V (four 3.6-V LEDs in series plus 190 mV) RD 8 (dynamic resistance of 4 LEDs in series) ILp-p 100 mA (maximum) VOUTp-p 250 mV (maximum) 8.2.1.2 Detailed Design Procedure This design procedure uses the worst-case minimum input voltage and a nominal 4 LED series load for calculations. 8.2.1.2.1 Set the LED Current (R1) Rearranging the LED current equation the current sense resistor R1 can be found using Equation 27. Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 19 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 R1 = www.ti.com VFB 190mV = ILED 50mA (27) 3.8 is not a standard value so a standard value of R1 = 3.83 is chosen. 8.2.1.2.2 Calculate Maximum Duty Cycle (DMAX) The maximum duty cycle is required for calculating the inductor value and the minimum output capacitance. Assuming an approximate conversion efficiency () of 90% DMAX is calculated using Equation 28. DMAX = VOUT - x VIN(min) 14.6V - 0.9 x 2.7V = = 0.834 VOUT 14.6V (28) 8.2.1.2.3 Calculate the Inductor Value (L1) Using the maximum duty cycle, the minimum input voltage, and the maximum inductor ripple current (iLp-p) the minimum inductor value to achieve the maximum ripple current is calculated using Equation 29. VIN(min) x DMAX x TS 2.7V x 0.834 x 625ns L1 = F p G = l 2 x 100mA 2 x iL-PP H (29) To ensure the maximum inductor ripple current requirement is met with a 20% inductor tolerance an inductor value of L1 = 10 H is selected. 8.2.1.2.4 Calculate the Output Capacitor (C2) To maintain a maximum of 250-mV output voltage ripple the dynamic resistance of the LED stack (RD) must be used. Assuming a ceramic capacitor is used so the ESR can be neglected this minimum amount of capacitance can be found using Equation 30. C2 * VOUT x DMAX 14.6V x 0.834 = = 2 x fSW x RD x VOUT 2 x 1.6MHz x x 14.6V F (30) 1.9 F is not a standard value so a value of C2 = 2.2 F is selected. 8.2.1.2.5 Input Capacitor (C1) and Schottky Diode (D1) TI recommends an input capacitor from 2.2 F to 22 F. This is a relatively low power design optimized for a small footprint. For a good balance of input filtering and small size a 6.3-V capacitor with a value of C1 = 10 F is selected. The output voltage with a 5 LED load is over 18 V and the reverse voltage of the schottky diode must be greater than this voltage. To give some headroom to avoid reverse breakdown and to maintain small size and reliability the diode selected is D1 = 30 V, 500 mA. 20 Submit Documentation Feedback Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 8.2.1.3 Application Curves Figure 20. PWM Dimming Figure 19. Efficiency versus Input Voltage 8.2.2 LM3410X SOT-23: 5 x 1206 Series LED String Application D1 L1 LEDs VIN LM3410 DIMM C1 4 3 2 R2 5 C2 1 R1 Copyright (c) 2016, Texas Instruments Incorporated Figure 21. LM3410X (1.6 MHz) 5 x 3.3-V LED String Application Diagram 8.2.2.1 Design Requirements For this design example, use the parameters listed in Table 3 as the input parameters. Table 3. Design Parameters PARAMETER EXAMPLE VALUE VIN 2.7 V to 5.5 V ILED 50 mA VOUT 16.5 V (five 3.3-V LEDs in series) Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 21 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com Table 4. Part Values PART VALUE U1 2.8-A ISW LED Driver C1, Input capacitor 10 F, 6.3 V, X5R C2, Output capacitor 2.2 F, 25 V, X5R D1, Catch diode 0.4-Vf Schottky 500 mA, 30 VR L1 10 H, 1.2 A R1 4.02 , 1% R2 100 k, 1% LEDs SMD-1206, 50 mA, Vf 3.6 V 8.2.3 LM3410Y SOT-23: 5 x 1206 Series LED String Application D1 L1 LEDs VIN LM3410 DIMM C1 4 3 2 R2 5 C2 1 R1 Copyright (c) 2016, Texas Instruments Incorporated Figure 22. LM3410Y (525 kHz) 5 x 3.3-V LED String Application Diagram 8.2.3.1 Design Requirements For this design example, use the parameters listed in Table 5 as the input parameters. Table 5. Design Parameters PARAMETER EXAMPLE VALUE VIN 2.7 V to 5.5 V ILED 50 mA VOUT 16.5 V (five 3.3-V LEDs in series) Table 6. Part Values PART 22 VALUE U1 2.8-A ISW LED Driver C1, Input capacitor 10 F, 6.3 V, X5R C2, Output capacitor 2.2 F, 25 V, X5R D1, Catch diode 0.4-Vf Schottky 500 mA, 30 VR L1 15 H, 1.2 A R1 4.02 , 1% R2 100 k, 1% LEDs SMD-1206, 50 mA, Vf 3.6 V Submit Documentation Feedback Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 8.2.4 LM3410X WSON: 7 x 5 LED Strings Backlighting Application L1 LEDs D1 VIN LM3410 C1 R2 DIMM 1 6 2 5 3 4 ILED C2 ISET R1 Copyright (c) 2016, Texas Instruments Incorporated Figure 23. LM3410X (1.6 MHz) 7 x 5 x 3.3-V LEDs Backlighting Application Diagram 8.2.4.1 Design Requirements For this design example, use the parameters listed in Table 7 as the input parameters. Table 7. Design Parameters PARAMETER EXAMPLE VALUE VIN 2.7 V to 5.5 V ILED 25 mA VOUT 16.7 V (seven strings of five 3.3-V LEDs in series) Table 8. Part Values PART VALUE U1 2.8-A ISW LED Driver C1, Input capacitor 10 F, 6.3 V, X5R C2, Output capacitor 4.7 F, 25 V, X5R D1, Catch Diode 0.4-Vf Schottky 500 mA, 30 VR L1 8.2 H, 2 A R1 1.15 , 1% R2 100 k, 1% LEDs SMD-1206, 50 mA, Vf 3.6 V Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 23 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com 8.2.5 LM3410X WSON: 3 x HB LED String Application L1 D1 VIN LM3410 C1 R2 DIMM 1 6 2 5 3 4 HB - LEDs C2 R3 R1 Copyright (c) 2016, Texas Instruments Incorporated Figure 24. LM3410X (1.6 MHz) 3 x 3.4-V LED String Application Diagram 8.2.5.1 Design Requirements For this design example, use the parameters listed in Table 9 as the input parameters. Table 9. Design Parameters PARAMETER EXAMPLE VALUE VIN 2.7 V to 5.5 V ILED 340 mA VOUT 11 V (three 3.4-V LEDs in series) Table 10. Part Values PART 24 VALUE U1 2.8-A ISW LED Driver C1, Input capacitor 10 F, 6.3 V, X5R C2, Output capacitor 2.2 F, 25 V, X5R D1, Catch diode 0.4-Vf Schottky 500 mA, 30 VR L1 10 H, 1.2 A R1 1 , 1% R2 100 k, 1% R3 1.5 , 1% HB - LEDs 340 mA, Vf 3.6 V Submit Documentation Feedback Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 8.2.6 LM3410Y SOT-23: 5 x 1206 Series LED String Application With OVP L1 LEDs D1 VIN DIMM LM3410 C1 OVP 4 R2 3 C2 2 5 D2 1 R3 R1 Copyright (c) 2016, Texas Instruments Incorporated Figure 25. LM3410Y (525 kHz) 5 x 3.3-V LED String Application With OVP Diagram 8.2.6.1 Design Requirements For this design example, use the parameters listed in Table 11 as the input parameters. Table 11. Design Parameters PARAMETER EXAMPLE VALUE VIN 2.7 V to 5.5 V ILED 50 mA VOUT 16.5 V (five 3.3-V LEDs in series) Table 12. Part Values PART VALUE U1 2.8-A ISW LED Driver C1, Input capacitor 10 F, 6.3 V, X5R C2, Output capacitor 2.2 F, 25 V, X5R D1, Catch diode 0.4-Vf Schottky 500 mA, 30 VR D2 18 V Zener diode L1 15 H, 0.7 A R1 4.02 , 1% R2 100 k, 1% R3 100 , 1% LEDs SMD-1206, 50 mA, Vf 3.6 V Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 25 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com 8.2.7 LM3410X SEPIC WSON: HB or OLED Illumination Application V IN L1 C1 LM 3410 1 6 2 5 3 4 VO D1 C3 C2 L2 HB / OLED R2 R1 Copyright (c) 2016, Texas Instruments Incorporated Figure 26. LM3410X (1.6 MHz) HB or OLED Illumination Application Diagram 8.2.7.1 Design Requirements For this design example, use the parameters listed in Table 13 as the input parameters. Table 13. Design Parameters PARAMETER EXAMPLE VALUE VIN 2.7 V to 5.5 V ILED 300 mA VOUT 3.8 V Table 14. Part Values PART 26 VALUE U1 2.8-A ISW LED Driver C1, Input capacitor 10 F, 6.3 V, X5R C2, Output capacitor 10 F, 6.3 V, X5R C3 2.2 F, 25 V, X5R D1, Catch diode 0.4-Vf Schottky 1 A, 20 VR L1 and L2 4.7 H, 3 A R1 665 m, 1% R2 100 k, 1% HB - LEDs 350 mA, Vf 3.6 V Submit Documentation Feedback Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 8.2.8 LM3410X WSON: Boost Flash Application VIN L1 C1 D1 VO LM3410 1 6 2 5 3 4 C2 LEDs FLASH CTRL R1 Copyright (c) 2016, Texas Instruments Incorporated Figure 27. LM3410X (1.6 MHz) Boost Flash Application Diagram 8.2.8.1 Design Requirements For this design example, use the parameters listed in Table 15 as the input parameters. Table 15. Design Parameters PARAMETER EXAMPLE VALUE VIN 2.7 V to 5.5 V ILED 1 A (pulse) VOUT 8 V Table 16. Part Values PART VALUE U1 2.8-A ISW LED Driver C1, Input capacitor 10 F, 6.3 V, X5R C2, Output capacitor 10 F, 16 V, X5R D1, Catch diode 0.4-Vf Schottky 500 mA, 30 VR L1 4.7 H, 3 A R1 200 m, 1% LEDs 500 mA, Vf 3.6 V, IPULSE = 1 A Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 27 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com 8.2.9 LM3410X SOT-23: 5 x 1206 Series LED String Application With VIN > 5.5 V D1 L1 LEDs V PWR LM3410 DIMM C1 R3 4 2 R2 5 D2 3 C2 1 C3 R1 Copyright (c) 2016, Texas Instruments Incorporated Figure 28. LM3410X (1.6 MHz) 5 x 1206 Series LED String Application With VIN > 5.5 V Diagram 8.2.9.1 Design Requirements For this design example, use the parameters listed in Table 17 as the input parameters. Table 17. Design Parameters PARAMETER EXAMPLE VALUE VPWR 9 V to 14 V ILED 50 mA VOUT 16.5 V (five 3.3-V LEDs in series) Table 18. Part Values PART 28 VALUE U1 2.8-A ISW LED Driver C1, Input VPWRcapacitor 10 F, 6.3 V, X5R C2, Output capacitor 2.2 F, 25 V, X5R C3, Input VIN capacitor 0.1 F, 6.3 V, X5R D1, Catch diode 0.43-Vf Schottky 500 mA, 30 VR D2 3.3 V Zener, SOT-23 L1 10 H, 1.2 A R1 4.02 , 1% R2 100 k, 1% R3 576 , 1% LEDs SMD-1206, 50 mA, Vf 3.6 V Submit Documentation Feedback Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 8.2.10 LM3410X WSON: Camera Flash or Strobe Circuit Application VIN L1 C1 VO D1 C3 LM3410 1 6 2 5 3 4 L2 R2 C2 LED( s) Q2 R3 R1 R4 Q1 FLASH CTRL Copyright (c) 2016, Texas Instruments Incorporated Figure 29. LM3410X (1.6 MHz) Camera Flash or Strobe Circuit Application Diagram 8.2.10.1 Design Requirements For this design example, use the parameters listed in Table 19 as the input parameters. Table 19. Design Parameters PARAMETER EXAMPLE VALUE VIN 2.7 V to 5.5 V ILED 1.5 A (flash) VOUT 7.5 V Table 20. Part Values PART VALUE U1 2.8-A ISW LED Driver C1, Input capacitor 10 F, 6.3 V, X5R C2, Output capacitor 220 F, 10 V, tantalum C3 capacitor 10 F, 16 V, X5R D1, Catch diode 0.43-Vf Schottky 1 A, 20 VR L1 3.3 H, 2.7 A R1 1 , 1% R2 37.4 k, 1% R3 100 k, 1% R4 0.15 , 1% Q1 and Q2 30 V, ID = 3.9 A LEDs SMD-1206, 50 mA, Vf 3.6 V, IPULSE = 1.5 A Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 29 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com 8.2.11 LM3410X SOT-23: 5 x 1206 Series LED String Application With VIN and VPWR Rail > 5.5 V L1 D1 LEDs VPWR LM3410 DIMM C1 4 2 R2 VIN 3 5 C2 1 C3 R1 Copyright (c) 2016, Texas Instruments Incorporated Figure 30. LM3410X (1.6 MHz) 5 x 1206 Series LED String Application With VIN and VPWR Rail > 5.5 V Diagram 8.2.11.1 Design Requirements For this design example, use the parameters listed in Table 21 as the input parameters. Table 21. Design Parameters PARAMETER EXAMPLE VALUE VPWR 9 V to 14 V VIN 2.7 V to 5.5 V ILED 50 mA VOUT 16.5 V (five 3.3-V LEDs in series) Table 22. Part Values PART 30 VALUE U1 2.8-A ISW LED Driver C1, Input VPWRcapacitor 10 F, 6.3 V, X5R C2, Output capacitor 2.2 F, 25 V, X5R C3, Input VIN capacitor 0.1 F, 6.3 V, X5R D1, Catch diode 0.43-Vf Schottky 500 mA, 30 VR L1 10 H, 1.2 A R1 4.02 , 1% R2 100 k, 1% LEDs SMD-1206, 50 mA, Vf 3.6 V Submit Documentation Feedback Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 8.2.12 LM3410X WSON: Boot-Strap Circuit to Extend Battery Life V IN C4 L1 D2 C1 C3 VO D1 LM3410 1 6 2 5 3 4 L2 C2 R3 D3 R1 Copyright (c) 2016, Texas Instruments Incorporated Figure 31. LM3410X (1.6 MHz) Boot-Strap Circuit to Extend Battery Life 8.2.12.1 Design Requirements For this design example, use the parameters listed in Table 3 as the input parameters. Table 23. Design Parameters PARAMETER EXAMPLE VALUE 1.9 V to 5.5 V VIN >2.3 V (typical) for start-up 300 mA ILED Table 24. Part Values PART VALUE U1 2.8-A ISW LED Driver C1, Input VPWR capacitor 10 F, 6.3 V, X5R C2, Output capacitor 10 F, 6.3 V, X5R C3, Input VIN capacitor 0.1 F, 6.3 V, X5R D1, Catch diode 0.43-Vf Schottky 1 A, 20 VR D2 and D3 Dual small signal Schottky L1 and L2 3.3 H, 3 A R1 665 m, 1% R3 100 k, 1% HB - LEDs 350 mA, Vf 3.4 V 9 Power Supply Recommendations Any DC output power supply may be used provided it has a high enough voltage and current range for the particular application required. Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 31 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com 10 Layout 10.1 Layout Guidelines When planning layout there are a few things to consider when trying to achieve a clean, regulated output. The most important consideration when completing a boost converter layout is the close coupling of the GND connections of the COUT capacitor and the PGND pin. The GND ends must be close to one another and be connected to the GND plane with at least two vias. There must be a continuous ground plane on the bottom layer of a two-layer board except under the switching node island. The FB pin is a high impedance node and the FB trace must be kept short to avoid noise pickup and inaccurate regulation. The RSET feedback resistor must be placed as close as possible to the IC, with the AGND of RSET (R1) placed as close as possible to the AGND of the IC. Radiated noise can be decreased by choosing a shielded inductor. The remaining components must also be placed as close as possible to the IC. See AN-1229 SIMPLE SWITCHER(R) PCB Layout Guidelins (SNVA054) for further considerations and the LM3410 demo board as an example of a four-layer layout. For certain high power applications, the PCB land may be modified to a dog bone shape (see Figure 33). Increasing the size of ground plane and adding thermal vias can reduce the RJA for the application. 10.2 Layout Examples LEDs COPPER PCB R1 PGND DIM FB 4 PGND 1 6 SW VIN 2 5 AGND DIM 3 4 FB 3 AGND 5 C2 VIN VSW VO 2 6 1 PGND D1 C1 SW L1 COPPER Figure 32. Boost PCB Layout Guidelines Figure 33. PCB Dog Bone Layout LED1 VO PGND C2 R1 L2 D1 FB DIM 4 3 AGND 5 2 VIN C1 C3 6 1 PGND SW L1 VIN The layout guidelines described for the LM3410 boost-converter are applicable to the SEPIC OLED Converter. This is a proper PCB layout for a SEPIC Converter. Figure 34. HB or OLED SEPIC PCB Layout 32 Submit Documentation Feedback Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 10.3 Thermal Considerations 10.3.1 Design When designing for thermal performance, many variables must be considered, such as ambient temperature, airflow, external components, and PCB design. The surrounding maximum air temperature is fairly explanatory. As the temperature increases, the junction temperature increases. This may not be linear though. As the surrounding air temperature increases, resistances of semiconductors, wires and traces increase. This decreases the efficiency of the application, and more power is converted into heat, and increases the silicon junction temperatures further. Forced air can drastically reduce the device junction temperature. Air flow reduces the hot spots within a design. Warm airflow is often much better than a lower ambient temperature with no airflow. Choose components that are efficient, and the mutual heating between devices can be reduced. The PCB design is a very important step in the thermal design procedure. The LM3410 and LM3410-Q1 are available in three package options (6-pin WSON, 8-pin MSOP, and 5-pin SOT-23). The options are electrically the same, but there are differences between the package sizes and thermal performances. The WSON and MSOP have thermal die attach pads (DAP) attached to the bottom of the packages, and are therefore capable of dissipating more heat than the SOT-23 package. It is important that the customer choose the correct package for the application. A detailed thermal design procedure has been included in this data sheet. This procedure helps determine which package is correct, and common applications are analyzed. There is one significant thermal PCB layout design consideration that contradicts a proper electrical PCB layout design consideration. This contradiction is the placement of external components that dissipate heat. The greatest external heat contributor is the external Schottky diode. Increasing the distance between the LM3410 or LM3410-Q1 and the Schottky diode may reduce the mutual heating effect. This, however, creates electrical performance issues. It is important to keep the device, the output capacitor, and Schottky diode physically close to each other (see Layout Guidelines). The electrical design considerations outweigh the thermal considerations. Other factors that influence thermal performance are thermal vias, copper weight, and number of board layers. Heat energy is transferred from regions of high temperature to regions of low temperature via three basic mechanisms: radiation, conduction and convection. Conduction and convection are the dominant heat transfer mechanism in most applications. The data sheet values for each packages thermal impedances are given to allow comparison of the thermal performance of one package against another. To achieve a comparison between packages, all other variables must be held constant in the comparison (PCB size, copper weight, thermal vias, power dissipation, VIN, VOUT, load current, and others). This provides indication of package performance, but it would be a mistake to use these values to calculate the actual junction temperature in an application. 10.3.2 LM3410 and LM3410-Q1 Thermal Models Heat is dissipated from the LM3410, LM3410-Q1, and other devices. The external loss elements include the Schottky diode, inductor, and loads. All loss elements mutually increase the heat on the PCB, and therefore increase each other's temperatures. Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 33 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com Thermal Considerations (continued) L1 D1 IL(t) VOUT(t) VIN Q1 C1 Figure 35. Thermal Schematic RTCASE-AMB TCASE CTCASE-AMB RTJ-CASE CTJ-CASE INTERNAL PDISS SMALL LARGE PDISS-TOP TAMBIENT PDISS-PCB TJUNCTION RTJ-PCB CTJ-PCB DEVICE EXTERNAL PDISS RTPCB-AMB TPCB CTPCB-AMB PCB Figure 36. Associated Thermal Model 34 Submit Documentation Feedback Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 Thermal Considerations (continued) 10.3.3 Calculating Efficiency and Junction Temperature Use Equation 31 to calculate RJA. R TJA = T J - TA PDissipation (31) A common error when calculating RJA is to assume that the package is the only variable to consider. Other variables are: * Input voltage, output voltage, output current, RDS(ON) * Ambient temperature and air flow * Internal and external components' power dissipation * Package thermal limitations * PCB variables (copper weight, thermal vias, and component placement) Another common error when calculating junction temperature is to assume that the top case temperature is the proper temperature when calculating RJC. RJC represents the thermal impedance of all six sides of a package, not just the top side. This document refers to a thermal impedance called RJC. RJC represents a thermal impedance associated with just the top case temperature. This allows for the calculation of the junction temperature with a thermal sensor connected to the top case. The complete LM3410 and LM3410-Q1 boost converter efficiency can be calculated using Equation 32. K POUT PIN or POUT POUT PLOSS K where * PLOSS is the sum of two types of losses in the converter, switching and conduction (32) Conduction losses usually dominate at higher output loads, where as switching losses remain relatively fixed and dominate at lower output loads. To calculate losses in the LM3410 or LM3410-Q1 device, use Equation 33. PLOSS = PCOND + PSW + PQ where * PQ = quiescent operating power loss (33) Conversion ratio of the boost converter with conduction loss elements inserted is calculated with Equation 34. VOUT VIN * 1 1 1- Dc x VD* = R DCR + (D x R DSON) VIN Dc (c) 2R 1+ c D OUT (c) where * RDCR is the Inductor series resistance Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 (34) Submit Documentation Feedback 35 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com Thermal Considerations (continued) VOUT ROUT = ILED (35) If the loss elements are reduced to zero, the conversion ratio simplifies to Equation 36. VOUT VIN V OUT V IN = = 1 ' (36) K ' (37) Therefore: K = Dc VOUT VIN D c x VD * 1 VIN = R + (D x R DSON) 1 + DCR 2 D c R OUT (c) (38) Only calculations for determining the most significant power losses are discussed. Other losses totaling less than 2% are not discussed. A simple efficiency calculation that takes into account the conduction losses is Equation 39. Dc x VD * 1 VIN K| R + (D x R DSON ) 1 + DCR 2R c D (c) OUT (39) The diode, NMOS switch, and inductor (DCR) losses are included in this calculation. Setting any loss element to zero simplifies the equation. VD is the forward voltage drop across the Schottky diode. It can be obtained from Electrical Characteristics. Conduction losses in the diode are calculated with Equation 40. PDIODE = VD x ILED (40) Depending on the duty cycle, this can be the single most significant power loss in the circuit. Choose a diode that has a low forward voltage drop. Another concern with diode selection is reverse leakage current. Depending on the ambient temperature and the reverse voltage across the diode, the current being drawn from the output to the NMOS switch during time (D) could be significant, this may increase losses internal to the LM3410 or LM3410-Q1 and reduce the overall efficiency of the application. See the Schottky diode manufacturer's data sheets for reverse leakage specifications. Another significant external power loss is the conduction loss in the input inductor. The power loss within the inductor can be simplified to Equation 41, PIND = IIN2RDCR (41) Or Equation 42. 36 Submit Documentation Feedback Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 Thermal Considerations (continued) * I 2 R PIND = O DCR D' (c) (42) The LM3410 and LM3410-Q1 conduction loss is mainly associated with the internal power switch. PCOND-NFET = I2SW-rms x RDS(ON) x D (43) 'i IIN ISW(t) t Figure 37. LM3410 and LM3410-Q1 Switch Current 2 Isw rms IIND 1 'i * Du 1 | IIND D 3 (c) IIND (44) (small ripple approximation) PCOND-NFET = IIN2 x RDS(ON) x D (45) Or 2 PCOND - NFET I LED* = ' x R DSON x D (c)D (46) The value for RDS(ON) must be equal to the resistance at the desired junction temperature for analyzation. As an example, at 125C and RDS(ON) = 250 m (See Typical Characteristics for value). Switching losses are also associated with the internal power switch. They occur during the switch ON and OFF transition periods, where voltages and currents overlap resulting in power loss. The simplest means to determine this loss is empirically measuring the rise and fall times (10% to 90%) of the switch at the switch node. PSWR = 1/2 (VOUT x IIN x fSW x tRISE) PSWF = 1/2 (VOUT x IIN x fSW x tFALL) PSW = PSWR + PSWF (47) (48) (49) Table 25. Typical Switch-Node Rise and Fall Times VIN (V) VOUT (V) tRISE (ns) tFALL (ns) 3 5 6 4 5 12 6 5 3 12 8 7 5 18 10 8 Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 37 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com 10.3.3.1 Quiescent Power Losses IQ is the quiescent operating current, and is typically around 1.5 mA. PQ = IQ x VIN (50) 10.3.3.2 RSET Power Losses RSET power loss is calculated with Equation 51. 2 VFB PRSET = R SET (51) 10.3.4 Example Efficiency Calculation Operating Conditions:5 x 3.3-V LEDs + 190 mVREF 16.7 V Table 26. Operating Conditions PARAMETER VALUE VIN 3.3 V VOUT 16.7 V ILED 50 mA VD 0.45 V fSW 1.6 MHz IQ 3 mA tRISE 10 ns tFALL 10 ns RDS(ON) 225 m LDCR 75 m D 0.82 IIN 0.31 A PCOND + PSW + PDIODE + PIND + PQ = PLOSS (52) Quiescent Power Loss: PQ = IQ x VIN = 10 mW (53) Switching Power Loss: PSWR = 1/2(VOUT x IIN x fSW x tRISE) 40 mW PSWF = 1/2(VOUT x IIN x fSW x tFALL) 40 mW PSW = PSWR + PSWF = 80 mW (54) (55) (56) Internal NFET Power Loss: RDS(ON) = 225 m PCONDUCTION = IIN2 x D x RDS(ON) = 17 mW IIN = 310 mA (57) (58) (59) Diode Loss: VD = 0.45 V PDIODE = VD x ILED = 23 mW (60) (61) Inductor Power Loss: RDCR = 75 m PIND = IIN2 x RDCR = 7 mW 38 Submit Documentation Feedback (62) (63) Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 Table 27. Total Power Losses PARAMETER VALUE LOSS PARAMETER LOSS VALUE -- -- VIN 3.3 V VOUT 16.7 V ILED 50 mA POUT VD 0.45 V PDIODE fSW 1.6 MHz IQ 10 ns PSWR 40 mW tRISE 10 ns PSWF 40 mW IQ 3 mA PQ 10 mW RDS(ON) 225 m PCOND 17 mW LDCR 75 m PIND D 0.82 85% -- -- 825 W 23 mW -- -- 7 mW -- PLOSS -- 137 mW PINTERNAL = PCOND + PSW = 107 mW (64) 10.3.5 Calculating RJA and RJC R TJA = TJ - TA PDissipatio n : R <JC = TJ - TCase PDissipatio n (65) We now know the internal power dissipation, and we are trying to keep the junction temperature at or below 125C. The next step is to calculate the value for RJA or RJC. This is actually very simple to accomplish, and necessary for determining the correct package option for a given application. The LM3410 and LM3410-Q1 have a thermal shutdown comparator. When the silicon reaches a temperature of 165C, the device shuts down until the temperature drops to 150C. From this, it is possible calculate the RJA or the RJC of a specific application. Because the junction to top case thermal impedance is much lower than the thermal impedance of junction to ambient air, the error in calculating RJC is lower than for RJA . However, a small thermocouple needs to be attached onto the top case of the device to obtain the RJC value. Knowing the temperature of the silicon when the device shuts down provides three of the four variables. After calculating the thermal impedance, working backwards with the junction temperature set to 125C, the maximum ambient air temperature to keep the silicon below 125C can be calculated. Procedure: Place the application into a thermal chamber. Dissipate enough power in the device to obtain an accurate thermal impedance value. Raise the ambient air temperature until the device goes into thermal shutdown. Record the temperatures of the ambient air and the top case temperature of the device. Calculate the thermal impedances. Example from previous calculations (SOT-23 Package): PINTERNAL = 107 mW TA at shutdown = 155C TC at shutdown = 159C R TJA = TJ - TA PDissipatio n (66) (67) (68) : R <JC = TJ - TCase-Top P Dissipation (69) (70) (71) RJA SOT-23 = 93C/W RJC SOT-23 = 56C/W Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 39 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com Typical WSON and MSOP typical applications produces RJA numbers from 53.7C/W to 55.3C/W, and RJC varies from 61.4C/W to 65.9C/W. These values are for PCBs with two and four layer boards with 0.5 oz copper, and four to six thermal vias to bottom side ground plane under the DAP. The thermal impedances calculated above are higher due to the small amount of power being dissipated within the device. NOTE To use these procedures it is important to dissipate an amount of power within the device that indicates a true thermal impedance value. If a very small internal dissipated value is used, the resulting thermal impedance calculated is abnormally high, and subject to error. Figure 38 shows the nonlinear relationship of internal power dissipation vs RJA. Figure 38. RJA vs Internal Dissipation For 5-pin SOT-23 package typical applications, RJA numbers range from 164.2C/W, and RJC varies from 115.3C/W. These values are for PCBs with two and four layer boards with 0.5 oz copper, with two to four thermal vias from GND pin to bottom layer. Using typical thermal impedances and an ambient temperature maximum of 75C, if the design requires more dissipation than 400 mW internal to the device, or there is 750 mW of total power loss in the application, TI recommends using the 6-pin WSON or the 8-pin MSOP-PowerPad package with the exposed DAP. 11 Device and Documentation Support 11.1 Device Support 11.1.1 Device Nomenclature Radiation Electromagnetic transfer of heat between masses at different temperatures. Conduction Transfer of heat through a solid medium. Convection Transfer of heat through the medium of a fluid; typically air. RJA Thermal impedance from silicon junction to ambient air temperature. RJA is the sum of smaller thermal impedances (see Figure 35 and Figure 36). Capacitors within the model represent delays that are present from the time that power and its associated heat is increased or decreased from steady state in one medium until the time that the heat increase or decrease reaches steady state in the another medium. RJC Thermal impedance from silicon junction to device case temperature. 40 Submit Documentation Feedback Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 LM3410, LM3410-Q1 www.ti.com SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 Device Support (continued) CJC Thermal Delay from silicon junction to device case temperature. CCA Thermal Delay from device case to ambient air temperature. 11.2 Documentation Support 11.2.1 Related Documentation For related documentation see the following: AN-1229 SIMPLE SWITCHER(R) PCB Layout Guidelins (SNVA054) 11.3 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 28. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY LM3410 Click here Click here Click here Click here Click here LM3410-Q1 Click here Click here Click here Click here Click here 11.4 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 11.5 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2ETM Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.6 Trademarks PowerPad, E2E are trademarks of Texas Instruments. SIMPLE SWITCHER is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners. 11.7 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. 11.8 Glossary SLYZ022 -- TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 Submit Documentation Feedback 41 LM3410, LM3410-Q1 SNVS541H - OCTOBER 2007 - REVISED AUGUST 2016 www.ti.com 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 42 Submit Documentation Feedback Copyright (c) 2007-2016, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410-Q1 PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LM3410XMF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 SSVB LM3410XMFE/NOPB ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 SSVB LM3410XMFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 SSVB LM3410XMY/NOPB ACTIVE HVSSOP DGN 8 1000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 SSXB LM3410XMYE/NOPB ACTIVE HVSSOP DGN 8 250 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 SSXB LM3410XMYX/NOPB ACTIVE HVSSOP DGN 8 3500 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 SSXB LM3410XQMF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 SXUB LM3410XSD/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 3410X LM3410XSDE/NOPB ACTIVE WSON NGG 6 250 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 3410X LM3410XSDX/NOPB ACTIVE WSON NGG 6 4500 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 3410X LM3410YMF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 SSZB LM3410YMFE/NOPB ACTIVE SOT-23 DBV 5 250 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 SSZB LM3410YMFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 SSZB LM3410YMY/NOPB ACTIVE HVSSOP DGN 8 1000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 STAB LM3410YMYE/NOPB ACTIVE HVSSOP DGN 8 250 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 STAB LM3410YMYX/NOPB ACTIVE HVSSOP DGN 8 3500 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 STAB LM3410YQMF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 SXXB Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 6-Feb-2020 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LM3410YQMFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 SXXB LM3410YSD/NOPB ACTIVE WSON NGG 6 1000 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 3410Y LM3410YSDE/NOPB ACTIVE WSON NGG 6 250 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 125 3410Y (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 6-Feb-2020 OTHER QUALIFIED VERSIONS OF LM3410, LM3410-Q1 : * Catalog: LM3410 * Automotive: LM3410-Q1 NOTE: Qualified Version Definitions: * Catalog - TI's standard catalog product * Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 6-Sep-2019 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) LM3410XMF/NOPB SOT-23 DBV 5 1000 178.0 8.4 LM3410XMFE/NOPB SOT-23 DBV 5 250 178.0 LM3410XMFX/NOPB SOT-23 DBV 5 3000 178.0 LM3410XMY/NOPB HVSSOP DGN 8 1000 LM3410XMYE/NOPB HVSSOP DGN 8 W Pin1 (mm) Quadrant 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 250 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM3410XMYX/NOPB HVSSOP DGN 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM3410XQMF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3410XSD/NOPB WSON NGG 6 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LM3410XSDE/NOPB WSON NGG 6 250 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LM3410XSDX/NOPB WSON NGG 6 4500 330.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LM3410YMF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3410YMFE/NOPB SOT-23 DBV 5 250 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3410YMFX/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3410YMY/NOPB HVSSOP DGN 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM3410YMYE/NOPB HVSSOP DGN 8 250 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM3410YMYX/NOPB HVSSOP DGN 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LM3410YQMF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3410YQMFX/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 6-Sep-2019 Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM3410YSD/NOPB WSON NGG 6 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 LM3410YSDE/NOPB WSON NGG 6 250 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM3410XMF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3410XMFE/NOPB SOT-23 DBV 5 250 210.0 185.0 35.0 LM3410XMFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3410XMY/NOPB HVSSOP DGN 8 1000 210.0 185.0 35.0 LM3410XMYE/NOPB HVSSOP DGN 8 250 210.0 185.0 35.0 LM3410XMYX/NOPB HVSSOP DGN 8 3500 367.0 367.0 35.0 LM3410XQMF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3410XSD/NOPB WSON NGG 6 1000 210.0 185.0 35.0 LM3410XSDE/NOPB WSON NGG 6 250 210.0 185.0 35.0 LM3410XSDX/NOPB WSON NGG 6 4500 367.0 367.0 35.0 LM3410YMF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3410YMFE/NOPB SOT-23 DBV 5 250 210.0 185.0 35.0 LM3410YMFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3410YMY/NOPB HVSSOP DGN 8 1000 210.0 185.0 35.0 LM3410YMYE/NOPB HVSSOP DGN 8 250 210.0 185.0 35.0 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 6-Sep-2019 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM3410YMYX/NOPB HVSSOP DGN 8 3500 367.0 367.0 35.0 LM3410YQMF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3410YQMFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3410YSD/NOPB WSON NGG 6 1000 210.0 185.0 35.0 LM3410YSDE/NOPB WSON NGG 6 250 210.0 185.0 35.0 Pack Materials-Page 3 PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 1.75 1.45 PIN 1 INDEX AREA 1 0.1 C B A 5 2X 0.95 1.9 1.45 0.90 3.05 2.75 1.9 2 4 0.5 5X 0.3 0.2 3 (1.1) C A B 0.15 TYP 0.00 0.25 GAGE PLANE 8 TYP 0 0.22 TYP 0.08 0.6 TYP 0.3 SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MIN ARROUND 0.07 MAX ARROUND NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X(0.95) 4 3 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com PACKAGE OUTLINE TM DGN0008A PowerPAD VSSOP - 1.1 mm max height SCALE 4.000 SMALL OUTLINE PACKAGE C 5.05 TYP 4.75 A 0.1 C SEATING PLANE PIN 1 INDEX AREA 6X 0.65 8 1 2X 3.1 2.9 NOTE 3 1.95 4 5 8X B 3.1 2.9 NOTE 4 0.38 0.25 0.13 C A B 0.23 0.13 SEE DETAIL A EXPOSED THERMAL PAD 4 5 0.25 GAGE PLANE 2.0 1.7 9 1.1 MAX 8 1 0 -8 0.15 0.05 0.7 0.4 DETAIL A A 20 1.88 1.58 TYPICAL 4218836/A 11/2019 PowerPAD is a trademark of Texas Instruments. NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-187. www.ti.com EXAMPLE BOARD LAYOUT TM DGN0008A PowerPAD VSSOP - 1.1 mm max height SMALL OUTLINE PACKAGE (2) NOTE 9 METAL COVERED BY SOLDER MASK (1.88) SOLDER MASK DEFINED PAD SYMM 8X (1.4) (R0.05) TYP 8 8X (0.45) 1 (3) NOTE 9 SYMM 9 (2) (1.22) 6X (0.65) 5 4 ( 0.2) TYP VIA (0.55) SEE DETAILS (4.4) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 15X SOLDER MASK OPENING METAL UNDER SOLDER MASK METAL SOLDER MASK OPENING EXPOSED METAL EXPOSED METAL 0.05 MAX ALL AROUND NON-SOLDER MASK DEFINED (PREFERRED) 0.05 MIN ALL AROUND SOLDER MASK DEFINED SOLDER MASK DETAILS 15.000 4218836/A 11/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. 9. Size of metal pad may vary due to creepage requirement. www.ti.com EXAMPLE STENCIL DESIGN TM DGN0008A PowerPAD VSSOP - 1.1 mm max height SMALL OUTLINE PACKAGE (1.88) BASED ON 0.125 THICK STENCIL SYMM (R0.05) TYP 8X (1.4) 8X (0.45) 8 1 SYMM (2) BASED ON 0.125 THICK STENCIL 6X (0.65) 5 4 METAL COVERED BY SOLDER MASK (4.4) SEE TABLE FOR DIFFERENT OPENINGS FOR OTHER STENCIL THICKNESSES SOLDER PASTE EXAMPLE EXPOSED PAD 9: 100% PRINTED SOLDER COVERAGE BY AREA SCALE: 15X STENCIL THICKNESS SOLDER STENCIL OPENING 0.1 0.125 0.15 0.175 2.10 X 2.24 1.88 X 2.00 (SHOWN) 1.72 X 1.83 1.59 X 1.69 4218836/A 11/2019 NOTES: (continued) 10. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 11. 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