LP2952-N, LP2952A, LP2953, LP2953A www.ti.com SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 LP2952/LP2952A/LP2953/LP2953A Adjustable Micropower Low-Dropout Voltage Regulators Check for Samples: LP2952-N, LP2952A, LP2953, LP2953A FEATURES DESCRIPTION * * * * * * * * * * The LP2952 and LP2953 are micropower voltage regulators with very low quiescent current (130 A typical at 1 mA load) and very low dropout voltage (typ. 60 mV at light load and 470 mV at 250 mA load current). They are ideally suited for battery-powered systems. Furthermore, the quiescent current increases only slightly at dropout, which prolongs battery life. 1 2 Output voltage adjusts from 1.23V to 29V Guaranteed 250 mA output current Extremely low quiescent current Low dropout voltage Extremely tight line and load regulation Very low temperature coefficient Current and thermal limiting Reverse battery protection 50 mA (typical) output pulldown crowbar 5V and 3.3V versions available APPLICATIONS * * * * High-efficiency linear regulator Regulator with under-voltage shutdown Low dropout battery-powered regulator Snap-ON/Snap-OFF regulator LP2953 VERSIONS ONLY * Auxiliary comparator included with CMOS/TTLcompatible output levels. Can be used for fault detection, low input line detection, etc. The LP2952 and LP2953 retain all the desirable characteristics of the LP2951, but offer increased output current, additional features, and an improved shutdown function. The internal crowbar pulls the output down quickly when the shutdown is activated. The error flag goes low if the output voltage drops out of regulation. Reverse battery protection is provided. The internal voltage reference is made available for external use, providing a low-T.C. reference with very good line and load regulation. The parts are available in PDIP, CDIP and surface mount packages. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2004-2013, Texas Instruments Incorporated LP2952-N, LP2952A, LP2953, LP2953A SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 www.ti.com Block Diagrams LP2952 Figure 1. LP2953 Figure 2. 2 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP2952-N LP2952A LP2953 LP2953A LP2952-N, LP2952A, LP2953, LP2953A www.ti.com SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 Pinout Drawings LP2952 14-Pin PDIP/NFF LP2953 16-Pin PDIP/NBG Figure 3. Figure 4. LP2952 16-Pin SOIC/D Figure 5. Copyright (c) 2004-2013, Texas Instruments Incorporated LP2953 16-Pin SOIC/D Figure 6. Submit Documentation Feedback Product Folder Links: LP2952-N LP2952A LP2953 LP2953A 3 LP2952-N, LP2952A, LP2953, LP2953A SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS (1) Storage Temperature Range -65C TA +150C Operating Temperature Range LP2952I, LP2953I, LP2952AI, LP2953AI, LP2952I-3.3, LP2953I-3.3, LP2952AI-3.3, LP2953AI-3.3 -40C TJ +125C -55C TA +125C LP2953AM Lead Temp. (Soldering, 5 seconds) Power Dissipation 260C (2) Internally Limited Maximum Junction Temperature LP2952I, LP2953I, LP2952AI, LP2953AI, LP2952I-3.3, LP2953I-3.3, LP2952AI-3.3, LP2953AI-3.3 +125C LP2953AM +150C -20V to +30V Input Supply Voltage Feedback Input Voltage (3) Comparator Input Voltage Shutdown Input Voltage (1) -0.3V to +30V (4) Comparator Output Voltage ESD Rating -0.3V to +5V (4) -0.3V to +30V (4) -0.3V to +30V (5) 2 kV (2) Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the device outside of its rated operating conditions. The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal resistance, J-A, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature is calculated (3) using the equation for P(MAX), .Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. See Application Hints for additional information on heatsinking and thermal resistance. When used in dual-supply systems where the regulator load is returned to a negative supply, the output voltage must be diode-clamped to ground. May exceed the input supply voltage. Human body model, 200 pF discharged through 1.5 k. (4) (5) 4 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP2952-N LP2952A LP2953 LP2953A LP2952-N, LP2952A, LP2953, LP2953A www.ti.com SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 ELECTRICAL CHARACTERISTICS: 3.3V VERSIONS Limits in standard typeface are for TJ = 25C, bold typeface applies over the full operating temperature range. Limits are guaranteed by production testing or correlation techniques using standard Statistical Quality Control (SQC) methods. Unless otherwise specified: VIN = VO(NOM) + 1V, IL = 1 mA, CL = 2.2 F for 5V parts and 4.7 F for 3.3V parts. Feedback pin is tied to V Tap pin, Output pin is tied to Output Sense pin. Symbol VO Parameter Conditions Output Voltage Typical LP2952AI-3.3, LP2953AI-3.3 3.3 1 mA IL 250 mA 3.3 LP2952I-3.3, LP2953I-3.3 Min Max Min Max 3.284 3.317 3.267 3.333 3.260 3.340 3.234 3.366 3.254 3.346 3.221 3.379 Units V ELECTRICAL CHARACTERISTICS: 5V VERSIONS Limits in standard typeface are for TJ = 25C, bold typeface applies over the full operating temperature range. Limits are guaranteed by production testing or correlation techniques using standard Statistical Quality Control (SQC) methods. Unless otherwise specified: VIN = VO(NOM) + 1V, IL = 1 mA, CL = 2.2 F for 5V parts and 4.7F for 3.3V parts. Feedback pin is tied to V Tap pin, Output pin is tied to Output Sense pin. Symbol Parameter Conditions Typical LP2952AI, LP2953AI, LP2952I, LP2953I Units LP2953AM VO Output Voltage 5.0 1 mA IL 250 mA Copyright (c) 2004-2013, Texas Instruments Incorporated 5.0 Min Max Min Max 4.975 5.025 4.950 5.050 4.940 5.060 4.900 5.100 4.930 5.070 4.880 5.120 Submit Documentation Feedback Product Folder Links: LP2952-N LP2952A LP2953 LP2953A V 5 LP2952-N, LP2952A, LP2953, LP2953A SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 www.ti.com ALL VOLTAGE OPTIONS ELECTRICAL CHARACTERISTICS Limits in standard typeface are for TJ = 25C, bold typeface applies over the full operating temperature range. Limits are guaranteed by production testing or correlation techniques using standard Statistical Quality Control (SQC) methods. Unless otherwise specified: VIN = VO(NOM) + 1V, IL = 1 mA, CL = 2.2 F for 5V parts and 4.7 F for 3.3V parts. Feedback pin is tied to V Tap pin, Output pin is tied to Output Sense pin. Symbol Parameter Conditions Typical LP2952AI, LP2953AI, LP2952AI-3.3, LP2953AI-3.3, LP2953AM LP2952I, LP2953I, LP2952I-3.3, LP2953I-3.3 Units (1) Min Max Min Max REGULATOR (2) Output Voltage Temp. Coefficient VIN-VO Output Voltage Line Regulation VIN = VO(NOM) + 1V to 30V Output Voltage Load Regulation (3) IL = 1 mA to 250 mA Dropout Voltage IL = 1 mA (4) Ground Pin Current 100 150 0.03 0.1 0.2 0.2 0.4 0.16 0.20 0.20 0.30 100 100 150 150 300 300 420 420 400 400 520 520 600 600 800 800 170 170 200 200 0.04 IL = 0.1 mA to 1 mA (5) 60 IL = 50 mA 240 IL = 100 mA 310 IL = 250 mA IGND 20 IL = 1 mA IL = 50 mA IL = 100 mA IL = 250 mA 470 130 1.1 4.5 21 2 2 2.5 2.5 6 6 8 8 28 28 33 33 210 210 240 240 Ground Pin Current at Dropout VIN = VO(NOM) -0.5V IGND Ground Pin Current at Shutdown (5) VSHUTDOWN 1.1V 105 140 140 ILIMIT Current Limit VOUT = 0 380 500 500 530 530 0.2 0.2 IGND (6) Thermal Regulation (1) (2) (3) (4) (5) (6) 6 165 IL = 100 A 0.05 ppm/ C % % mV A mA A A mA %/W Drive Shutdown pin with TTL or CMOS-low level to shut regulator OFF, high level to turn regulator ON. Output or reference voltage temperature coefficient is defined as the worst case voltage change divided by the total temperature range. Load regulation is measured at constant junction temperature using low duty cycle pulse testing. Two separate tests are performed, one for the range of 100 A to 1 mA and one for the 1 mA to 250 mA range. Changes in output voltage due to heating effects are covered by the thermal regulation specification. Dropout voltage is defined as the input to output differential at which the output voltage drops 100 mV below the value measured with a 1V differential. At very low values of programmed output voltage, the input voltage minimum of 2V (2.3V over temperature) must be observed. Ground pin current is the regulator quiescent current. The total current drawn from the source is the sum of the ground pin current, output load current, and current through the external resistive divider (if used). Thermal regulation is the change in output voltage at a time T after a change in power dissipation, excluding load or line regulation effects. Specifications are for a 200 mA load pulse at VIN = VO(NOM)+15V (3W pulse) for T = 10 ms. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP2952-N LP2952A LP2953 LP2953A LP2952-N, LP2952A, LP2953, LP2953A www.ti.com SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 ALL VOLTAGE OPTIONS ELECTRICAL CHARACTERISTICS (continued) Limits in standard typeface are for TJ = 25C, bold typeface applies over the full operating temperature range. Limits are guaranteed by production testing or correlation techniques using standard Statistical Quality Control (SQC) methods. Unless otherwise specified: VIN = VO(NOM) + 1V, IL = 1 mA, CL = 2.2 F for 5V parts and 4.7 F for 3.3V parts. Feedback pin is tied to V Tap pin, Output pin is tied to Output Sense pin. Symbol Parameter Conditions Typical LP2952AI, LP2953AI, LP2952AI-3.3, LP2953AI-3.3, LP2953AM LP2952I, LP2953I, LP2952I-3.3, LP2953I-3.3 Units (1) Min en VREF Output Noise Voltage (10 Hz to 100 kHz) IL = 100 mA IO(SINK) 400 CL = 33 F 260 CL = 33 F (7) Reference Voltage Reference Voltage Line Regulation VIN = 2.5V to VO(NOM) + 1V Reference Voltage Load Regulation IREF = 0 to 200 A VIN = VO(NOM) + 1V to 30V (2) Feedback Pin Bias Current Max Max V RMS 1.230 1.215 1.245 1.205 1.255 1.205 1.255 1.190 1.270 0.03 (9) 0.25 0.1 0.2 0.2 0.4 0.4 0.8 0.6 1.0 20 (10) V % % ppm/ C 20 Output "OFF" Pulldown Current Min 80 (8) Reference Voltage Temp. Coefficient IB(FB) CL = 4.7 F 40 40 60 60 30 30 20 20 nA mA DROPOUT DETECTION COMPARATOR IOH VOL Output "HIGH" Leakage Output "LOW" Voltage VOH = 30V VIN = VO(NOM) - 0.5V IO(COMP) = 400 A VTHR (MAX) Upper Threshold Voltage (11) VTHR (MIN) Lower Threshold Voltage (12) HYST Hysteresis (12) SHUTDOWN INPUT VOS 0.01 150 -60 -85 1 2 2 250 250 400 400 -80 -35 -80 -35 -95 -25 -95 -25 -110 -55 -110 -55 -160 -40 -160 -40 15 A mV mV mV mV (13) Input Offset (Referred to VREF) 3 Voltage HYST 1 Hysteresis -7.5 7.5 -7.5 7.5 -10 10 -10 10 6 mV mV Connect a 0.1 F capacitor from the output to the feedback pin. VREF VOUT (VIN - 1V), 2.3V VIN 30V, 100 A IL 250 mA. Two separate tests are performed, one covering 2.5V VIN VO(NOM)+1V and the other test for VO(NOM)+1V VIN 30V. VSHUTDOWN 1.1V, VOUT = VO(NOM). Comparator thresholds are expressed in terms of a voltage differential at the Feedback terminal below the nominal reference voltage measured atVIN = VO(NOM) + 1V. To express these thresholds in terms of output voltage change, multiply by the Error amplifier gain, which is VOUT/VREF = (R1 + R2)/R2(refer to Figure 37). (12) Comparator thresholds are expressed in terms of a voltage differential at the Feedback terminal below the nominal reference voltage measured atVIN = VO(NOM) + 1V. To express these thresholds in terms of output voltage change, multiply by the Error amplifier gain, which is VOUT/VREF = (R1 + R2)/R2(refer to Figure 37). (13) Human body model, 200 pF discharged through 1.5 k. (7) (8) (9) (10) (11) Copyright (c) 2004-2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LP2952-N LP2952A LP2953 LP2953A 7 LP2952-N, LP2952A, LP2953, LP2953A SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 www.ti.com ALL VOLTAGE OPTIONS ELECTRICAL CHARACTERISTICS (continued) Limits in standard typeface are for TJ = 25C, bold typeface applies over the full operating temperature range. Limits are guaranteed by production testing or correlation techniques using standard Statistical Quality Control (SQC) methods. Unless otherwise specified: VIN = VO(NOM) + 1V, IL = 1 mA, CL = 2.2 F for 5V parts and 4.7 F for 3.3V parts. Feedback pin is tied to V Tap pin, Output pin is tied to Output Sense pin. Symbol Parameter Conditions Typical LP2952AI, LP2953AI, LP2952AI-3.3, LP2953AI-3.3, LP2953AM LP2952I, LP2953I, LP2952I-3.3, LP2953I-3.3 Units (1) IB Input Bias VIN(S/D) = 0V to 5V 10 Current LP2953A M 10 Min Max Min Max -30 30 -50 50 -30 -50 -30 50 -30 30 -75 75 -7.5 7.5 -10 10 -7.5 7.5 -12 12 -30 30 -50 50 -30 30 -75 75 nA AUXILIARY COMPARATOR (LP2953 Only) VOS Input Offset Voltage (Referred to VREF) 3 LP2953A M HYST Hysteresis IB Input Bias Current VIN(COMP) = 0V to 5V Output "HIGH" Leakage VOH = 30V 10 10 0.01 1 2 LP2953A M Output "LOW" Voltage VIN(COMP) = 1.1V 0.01 30 50 nA 1 2 A 250 400 mV 1 2.2 150 250 IO(COMP) = 400 A 400 LP2953A M 8 -30 -50 Submit Documentation Feedback mV mV VIN(COMP) = 1.3V VOL 7.5 10 6 LP2953A M IOH 3 -7.5 -10 150 250 420 Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP2952-N LP2952A LP2953 LP2953A LP2952-N, LP2952A, LP2953, LP2953A www.ti.com SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 TYPICAL PERFORMANCE CHARACTERISTICS Unless otherwise specified: VIN = 6V, IL = 1 mA, CL = 2.2 F, VSD = 3V, TA = 25C, VOUT = 5V. Quiescent Current Quiescent Current Figure 7. Figure 8. Ground Pin Current vs Load Ground Pin Current Figure 9. Figure 10. Ground Pin Current Output Noise Voltage Figure 11. Figure 12. Copyright (c) 2004-2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LP2952-N LP2952A LP2953 LP2953A 9 LP2952-N, LP2952A, LP2953, LP2953A SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) Unless otherwise specified: VIN = 6V, IL = 1 mA, CL = 2.2 F, VSD = 3V, TA = 25C, VOUT = 5V. 10 Ripple Rejection Ripple Rejection Figure 13. Figure 14. Ripple Rejection Line Transient Response Figure 15. Figure 16. Line Transient Response Output Impedance Figure 17. Figure 18. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP2952-N LP2952A LP2953 LP2953A LP2952-N, LP2952A, LP2953, LP2953A www.ti.com SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Unless otherwise specified: VIN = 6V, IL = 1 mA, CL = 2.2 F, VSD = 3V, TA = 25C, VOUT = 5V. Load Transient Response Load Transient Response Figure 19. Figure 20. Dropout Characteristics Enable Transient Figure 21. Figure 22. Enable Transient Short-Circuit Output Current and Maximum Output Current Figure 23. Figure 24. Copyright (c) 2004-2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LP2952-N LP2952A LP2953 LP2953A 11 LP2952-N, LP2952A, LP2953, LP2953A SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 www.ti.com TYPICAL PERFORMANCE CHARACTERISTICS (continued) Unless otherwise specified: VIN = 6V, IL = 1 mA, CL = 2.2 F, VSD = 3V, TA = 25C, VOUT = 5V. 12 Feedback Bias Current Feedback Pin Current Figure 25. Figure 26. Error Output Comparator Sink Current Figure 27. Figure 28. Divider Resistance Dropout Detection Comparator Threshold Voltages Figure 29. Figure 30. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP2952-N LP2952A LP2953 LP2953A LP2952-N, LP2952A, LP2953, LP2953A www.ti.com SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Unless otherwise specified: VIN = 6V, IL = 1 mA, CL = 2.2 F, VSD = 3V, TA = 25C, VOUT = 5V. Thermal Regulation Minimum Operating Voltage Figure 31. Figure 32. Dropout Voltage Figure 33. Copyright (c) 2004-2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LP2952-N LP2952A LP2953 LP2953A 13 LP2952-N, LP2952A, LP2953, LP2953A SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 www.ti.com SCHEMATIC DIAGRAM 14 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP2952-N LP2952A LP2953 LP2953A LP2952-N, LP2952A, LP2953, LP2953A www.ti.com SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 APPLICATION HINTS Heatsink Requirements (Industrial Temperature Range Devices) The maximum allowable power dissipation for the LP2952/LP2953 is limited by the maximum junction temperature (+125C) and the external factors that determine how quickly heat flows away from the part: the ambient temperature and the junction-to-ambient thermal resistance for the specific application. The industrial temperature range (-40C TJ +125C) parts are manufactured in PDIP and surface mount packages which contain a copper lead frame that allows heat to be effectively conducted away from the die, through the ground pins of the IC, and into the copper of the PC board. Details on heatsinking using PC board copper are covered later. To determine if a heatsink is required, the maximum power dissipated by the regulator, P(max), must be calculated. It is important to remember that if the regulator is powered from a transformer connected to the AC line, the maximum specified AC input voltage must be used (since this produces the maximum DC input voltage to the regulator). Figure 34 shows the voltages and currents which are present in the circuit. The formula for calculating the power dissipated in the regulator is also shown in Figure 34: Figure 34. PTOTAL = (VIN - VOUT) IL + (VIN) IG Current/Voltage Diagram The next parameter which must be calculated is the maximum allowable temperature rise, TR(max). This is calculated by using the formula: TR(max) = TJ(max) - TA(max)(J-A) = TR(max)/P(max) where * * TJ(max) is the maximum allowable junction temperature TA(max) is the maximum ambient temperature (1) Using the calculated values for TR(max) and P(max), the required value for junction-to-ambient thermal resistance, (J-A), can now be found: The heatsink is made using the PC board copper. The heat is conducted from the die, through the lead frame (inside the part), and out the pins which are soldered to the PC board. The pins used for heat conduction are given in Table 1. Table 1. Heat Conducting Pins Part LP2952IN, LP2952AIN, Package Pins 14-Pin PDIP 3, 4, 5, 16-Pin PDIP 4, 5, 12, 13 16-Pin Surface Mount 1, 8, 9, 16 LP2952IN-3.3, LP2952AIN-3.3 10, 11, 12 LP2953IN, LP2953AIN, LP2953IN-3.3, LP2953AIN-3.3 LP2952IM, LP2952AIM, LP2952IM-3.3, LP2952AIM-3.3, LP2953IM, LP2953AIM, LP2953IM-3.3, LP2953AIM-3.3 Copyright (c) 2004-2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LP2952-N LP2952A LP2953 LP2953A 15 LP2952-N, LP2952A, LP2953, LP2953A SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 www.ti.com Figure 35 shows copper patterns which may be used to dissipate heat from the LP2952 and LP2953. Table 2 shows some values of junction-to-ambient thermal resistance (J-A) for values of L and W for 1 oz. copper. * For best results, use L = 2H ** 14-Pin PDIP is similar, refer to Table 1 for pins designated for heatsinking. Figure 35. Copper Heatsink Patterns Table 2. Thermal Resistance for Various Copper Heatsink Patterns Package 16-Pin PDIP 14-Pin PDIP Surface Mount L (in.) H (in.) J-A (C/W) 1 0.5 70 2 1 60 3 1.5 58 4 0.19 66 6 0.19 66 1 0.5 65 2 1 51 3 1.5 49 1 0.5 83 2 1 70 3 1.5 67 6 0.19 69 4 0.19 71 2 0.19 73 Heatsink Requirements (Military Temperature Range Devices) The maximum allowable power dissipation for the LP2953AMJ is limited by the maximum junction temperature (+150C) and the two parameters that determine how quickly heat flows away from the die: the ambient temperature and the junction-to-ambient thermal resistance of the part. The military temperature range (-55C TJ +150C) parts are manufactured in CDIP packages which contain a KOVAR lead frame (unlike the industrial parts, which have a copper lead frame). The KOVAR material is necessary to attain the hermetic seal required in military applications. 16 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP2952-N LP2952A LP2953 LP2953A LP2952-N, LP2952A, LP2953, LP2953A www.ti.com SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 The KOVAR lead frame does not conduct heat as well as copper, which means that the PC board copper can not be used to significantly reduce the overall junction-to-ambient thermal resistance in applications using the LP2953AMJ part. The power dissipation calculations for military applications are done exactly the same as was detailed in the previous section, with one important exception: the value for (J-A), the junction-to-ambient thermal resistance, is fixed at 95C/W and can not be changed by adding copper foil patterns to the PC board. This leads to an important fact: The maximum allowable power dissipation in any application using the LP2953AMJ is dependent only on the ambient temperature: (2) Figure 36 shows a graph of maximum allowable power dissipation vs. ambient temperature for the LP2953AMJ, made using the 95C/W value for (J-A) and assuming a maximum junction temperature of 150C (caution: the maximum ambient temperature which will be reached in a given application must always be used to calculate maximum allowable power dissipation). External Capacitors A 2.2 F (or greater) capacitor is required between the output pin and ground to assure stability when the output is set to 5V. Without this capacitor, the part will oscillate. Most type of tantalum or aluminum electrolytics will work here. Film types will work, but are more expensive. Many aluminum electrolytics contain electrolytes which freeze at -30C, which requires the use of solid tantalums below -25C. The important parameters of the capacitor are an ESR of about 5 or less and a resonant frequency above 500 kHz (the ESR may increase by a factor of 20 or 30 as the temperature is reduced from 25C to -30C). The value of this capacitor may be increased without limit. At lower values of output current, less output capacitance is required for stability. The capacitor can be reduced to 0.68 F for currents below 10 mA or 0.22 F for currents below 1 mA. Programming the output for voltages below 5V runs the error amplifier at lower gains requiring more output capacitance for stability. At 3.3V output, a minimum of 4.7 F is required. For the worst-case condition of 1.23V output and 250 mA of load current, a 6.8 F (or larger) capacitor should be used. A 1 F capacitor should be placed from the input pin to ground if there is more than 10 inches of wire between the input and the AC filter capacitor or if a battery input is used. Stray capacitance to the Feedback terminal can cause instability. This problem is most likely to appear when using high value external resistors to set the output voltage. Adding a 100 pF capacitor between the Output and Feedback pins and increasing the output capacitance to 6.8 F (or greater) will cure the problem. Minimum Load When setting the output voltage using an external resistive divider, a minimum current of 1 A is recommended through the resistors to provide a minimum load. It should be noted that a minimum load current is specified in several of the electrical characteristic test conditions, so this value must be used to obtain correlation on these tested limits. Copyright (c) 2004-2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LP2952-N LP2952A LP2953 LP2953A 17 LP2952-N, LP2952A, LP2953, LP2953A SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 www.ti.com Figure 36. Power Derating Curve for LP2953AMJ Programming the Output Voltage The regulator may be pin-strapped for 5V operation using its internal resistive divider by tying the Output and Sense pins together and also tying the Feedback and 5V Tap pins together. Alternatively, it may be programmed for any voltage between the 1.23V reference and the 30V maximum rating using an external pair of resistors (see Figure 37). The complete equation for the output voltage is: where * VREF is the 1.23V reference and IFB is the Feedback pin bias current (-20 nA typical). The minimum recommended load current of 1 A sets an upper limit of 1.2 M on the value of R2 in cases where the regulator must work with no load (see MINIMUM LOAD ). IFB will produce a typical 2% error in VOUT which can be eliminated at room temperature by trimming R1. For better accuracy, choosing R2 = 100 k will reduce this error to 0.17% while increasing the resistor program current to 12 A. Since the typical quiescent current is 120 A, this added current is negligible. (3) * SeeApplication Hints ** Drive with TTL-low to shut down Figure 37. Adjustable Regulator Dropout Voltage The dropout voltage of the regulator is defined as the minimum input-to-output voltage differential required for the output voltage to stay within 100 mV of the output voltage measured with a 1V differential. The dropout voltage is independent of the programmed output voltage. 18 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP2952-N LP2952A LP2953 LP2953A LP2952-N, LP2952A, LP2953, LP2953A www.ti.com SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 Dropout Detection Comparator This comparator produces a logic "LOW" whenever the output falls out of regulation by more than about 5%. This figure results from the comparator's built-in offset of 60 mV divided by the 1.23V reference (refer to Block Diagrams). The 5% low trip level remains constant regardless of the programmed output voltage. An out-ofregulation condition can result from low input voltage, current limiting, or thermal limiting. Figure 38 gives a timing diagram showing the relationship between the output voltage, the ERROR output, and input voltage as the input voltage is ramped up and down to a regulator programmed for 5V output. The ERROR signal becomes low at about 1.3V input. It goes high at about 5V input, where the output equals 4.75V. Since the dropout voltage is load dependent, the input voltage trip points will vary with load current. The output voltage trip point does not vary. The comparator has an open-collector output which requires an external pull-up resistor. This resistor may be connected to the regulator output or some other supply voltage. Using the regulator output prevents an invalid "HIGH" on the comparator output which occurs if it is pulled up to an external voltage while the regulator input voltage is reduced below 1.3V. In selecting a value for the pull-up resistor, note that while the output can sink 400 A, this current adds to battery drain. Suggested values range from 100 k to 1 M. This resistor is not required if the output is unused. When VIN 1.3V, the error flag pin becomes a high impedance, allowing the error flag voltage to rise to its pullup voltage. Using VOUT as the pull-up voltage (rather than an external 5V source) will keep the error flag voltage below 1.2V (typical) in this condition. The user may wish to divide down the error flag voltage using equal-value resistors (10 k suggested) to ensure a low-level logic signal during any fault condition, while still allowing a valid high logic level during normal operation. * In shutdown mode, ERROR will go high if it has been pulled up to an external supply. To avoid this invalid response, pull up to regulator output. ** Exact value depends on dropout voltage. (See Application Hints) Figure 38. ERROR Output Timing Output Isolation The regulator output can be left connected to an active voltage source (such as a battery) with the regulator input power shut off, as long as the regulator ground pin is connected to ground. If the ground pin is left floating, damage to the regulator can occur if the output is pulled up by an external voltage source. Reducing Output Noise In reference applications it may be advantageous to reduce the AC noise present on the output. One method is to reduce regulator bandwidth by increasing output capacitance. This is relatively inefficient, since large increases in capacitance are required to get significant improvement. Noise can be reduced more effectively by a bypass capacitor placed across R1 (refer to Figure 37). The formula for selecting the capacitor to be used is: (4) Copyright (c) 2004-2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LP2952-N LP2952A LP2953 LP2953A 19 LP2952-N, LP2952A, LP2953, LP2953A SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 www.ti.com This gives a value of about 0.1 F. When this is used, the output capacitor must be 6.8 F (or greater) to maintain stability. The 0.1 F capacitor reduces the high frequency gain of the circuit to unity, lowering the output noise from 260 V to 80 V using a 10 Hz to 100 kHz bandwidth. Also, noise is no longer proportional to the output voltage, so improvements are more pronounced at high output voltages. Auxiliary Comparator (LP2953 only) The LP2953 contains an auxiliary comparator whose inverting input is connected to the 1.23V reference. The auxiliary comparator has an open-collector output whose electrical characteristics are similar to the dropout detection comparator. The non-inverting input and output are brought out for external connections. Shutdown Input A logic-level signal will shut off the regulator output when a "LOW" (<1.2V) is applied to the Shutdown input. To prevent possible mis-operation, the Shutdown input must be actively terminated. If the input is driven from open-collector logic, a pull-up resistor (20 k to 100 k recommended) should be connected from the Shutdown input to the regulator input. If the Shutdown input is driven from a source that actively pulls high and low (like an op-amp), the pull-up resistor is not required, but may be used. If the shutdown function is not to be used, the cost of the pull-up resistor can be saved by simply tying the Shutdown input directly to the regulator input. IMPORTANT: Since the Absolute Maximum Ratings state that the Shutdown input can not go more than 0.3V below ground, the reverse-battery protection feature which protects the regulator input is sacrificed if the Shutdown input is tied directly to the regulator input. If reverse-battery protection is required in an application, the pull-up resistor between the Shutdown input and the regulator input must be used. 20 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP2952-N LP2952A LP2953 LP2953A LP2952-N, LP2952A, LP2953, LP2953A www.ti.com SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 Typical Applications Figure 39. Basic 5V Regulator * Output voltage equals +VIN minum dropout voltage, which varies with output current. Current limits at a maximum of 380 mA (typical). ** Select R1 so that the comparator input voltage is 1.23V at the output voltage which corresponds to the desired fault current value. Figure 40. 5V Current Limiter with Load Fault Indicator Figure 41. Low T.C. Current Sink Copyright (c) 2004-2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LP2952-N LP2952A LP2953 LP2953A 21 LP2952-N, LP2952A, LP2953, LP2953A SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 www.ti.com * Connect to Logic or P control inputs. LOW BATT flag warns the user that the battery has discharged down to about 5.8V, giving the user time to recharge the battery or power down some hardware with high power requirements. The output is still in regulation at this time. OUT OF REGULATION flag indicates when the battery is almost completely discharged, and can be used to initiate a power-down sequence. Figure 42. 5V Regulator with Error Flags for LOW BATTERY and OUT OF REGULATION The circuit switches to the NI-CAD backup battery when the main battery voltage drops below about 5.6V, and returns to the main battery when its voltage is recharged to about 6V. The 5V MAIN output powers circuitry which requires no backup, and the 5V MEMORY output powers critical circuitry which can not be allowed to lose power. * The BATTERY LOW flag goes low whenever the circuit switches to the NI-CAD backup battery. Figure 43. 5V Battery Powered Supply with Backup and Low Battery Flag Figure 44. 5V Regulator with Timed Power-On Reset 22 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP2952-N LP2952A LP2953 LP2953A LP2952-N, LP2952A, LP2953, LP2953A www.ti.com SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 * RT = 1 MEG, CT = 0.1 F Figure 45. Timing Diagram for Timed Power-On Reset * Turns ON at VIN = 5.87V Turns OFF at VIN = 5.64V (for component values shown) Figure 46. 5V Regulator with Snap-On/Snap-Off Feature and Hysteresis * Connect to Logic or P control inputs. OUTPUT has SNAP-ON/SNAP-OFF feature. LOW BATT flag warns the user that the battery has discharged down to about 5.8V, giving the user time to recharge the battery or shut down hardware with high power requirements. The output is still in regulation at this time. OUT OF REGULATION flag goes low if the output goes below about 4.7V, which could occur from a load fault. OUTPUT has SNAP-ON/SNAP-OFF feature. Regulator snaps ON at about 5.7V input, and OFF at about 5.6V. Figure 47. 5V Regulator with Error Flags for LOW BATTERY and OUT OF REGULATION with SNAPON/SNAP-OFF Output Copyright (c) 2004-2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LP2952-N LP2952A LP2953 LP2953A 23 LP2952-N, LP2952A, LP2953, LP2953A SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 www.ti.com Figure 48. 5V Regulator with Timed Power-On Reset, Snap-On/Snap-Off Feature and Hysteresis Td = (0.28) RC = 28 ms for components shown. Figure 49. Timing Diagram 24 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LP2952-N LP2952A LP2953 LP2953A LP2952-N, LP2952A, LP2953, LP2953A www.ti.com SNVS095D - MAY 2004 - REVISED SEPTEMBER 2013 REVISION HISTORY Changes from Revision C (March 2005) to Revision D * Page layout of National Data Sheet to TI format ......................................................................................................................... 24 Copyright (c) 2004-2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: LP2952-N LP2952A LP2953 LP2953A 25 PACKAGE OPTION ADDENDUM www.ti.com 23-Sep-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty LP2952AIM ACTIVE SOIC D 16 LP2952AIM-3.3 ACTIVE SOIC D 16 LP2952AIM-3.3/NOPB ACTIVE SOIC D 16 LP2952AIM/NOPB ACTIVE SOIC D LP2952AIMX ACTIVE SOIC LP2952AIMX/NOPB ACTIVE LP2952IM 48 Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) TBD Call TI Call TI -40 to 125 LP2952AIM TBD Call TI Call TI -40 to 125 LP2952AIM -3.3 48 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LP2952AIM -3.3 16 48 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LP2952AIM D 16 2500 TBD Call TI Call TI -40 to 125 LP2952AIM SOIC D 16 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LP2952AIM ACTIVE SOIC D 16 48 TBD Call TI Call TI -40 to 125 LP2952IM LP2952IM/NOPB ACTIVE SOIC D 16 48 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LP2952IM LP2952IMX ACTIVE SOIC D 16 TBD Call TI Call TI -40 to 125 LP2952IM LP2952IMX-3.3 ACTIVE SOIC D 16 TBD Call TI Call TI -40 to 125 LP2952IM -3.3 LP2952IMX-3.3/NOPB ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LP2952IM -3.3 LP2952IMX/NOPB ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LP2952IM LP2953AIM/NOPB ACTIVE SOIC D 16 48 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LP2953AIM LP2953AIMX ACTIVE SOIC D 16 TBD Call TI Call TI -40 to 125 LP2953AIM LP2953AIMX/NOPB ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LP2953AIM LP2953IM ACTIVE SOIC D 16 48 TBD Call TI Call TI -40 to 125 LP2953IM LP2953IM/NOPB ACTIVE SOIC D 16 48 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LP2953IM LP2953IMX ACTIVE SOIC D 16 TBD Call TI Call TI -40 to 125 LP2953IM Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 23-Sep-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty LP2953IMX/NOPB ACTIVE SOIC D 16 LP2953IN ACTIVE PDIP NBG 16 LP2953IN/NOPB ACTIVE PDIP NBG 16 2500 20 Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LP2953IM TBD Call TI Call TI -40 to 125 LP2953IN Green (RoHS & no Sb/Br) CU SN Level-1-NA-UNLIM -40 to 125 LP2953IN (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 Samples PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LP2952AIMX SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.0 Q1 LP2952AIMX/NOPB SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.0 Q1 LP2952IMX-3.3/NOPB SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.0 Q1 LP2952IMX/NOPB SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.0 Q1 LP2953AIMX/NOPB SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.0 Q1 LP2953IMX/NOPB SOIC D 16 2500 330.0 16.4 6.5 10.3 2.3 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LP2952AIMX SOIC D 16 2500 367.0 367.0 35.0 LP2952AIMX/NOPB SOIC D 16 2500 367.0 367.0 35.0 LP2952IMX-3.3/NOPB SOIC D 16 2500 367.0 367.0 35.0 LP2952IMX/NOPB SOIC D 16 2500 367.0 367.0 35.0 LP2953AIMX/NOPB SOIC D 16 2500 367.0 367.0 35.0 LP2953IMX/NOPB SOIC D 16 2500 367.0 367.0 35.0 Pack Materials-Page 2 MECHANICAL DATA NBG0016G www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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