LF147D/883 - National Semiconductor

LF147/LF347

Wide Bandwidth Quad JFET Input Operational Amplifiers

General Description

The LF147 is a low cost, high speed quad JFET input opera-

tional amplifier with an internally trimmed input offset voltage

(BI-FET II™technology). The device requires a low supply

current and yet maintains a large gain bandwidth product

and a fast slew rate. In addition, well matched high voltage

JFET input devices provide very low input bias and offset

currents. The LF147 is pin compatible with the standard

LM148. This feature allows designers to immediately up-

grade the overall performance of existing LF148 and LM124

designs.

The LF147 may be used in applications such as high speed

integrators, fast D/A converters, sample-and-hold circuits

and many other circuits requiring low input offset voltage,

low input bias current, high input impedance, high slew rate

and wide bandwidth. The device has low noise and offset

voltage drift.

Features

nInternally trimmed offset voltage: 5 mV max

nLow input bias current: 50 pA

nLow input noise current:

nWide gain bandwidth: 4 MHz

nHigh slew rate: 13 V/µs

nLow supply current: 7.2 mA

nHigh input impedance: 10

Ω

nLow total harmonic distortion A

=10,: <0.02%

=10k, V

=20 Vp-p, BW=20 Hz−20 kHz

nLow 1/f noise corner: 50 Hz

nFast settling time to 0.01%:2µs

Simplified Schematic Connection Diagram

BI-FET II™is a trademark of National Semiconductor Corporation.

⁄

Quad

DS005647-13

Dual-In-Line Package

DS005647-1

Note 1: Available per SMD #8102306, JM38510/11906.

Top View

Order Number LF147J, LF347M, LF347BN,

LF347N, LF147D/883 or LF147J/883 (Note 1)

See NS Package Number D14E, J14A, M14A or N14A

April 1998

LF147/LF347 Wide Bandwidth Quad JFET Input Operational Amplifiers

Absolute Maximum Ratings (Note 2)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

LF147 LF347B/LF347

Supply Voltage ±22V ±18V

Differential Input Voltage ±38V ±30V

Input Voltage Range ±19V ±15V

(Note 3)

Output Short Circuit Continuous Continuous

Duration (Note 4)

Power Dissipation 900 mW 1000 mW

(Notes 5, 11)

max 150˚C 150˚C

Cavity DIP (D) Package 80˚C/W

Ceramic DIP (J) Package 70˚C/W

Plastic DIP (N) Package 75˚C/W

Surface Mount Narrow (M) 100˚C/W

LF147 LF347B/LF347

Surface Mount Wide (WM) 85˚C/W

Operating Temperature (Note 6) (Note 6)

Range

Storage Temperature

Range −65˚C≤T

≤150˚C

Lead Temperature

(Soldering, 10 sec.) 260˚C 260˚C

Soldering Information

Dual-In-Line Package

Soldering (10 seconds) 260˚C

Small Outline Package

Vapor Phase (60 seconds) 215˚C

Infrared (15 seconds) 220˚C

See AN-450 “Surface Mounting Methods and Their Effect

on Product Reliability” for other methods of soldering

surface mount devices.

ESD Tolerance (Note 12) 900V

DC Electrical Characteristics (Note 7)

Symbol Parameter Conditions LF147 LF347B LF347 Units

Min Typ Max Min Typ Max Min Typ Max

VOS Input Offset Voltage RS=10 kΩ,T

25˚C 1 5 3 5 5 10 mV

Over Temperature 8 7 13 mV

∆VOS/∆T Average TC of Input Offset RS=10 kΩ10 10 10 µV/˚C

Voltage

IOS Input Offset Current Tj=25˚C, (Notes 7, 8) 25 100 25 100 25 100 pA

Over Temperature 25 4 4 nA

IBInput Bias Current Tj=25˚C, (Notes 7, 8) 50 200 50 200 50 200 pA

Over Temperature 50 8 8 nA

RIN Input Resistance Tj=25˚C 1012 1012 1012 Ω

AVOL Large Signal Voltage Gain VS=±15V, TA=25˚C 50 100 50 100 25 100 V/mV

VO=±10V, RL=2kΩ

Over Temperature 25 25 15 V/mV

VOOutput Voltage Swing VS=±15V, RL=10 kΩ±12 ±13.5 ±12 ±13.5 ±12 ±13.5 V

VCM Input Common-Mode Voltage VS=±15V ±11 +15 ±11 +15 ±11 +15 V

Range −12 −12 −12 V

CMRR Common-Mode Rejection Ratio RS≤10 kΩ80 100 80 100 70 100 dB

PSRR Supply Voltage Rejection Ratio (Note 9) 80 100 80 100 70 100 dB

ISSupply Current 7.2 11 7.2 11 7.2 11 mA

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AC Electrical Characteristics (Note 7)

Symbol Parameter Conditions LF147 LF347B LF347 Units

Min Typ Max Min Typ Max Min Typ Max

Amplifier to Amplifier Coupling TA=25˚C, −120 −120 −120 dB

f=1 Hz−20 kHz

(Input Referred)

SR Slew Rate VS=±15V, TA=25˚C 8 13 8 13 8 13 V/µs

GBW Gain-Bandwidth Product VS=±15V, TA=25˚C 2.2 4 2.2 4 2.2 4 MHz

enEquivalent Input Noise Voltage TA=25˚C, RS=100Ω,202020

1000 Hz

inEquivalent Input Noise Current Tj=25˚C, f=1000 Hz 0.01 0.01 0.01

Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func-

tional, but do not guarantee specific performance limits.

Note 3: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.

Note 4: Any of the amplifier outputs can be shorted to ground indefinitely, however, more than one should not be simultaneously shorted as the maximum junction

temperature will be exceeded.

Note 5: For operating at elevated temperature, these devices must be derated based on a thermal resistance of θjA.

Note 6: The LF147 is available in the military temperature range −55˚C≤TA≤125˚C, while the LF347B and the LF347 are available in the commercial temperature

range 0˚C≤TA≤70˚C. Junction temperature can rise to Tjmax =150˚C.

Note 7: Unless otherwise specified the specifications apply over the full temperature range and for VS=±20V for the LF147 and for VS=±15V for the LF347B/LF347.

VOS,I

, and IOS are measured at VCM=0.

Note 8: The input bias currents are junction leakage currents which approximately double for every 10˚C increase in the junction temperature, Tj. Due to limited pro-

duction test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient tem-

perature as a result of internal power dissipation, PD.T

j=T

+θ

jA PDwhere θjA is the thermal resistance from junction to ambient. Use of a heat sink is recommended

if input bias current is to be kept to a minimum.

Note 9: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice from

VS=±5V to ±15V for the LF347 and LF347B and from VS=±20V to ±5V for the LF147.

Note 10: Refer to RETS147X for LF147D and LF147J military specifications.

Note 11: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate out-

side guaranteed limits.

Note 12: Human body model, 1.5 kΩin series with 100 pF.

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Typical Performance Characteristics

Input Bias Current

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Input Bias Current

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Supply Current

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Positive Common-Mode

Input Voltage Limit

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Negative Common-Mode

Input Voltage Limit

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Positive Current Limit

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Negative Current Limit

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Output Voltage Swing

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Output Voltage Swing

DS005647-22

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Typical Performance Characteristics (Continued)

Gain Bandwidth

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Bode Plot

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Slew Rate

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Distortion vs Frequency

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Undistorted Output Voltage

Swing

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Open Loop Frequency

Response

DS005647-28

Common-Mode Rejection

Ratio

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Power Supply Rejection

Ratio

DS005647-30

Equivalent Input Noise

Voltage

DS005647-31

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Typical Performance Characteristics (Continued)

Open Loop Voltage Gain

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Output Impedance

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Inverter Settling Time

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Pulse Response R

=2kΩ,C

10 pF

Application Hints

The LF147 is an op amp with an internally trimmed input off-

set voltage and JFET input devices (BI-FET II).These JFETs

have large reverse breakdown voltages from gate to source

and drain eliminating the need for clamps across the inputs.

Therefore, large differential input voltages can easily be ac-

commodated without a large increase in input current. The

maximum differential input voltage is independent of the sup-

ply voltages. However, neither of the input voltages should

be allowed to exceed the negative supply as this will cause

large currents to flow which can result in a destroyed unit.

Exceeding the negative common-mode limit on either input

will force the output to a high state, potentially causing a re-

versal of phase to the output. Exceeding the negative

common-mode limit on both inputs will force the amplifier

output to a high state. In neither case does a latch occur

since raising the input back within the common-mode range

again puts the input stage and thus the amplifier in a normal

operating mode.

Small Signal Inverting

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Small Signal Non-Inverting

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Large Signal Inverting

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Large Signal Non-Inverting

DS005647-7

Current Limit (R

=100Ω)

DS005647-8

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Application Hints (Continued)

Exceeding the positive common-mode limit on a single input

will not change the phase of the output; however, if both in-

puts exceed the limit, the output of the amplifier will be forced

to a high state.

The amplifiers will operate with a common-mode input volt-

age equal to the positive supply; however, the gain band-

width and slew rate may be decreased in this condition.

When the negative common-mode voltage swings to within

3V of the negative supply, an increase in input offset voltage

may occur.

Each amplifier is individually biased by a zener reference

which allows normal circuit operation on ±4.5V power sup-

plies. Supply voltages less than these may result in lower

gain bandwidth and slew rate.

The LF147 will drivea2kΩload resistance to ±10V over the

full temperature range. If the amplifier is forced to drive

heavier load currents, however, an increase in input offset

voltage may occur on the negative voltage swing and finally

reach an active current limit on both positive and negative

swings.

Precautions should be taken to ensure that the power supply

for the integrated circuit never becomes reversed in polarity

or that the unit is not inadvertently installed backwards in a

socket as an unlimited current surge through the resulting

forward diode within the IC could cause fusing of the internal

conductors and result in a destroyed unit.

As with most amplifiers, care should be taken with lead

dress, component placement and supply decoupling in order

to ensure stability. For example, resistors from the output to

an input should be placed with the body close to the input to

minimize “pick-up” and maximize the frequency of the feed-

back pole by minimizing the capacitance from the input to

ground.

A feedback pole is created when the feedback around any

amplifier is resistive. The parallel resistance and capacitance

from the input of the device (usually the inverting input) toAC

ground set the frequency of the pole. In many instances the

frequency of this pole is much greater than the expected 3

dB frequency of the closed loop gain and consequently there

is negligible effect on stability margin. However, if the feed-

back pole is less than approximately 6 times the expected 3

dB frequency a lead capacitor should be placed from the out-

put to the input of the op amp. The value of the added ca-

pacitor should be such that the RC time constant of this ca-

pacitor and the resistance it parallels is greater than or equal

to the original feedback pole time constant.

Detailed Schematic

DS005647-9

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Typical Applications

Digitally Selectable Precision Attenuator

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All resistors 1%tolerance

•Accuracy of better than 0.4%with standard 1%value resistors

•No offset adjustment necessary

•Expandable to any number of stages

•Very high input impedance

A1 A2 A3 V

Attenuation

000 0

0 0 1 −1 dB

0 1 0 −2 dB

0 1 1 −3 dB

1 0 0 −4 dB

1 0 1 −5 dB

1 1 0 −6 dB

1 1 1 −7 dB

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Typical Applications (Continued)

Long Time Integrator with Reset, Hold and Starting Threshold Adjustment

DS005647-11

•V

OUT

starts from zero and is equal to the integral of the input voltage with respect to the threshold voltage:

•Output starts when V

≥V

•Switch S1 permits stopping and holding any output value

•Switch S2 resets system to zero

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Typical Applications (Continued)

Universal State Variable Filter

DS005647-12

For circuit shown:

fo=3 kHz, fNOTCH=9.5 kHz

Q=3.4

Passband gain:

Highpass — 0.1

Bandpass — 1

Lowpass — 1

Notch — 10

•foxQ≤200 kHz

•10V peak sinusoidal output swing without slew limiting to 200 kHz

•See LM148 data sheet for design equations

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Physical Dimensions inches (millimeters) unless otherwise noted

Hermetic Dual-In-Line Package (D)

Order Number LF147D/883

NS Package Number D14E

Ceramic Dual-In-Line Package (J)

Order Number LF147J or LF147J/883

NS Package Number J14A

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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

S.O. Package (M)

Order Number LF347M

NS Package Number M14A

Molded Dual-In-Line Package (N)

Order Number LF347BN or LF347N

NS Package Number N14A

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Notes

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL

SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant

into the body, or (b) support or sustain life, and

whose failure to perform when properly used in

accordance with instructions for use provided in the

labeling, can be reasonably expected to result in a

significant injury to the user.

2. A critical component is any component of a life

support device or system whose failure to perform

can be reasonably expected to cause the failure of

the life support device or system, or to affect its

safety or effectiveness.

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LF147/LF347 Wide Bandwidth Quad JFET Input Operational Amplifiers

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.