Dual Value Chip Resistors, Center Tap
TA 33
Vishay Sfernice
www.vishay.com For technical questions, contact: sfer@vishay.com Document Number: 60066
42 Revision: 10-Sep-09
These tantalum chips combine excellent stability 0.07 %
(2000 h, rated power at + 70 °C) with great power handling
capacity. Two bonding pads per termination allow greater
flexibility in hybrid layout design.
FEATURES
•Center tap feature
•Resistor material: Self-passivating
Tantalum nitride
•Silicon substrate for good power dissipation
•Wirebondable
•Compliant to RoHS directive 2002/95/EC
TYPICAL PERFORMANCE
SCHEMATIC
** Please see document “Vishay Material Category Policy”: www.vishay.com/doc?99902
Actual Size
ABS TRACKING
TCR 100 ppm/°C 5 ppm/°C
ABS RATIO
TOL. 0.5 % 0.5 %
RT = R1 + R2 with R1 = R2 Standard
R1R2
RT
STANDARD ELECTRICAL SPECIFICATIONS
TEST SPECIFICATIONS CONDITIONS
Material Tantalum nitride
Resistance range 50 Ω to 1 MΩFor RT = R1 + R2
TCR
Tracking ± 5 ppm/°C - 55 °C to + 155 °C
Absolute ± 100 ppm/°C (± 50 ppm/°C on request) - 55 °C to + 155 °C
Ohmic value Ratio 1/1 standard (unequal values: please consult)
Tolerance
Absolute ± 0.5 %, ± 1 %, ± 2 %
Matching ± 0.1 %, ± 0.5 %
Power dissipation 250 mW at + 25 °C, 125 mW at + 70 °C, 50 mW at + 125 °C
Stability ± 0.07 % typical, ± 0.1 maximum 2000 h at + 70 °C under Pn
Working voltage 50 VDC on RT
Operating temperature range - 55 °C to + 155 °C
Storage temperature range - 55 °C to + 155 °C
Noise < - 35 dB typical MIL-STD-202 Method 308
Thermal EMF 0.01 µV/°C
Shelf life stability 100 ppm 1 year at + 25 °C