LT1910
1
1910fc
For more information www.linear.com/LT1910
TYPICAL APPLICATION
DESCRIPTION
Protected High Side
MOSFET Driver
The LT
®
1910 is a high side gate driver that allows the use of
low cost N-channel power MOSFETs for high side switching
applications. It contains a completely self-contained charge
pump to fully enhance an N-channel MOSFET switch with
no external components.
When the internal drain comparator senses that the switch
current has exceeded the preset level, the switch is turned
off and a fault flag is asserted. The switch remains off for
a period of time set by an external timing capacitor and
then automatically attempts to restart. If the fault still
exists, this cycle repeats until the fault is removed, thus
protecting the MOSFET. The fault flag becomes inactive
once the switch restarts successfully.
The LT1910 has been specifically designed for harsh
operating environments such as industrial, avionics and
automotive applications where poor supply regulation and/
or transients may be present. The device will not sustain
damage from supply transients of –15V to 60V.
The LT1910 is available in the SO-8 package.
Fault Protected High Side Switch
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
PowerPath and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks
are the property of their respective owners.
FEATURES
APPLICATIONS
n 8V to 48V Power Supply Range
n Protected from –15V to 60V Supply Transients
n Short-Circuit Protected
n Automatic Restart Timer
n Open-Collector Fault Flag
n Fully Enhances N-Channel MOSFET Switches
n Programmable Current Limit, Delay Time and
Autorestart Period
n Voltage Limited Gate Drive
n Defaults to Off State with Open Input
n Available in SO-8 Package
n Industrial Control
n Avionics Systems
n Automotive Switches
n Stepper Motor and DC Motor Control
n Electronic Circuit Breaker
Switch Drop vs Load Current
FAULT
IN
TIMER
V+
SENSE
GATE
LT1910
5.1k
24V5V
FAULT OUTPUT
OFF ON
GND
IRFZ34
1910 TA01
10µF
50V
0.1µF
0.01Ω
LOAD
+
LOAD CURRENT (A)
0
TOTAL DROP (V)
0.30
0.40
0.50
4
1910 TA02
0.20
0.10
0.25
0.35
0.45
0.15
0.05
01235
LT1910
2
1910fc
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Supply Voltage (Pin 8) ............................... –15V to 60V
Input Voltage (Pin 4) ..................... (GND – 0.3V) to 15V
GATE Voltage (Pin 5) ................................................ 75V
SENSE Voltage (Pin 6) ........................................ V+ ±5V
FAULT Voltage (Pin 3) .............................................. 36V
Current (Pins 1, 2, 4, 5, 6, 8) ................................ 40mA
Operating Temperature Range (Note 2)
LT1910E ............................................... –40°C to 85°C
LT1910I .............................................. –40°C to 125°C
Junction Temperature Range ................ –40°C to 125°C
Storage Temperature Range ................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
(Note 1)
1
2
3
4
8
7
6
5
TOP VIEW
V+
NC
SENSE
GATE
GND
TIMER
FAULT
IN
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 125°C, θJA = 150°C/W
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LT1910ES8#PBF LT1910ES8#TRPBF 1910 8-Lead Plastic SO –40°C to 85°C
LT1910IS8#PBF LT1910IS8#TRPBF 1910 8-Lead Plastic SO –40°C to 125°C
LEAD BASED FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LT1910ES8 LT1910ES8#TR 1910 8-Lead Plastic SO –40°C to 85°C
LT1910IS8 LT1910IS8#TR 1910 8-Lead Plastic SO –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 12V to 48V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
ISSupply Current (Off State) V+ = 48V, VIN = 0.8V 1.2 1.9 2.5 mA
∆IS(ON) Delta Supply Current (On State) VIN = 2V, Measure Increase in IS0.8 1.2 mA
VINH Input High Voltage E-Grade
I-Grade
l
l
2
3.5
V
V
VINL Input Low Voltage E-Grade
I-Grade
l
l
0.8
0.7
V
V
IIN Input Current VIN = 2V
VIN = 5V
l
l
15
55
30
110
50
185
µA
µA
CIN Input Capacitance (Note 3) 5 pF
VT(TH) Timer Threshold Voltage VIN = 2V, Adjust VTl2.6 2.9 3.2 V
VT(CL) Timer Clamp Voltage VIN = 0.8V 3.2 3.5 3.8 V
ITTimer Charge Current VIN = VT = 2V 9 14 20 µA
VSENSE Drain-Sense Threshold Voltage Temperature
Coefficient (Note 3)
50 65
0.33
80 mV
%/°C
LT1910
3
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ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT1910E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 12V to 48V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
ISENSE Drain Sense Input Current V+ = 48V, VSENSE = 65mV 0.5 1.5 µA
VGATE – V+Gate Voltage Above Supply V+ = 8V
V+ = 12V
l
4
7
4.5
8.5
6
10
V
V
V+ = 24V
E-Grade
I-Grade
l
l
10
10
12
12
14
15
V
V
V+ = 48V
E-Grade
I-Grade
l
l
10
10
12
12
14
15
V
V
VF(TH) FAULT Output High Threshold Voltage
FAULT Output Low Threshold Voltage
VIN = 2V, IF = 1mA, Adjust VT3.1
3.0
3.4
3.3
3.7
3.6
V
V
VFOL FAULT Output Low Voltage IF = 1mA l0.07 0.4 V
tON Turn-On Time V+ = 24V, VGATE = 32V, CGATE = 1nF 100 220 400 µs
tOFF Turn-Off Time V+ = 24V, VGATE = 2V, CGATE = 1nF 25 100 µs
tOFF(CL) Current Limit Turn-Off Time V+ = 24V, (V+ – VSENSE)→0.1V, CGATE = 1nF 20 50 µs
with statistical process controls. The LT1910I is guaranteed to meet
performance specifications over the full –40°C to 125°C operating
temperature range.
Note 3: Guaranteed but not tested.
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Supply Voltage Supply Current vs Temperature Input Voltage vs Temperature
SUPPLY VOLTAGE (V)
0
SUPPLY CURRENT (mA)
2.4
2.8
3.2
3.6
40
1910 G01
2.0
1.6
2.2
2.6
3.0
3.4
1.8
1.4
1.2 10 20 30 50
ON STATE
OFF STATE
TA = 25°C
TEMPERATURE (°C)
–50
0
SUPPLY CURRENT (mA)
1.0
2.0
3.0
2.5
–25 025 50
1910 G02
75
4.0
5.0
0.5
1.5
3.5
4.5
125100
V+ = 48V
ON STATE
OFF STATE
TEMPERATURE (°C)
–50
INPUT VOLTAGE (V)
1.0
1.2
1.4
1.6
2.0
–25 0 25 50
1910 G03
75 125100
1.8
0.8
VINH
VINL
LT1910
4
1910fc
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TYPICAL PERFORMANCE CHARACTERISTICS
Timer Charge Current
vs Temperature
Drain Sense Threshold Voltage
vs Temperature
MOSFET Gate Voltage Above V+
(VGATE – V+) vs Supply Voltage
MOSFET Gate Drive Current
vs VGATE – V+Fault Threshold Voltage
vs Temperature
Fault Output Low Voltage
vs Temperature
Input Current vs Temperature
Timer Threshold Voltage
vs Temperature
Timer Clamp Voltage
vs Temperature
TEMPERATURE (°C)
–50
0
INPUT CURRENT (µA)
40
80
120
–25 025 50
1910 G04
75
160
200
20
60
100
140
180
125100
VIN = 5V
VIN = 2V
TEMPERATURE (°C)
–50
TIMER THRESHOLD VOLTAGE (V)
2.7
2.8
2.9
3.0
3.2
–25 0 25 50
1910 G05
75 125100
3.1
2.6
VIN = 2V
TEMPERATURE (°C)
–50
TIMER CLAMP VOLTAGE (V)
3.3
3.4
3.5
3.6
3.8
–25 025 50
1910 G06
75 125
100
3.7
3.2
VIN ≤ 0.8V
TEMPERATURE (°C)
–50
TIMER CHARGE CURRENT (µA)
10
12
14
16
20
–25 0 25 50
1910 G07
75 125100
18
8
VIN = VT = 2V
TEMPERATURE (°C)
–50
40
DRAIN SENSE THRESHOLD VOLTAGE (mV)
50
60
70
65
–25 025 50
1910 G08
75
80
90
45
55
75
85
125100
V+ = 24V
SUPPLY VOLTAGE (V)
0
MOSFET GATE VOLTAGE ABOVE V+ (VGATE – V+) (V)
16
14
12
10
8
6
4
2
0
40
LTC1266 • F04
10 20 30 50355 15 25 45
TA = 125°C
TA = –40°C
TA = 25°C
VGATE – V+ (V)
024
MOSFET GATE DRIVE CURRENT (µA)
1
10
100
6 8 10 12 14 16
1910 G10
0.1
V+ = 8V V+ = 12V V+ ≥ 24V
TA = 25°C
TEMPERATURE (°C)
–50
0
FAULT OUTPUT LOW VOLTAGE (V)
0.04
0.08
0.12
0.10
–25 025 50
1910 G012
75
0.16
0.20
0.02
0.06
0.14
0.18
125100
IF = 1mA
TEMPERATURE (°C)
–50
FAULT THRESHOLD VOLTAGE (V)
3.2
3.3
3.4
3.5
3.7
–25 0 25 50
1910 G11
75 125100
3.6
3.0
3.1
VIN = 2V
IF = 1mA
FAULT HIGH THRESHOLD
FAULT LOW THRESHOLD
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TYPICAL PERFORMANCE CHARACTERISTICS
Turn-On Time vs Temperature Turn-Off Time vs Temperature
Automatic Restart Period
vs Temperature
TEMPERATURE (°C)
–50
TURN-ON TIME (µs)
150
200
250
300
400
–25 0 25 50
1910 G13
75 125100
350
100
V+ = 24V
VGATE = 32V
CGATE = 1nF
TEMPERATURE (°C)
–50
0
TURN-OFF TIME (µs)
20
40
60
50
–25 025 50
1910 G014
75
80
100
10
30
70
90
125100
V+ = 24V
VGATE = 2V
CGATE = 1nF
NORMAL
CURRENT LIMIT
TEMPERATURE (°C)
–30
10
100
1000
–10 10 30 50 9070
1910 G15
AUTOMATIC RESTART PERIOD (ms)
–50 130110
V+ = 24V
CT = 3.3µF
CT = 0.33µF
CT = 0.1µF
CT = 1µF
PIN FUNCTIONS
GND (Pin 1): Common Ground.
TIMER (Pin 2): A timing capacitor, CT
, from the TIMER
pin to ground sets the restart time following overcurrent
detection. Upon detection of an overcurrent condition, CT
is rapidly discharged to less than 1V and then recharged
by a 14µA nominal current source back to the 2.9V timer
threshold, whereupon the restart is attempted. Whenever
TIMER pulls below 2.9V, the GATE pin pulls low to turn off
the external switch. This cycle repeats until the overcurrent
condition goes away and the switch restarts successfully.
During normal operation the pin clamps at 3.5V nominal.
FAULT (Pin 3): The FAULT pin monitors the TIMER pin
voltage and indicates the overcurrent condition. Whenever
the TIMER pin is pulled below 3.3V at the onset of a cur-
rent limit condition, the FAULT pin pulls active LOW. The
FAULT pin resets HIGH immediately when the TIMER pin
ramps above 3.4V during autorestart. The FAULT pin is an
open-collector output, thus requiring an external pull-up
resistor and is intended for logic interface. The resistor
should be selected with a maximum of 1mA pull-up at
low status.
IN (Pin 4): The IN pin threshold is TTL/CMOS compatible
and has approximately 200mV of hysteresis. When the
IN pin is pulled active HIGH above 2V, an internal charge
pump is activated to pull up the GATE pin. The IN pin can
be pulled as high as 15V regardless of whether the sup-
ply is on or off. If the IN pin is left open, an internal 75k
pull-down resistor pulls the pin below 0.8V to ensure that
the GATE pin is inactive LOW.
GATE (Pin 5): The GATE pin drives the power MOSFET
gate. When the IN pin is greater than 2V, the GATE pin is
pumped approximately 12V above the supply. It has rela-
tively high impedance (the equivalence of a few hundred
kΩ) when pumped above the rail. Care should be taken
to minimize any loading by parasitic resistance to ground
or supply. The GATE pin pulls LOW when the TIMER pin
falls below 2.9V.
SENSE (Pin 6): The SENSE pin connects to the input of
a supply-referenced comparator with a 65mV nominal
offset. When the SENSE pin is taken more than 65mV
below supply, the MOSFET gate is driven LOW and the
timing capacitor is discharged. The SENSE pin threshold
has a 0.33%/°C temperature coefficient (TC), which closely
matches the TC of the drain-sense resistor formed from
the copper trace of the PCB.
For loads requiring high inrush current, an RC timing delay
can be added between the drain-sense resistor and the
SENSE pin to ensure that the current-sense comparator
LT1910
6
1910fc
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PIN FUNCTIONS
BLOCK DIAGRAM
does not false trigger during start-up (see Applications
Information). A maximum of 10kΩ can be inserted between
a drain-sense resistor and the SENSE pin. If current sensing
is not required, the SENSE pin is tied to supply.
V+ (Pin 8): In addition to providing the operating cur-
rent for the LT1910, the V+ pin also serves as the Kelvin
connection for the current-sense comparator. The V+ pin
must be connected to the positive side of the drain-sense
resistor for proper current-sensing operation.
–
++
–
–
+
3.3V
TIMER
IN
14µA
V+
2.9V
1.4V
75k
75k
FAULT
–
+
1.4V
250Ω
1910 BD
GATE
SENSE
V+
65mV
–
+
OSCILLATOR
AND
CHARGE PUMP
–
+
OPERATION
(Refer to the Block Diagram)
The LT1910 GATE pin has two states, off and on. In the off
state it is held LOW, while in the on state it is pumped to
12V above the supply by a self-contained 750kHz charge
pump. The off state is activated when either the IN pin is
below 0.8V or the TIMER pin is below 2.9V. Conversely,
for the on state to be activated, the IN pin must be above
2V and the TIMER pin must be above 2.9V.
The IN pin has approximately 200mV of hysteresis. If it is
left open, the IN pin is held LOW by a 75k resistor. Under
normal conditions, the TIMER pin is held a diode drop
above 2.9V by a 14µA pull-up current source. Thus the
TIMER pin automatically reverts the GATE pin to the on
state if the IN pin is above 2V.
The SENSE pin normally connects to the drain of the power
MOSFET, which returns through a low value drain-sense
resistor to supply. In order for the sense comparator to
accurately sense the MOSFET drain current, the V+ pin
must be connected directly to the positive side of the
drain-sense resistor. When the GATE pin is on and the
MOSFET drain current exceeds the level required to gener-
ate a 65mV drop across the drain-sense resistor, the sense
comparator activates a pull-down NPN which rapidly pulls
the TIMER pin below 2.9V. This in turn causes the timer
comparator to override the IN pin and set the GATE pin
to the off state, thus protecting the power MOSFET. When
the TIMER pin is pulled below 3.3V, the fault comparator
LT1910
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OPERATION
also activates the open-collector NPN to pull the FAULT
pin LOW, indicating an overcurrent condition.
When the MOSFET gate voltage is discharged to less than
1.4V, the TIMER pin is released. The 14µA current source
then slowly charges the timing capacitor back to 2.9V
where the charge pump again starts to drive the GATE pin
HIGH. If a fault condition still exists, the sense comparator
threshold will again be exceeded and the timer cycle will
repeat until the fault is removed. The FAULT pin becomes
inactive HIGH if the TIMER pin charges up successfully
above 3.4V (see Figure 1).
3.4V
1910 F01
0V
GATE
TIMER
FAULT
IN
OVERCURRENTNORMAL NORMALOFF
0V
0V
0V
5V
3.5V
2.9V
V+12V
Figure 1. Timing Diagram
APPLICATIONS INFORMATION
Input/Supply Sequencing
There are no input/supply sequencing requirements for
the LT1910. The IN pin may be taken up to 15V with the
supply at 0V. When the supply is turned on with the IN
pin set HIGH, the MOSFET turn-on will be inhibited until
the timing capacitor charges up to 2.9V (i.e., for one
restart cycle).
Isolating the Inputs
Operation in harsh environments may require isolation to
prevent ground transients from damaging control logic.
The LT1910 easily interfaces to low cost optoisolators. The
network shown in Figure 2 ensures that the input will be
pulled above 2V, but not exceed the absolute maximum
rating for supply voltages of 12V to 48V over the entire
temperature range. The optoisolator must have less than
20µA of dark current (leakage) at hot in order to maintain
the off state (see Figure 2).
Drain-Sense Configuration
The LT1910 uses supply referenced current sensing. One
input of the current-sense comparator is connected to a
drain-sense pin, while the second input is offset 65mV
below the supply inside the device. For this reason, Pin 8
of the LT1910 must be treated not only as a supply pin,
but also as the reference input for the current-sense
comparator.
Figure 3 shows the proper drain-sense configuration for
the LT1910. Note that the SENSE pin goes to the drain
end of the sense resistor, while the V+ pin is connected
IN
51k
100k
2k
LOGIC
INPUT
12V TO 48V
LT1910
GND
POWER GROUND
LOGIC GROUND
11910 F02
4
FAULT
IN
TIMER
V+
SENSE
GATE
3
4
2
8
6
5
LT1910
R1
5.1k
24V
5V
FAULT OUTPUT
INPUT
0V
GND
Q1
IRFZ34
24V
2A
SOLENOID
1910 F03
C1
100µF
50V
CT
1µF
1
RS
0.02Ω
(PTC)
+
Figure 2. Isolating the Input Figure 3. Drain-Sense Configuration
LT1910
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to the supply at the same point as the positive end of the
sense resistor.
The drain-sense threshold voltage has a positive tempera-
ture coefficient, allowing PTC sense resistors to be used
(see Printed Circuit Board Shunts). The selection of RS
should be based on the minimum threshold voltage:
RS = 50mV/ISET
Thus the 0.02Ω drain-sense resistor in Figure 3 will yield
a minimum trip current of 2.5A. This simple configuration
is appropriate for resistive or inductive loads that do not
generate large current transients at turn-on.
Automatic Restart Period
The timing capacitor, CT
, shown in Figure 3 determines
the length of time the power MOSFET is held off follow-
ing a current limit trip. Curves are given in the Typical
Performance Characteristics to show the restart period
for various values of CT
. For example, CT = 0.33µF yields
a 50ms restart period.
Defeating Automatic Restart
Some applications are required to remain off after a fault
occurs. When the LT1910 is being driven from CMOS logic,
this can be easily implemented by connecting resistor R2
between the IN and TIMER pins as shown in Figure 4. R2
supplies the sustaining current for an internal SCR which
latches the TIMER pin LOW under a fault condition. The
FAULT pin is set active LOW when the TIMER pin falls below
3.3V. This keeps the MOSFET gate from turning on and the
APPLICATIONS INFORMATION
FAULT pin from resetting HIGH until the IN pin has been
recycled. CT is used to prevent the FAULT pin from glitch-
ing whenever the IN pin recycles to turn on the MOSFET
unsuccessfully under an existing fault condition.
Inductive vs Capacitive Loads
Turning on an inductive load produces a relatively benign
ramp in MOSFET current. However, when an inductive
load is turned off, the current stored in the inductor needs
somewhere to decay. A clamp diode connected directly
across each inductive load normally serves this purpose.
If a diode is not employed, the LT1910 clamps the MOSFET
gate 0.7V below ground. This causes the MOSFET to resume
conduction during the current decay with (V+ + VGS + 0.7V)
across it, resulting in high dissipation peaks.
Capacitive loads exhibit the opposite behavior. Any load
that includes a decoupling capacitor will generate a current
equal to CLOAD • (∂V/∂t) during capacitor in-rush. With
large electrolytic capacitors, the resulting current spike
can play havoc with the power supply and false trip the
current-sense comparator.
Turn-on ∂V/∂t is controlled by the addition of the simple
network shown in Figure 5. This network takes advantage of
the fact that the MOSFET acts as a source follower during
turn-on. Thus the ∂V/∂t on the source can be controlled
by controlling the ∂V/∂t on the gate.
IN
TIMER
FAULT
5V
FAULT OUTPUT
R1
5.1k
ON = 5V
OFF = 0V LT1910
GND
1
1910 F04
4
R2
2k CT
1µF
2
3
5V
CMOS
LOGIC
V+
SENSE
8
6
LT1910
1
GND
Q1
IRFZ34
15V
1N4744
CLOAD
C2
50µF
50V
1910 F05
RS
0.01Ω
++
CD
RD (≤10k)
1N4148
24V
CURRENT LIMIT
DELAY NETWORK
C1
1N4148
R1
100k
R2
100k
∂V/∂t CONTROL NETWORK
GATE 5
Figure 4. Latch-Off Configuration (Autorestart Defeated) Figure 5. Control and Current Limit Delay
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APPLICATIONS INFORMATION
The turn-on current spike into CLOAD is estimated by:
IC•
V–V
R1•C1
PEAK LOAD GTH
=
where VTH is the MOSFET gate threshold voltage. VG is
obtained by plotting the equation:
I
V
R1
GATE GATE
=
on the graph of Gate Drive Current (IGATE) vs Gate Voltage
(VGATE) as shown in Figure 6. The value of VGATE at the
intersection of the curves for a given supply is VG. For
example, if V+ = 24V and R1 = 100k, then VG = 18.3V. For
VTH = 2V, C1 = 0.1µF and CLOAD = 1000µF, the estimated
IPEAK = 1.6A. The diode and the second resistor in the
network ensure fast current limit turn-off.
When turning off a capacitive load, the source of the
MOSFET can “hang up” if the load resistance does not
discharge CLOAD as fast as the gate is being pulled down.
If this is the case, a 15V Zener may be added from gate to
source to prevent VGS(MAX) from being exceeded.
RD and CD delay the overcurrent trip for drain currents up
to approximately 10 • ISET
, above which the diode conducts
and provides immediate turn-off (see Figure 7). To ensure
proper operation of the timer, CD must be ≤CT
.
GATE VOLTAGE (V)
0
GATE DRIVE CURRENT (µA)
300
400
500
30 50
1910 F06
200
100
010 20 40
600
700
800
60
V+ = 48V
IGATE =
VGATE/105
V+ = 24V
V+ = 12V
V+ = 8V
Figure 6. Gate Drive Current vs Gate Voltage
Adding Current Limit Delay
When capacitive loads are being switched or in very noisy
environments, it is desirable to add delay in the drain
current-sense path to prevent false tripping (inductive
loads normally do not need delay). This is accomplished
by the current limit delay network shown in Figure 5.
MOSFET DRAIN CURRENT (1 = SET CURRENT)
1
0.01
TRIP DELAY TIME (1 = RDCD)
0.1
1
10
10 100
1910 F07
Figure 7. Current Limit Delay Time
Printed Circuit Board Shunts
The sheet resistance of 1oz copper clad is approximately
5 • 10–4Ω/square with a temperature coefficient of
0.39%/°C. Since the LT1910 drain-sense threshold has a
similar temperature coefficient (0.33%/°C), this offers the
possibility of nearly zero TC current sensing using the “free”
drain-sense resistor made out of PC trace material.
A conservative approach is to use 0.02" of width for each
1A of current for 1oz copper. Combining the LT1910 drain
sense threshold with the 1oz copper resistance results in
a simple expression for width and length:
Width (1oz Cu) = 0.02" • ISET
Length (1oz Cu) = 2"
The width for 2oz copper would be halved while the length
would remain the same.
Bends may be incorporated into the resistor to reduce
space; each bend is equivalent to approximately 0.6 •the
width of a straight length. Kelvin connection should be
employed by running a separate trace from the ends of
the resistor back to the LT1910’s V+ and SENSE pins. See
Application Note 53 for further information on printed
circuit board shunts.
LT1910
10
1910fc
For more information www.linear.com/LT1910
APPLICATIONS INFORMATION
Low Voltage/Wide Supply Range Operation
When the supply is less than 12V, the LT1910’s charge
pump does not produce sufficient gate voltage to fully
enhance the standard N-channel MOSFET. For these ap-
plications, a logic-level MOSFET can be used to extend
the operating supply down to 8V. If the MOSFET has a
maximum VGS rating of 15V or greater, then the LT1910
can also operate up to a supply voltage of 60V (absolute
maximum rating of the V+ pin).
Protecting Against Supply Transients
The LT1910 is 100% tested and guaranteed to be safe
from damage with 60V applied between the V+ and GND
pins. However, when this voltage is exceeded, even for a
few microseconds, the result can be catastrophic. For this
reason it is imperative that the LT1910 is not exposed to
supply transients above 60V. A transient suppressor, such
as Diodes Inc.’s SMAJ48A, should be added between the
V+ and GND pins for such applications.
For proper current sense operation, the V+ pin is required
to be connected to the positive side of the drain-sense
resistor (see Drain-Sense Configuration). Therefore, the
supply should be adequately decoupled at the node where
the V+ pin and drain sense resistor meet. Several hundred
microfarads may be required when operating with a high
current switch.
When the operating voltage approaches the 60V absolute
maximum rating of the LT1910, local supply decoupling
between the V+ and GND pins is highly recommended. An
RC snubber with a transient suppressor are an absolute
necessity. Note however that resistance should not be
added in series with the V+ pin because it will cause an
error in the current-sense threshold.
Low Side Driving
Although the LT1910 is primarily targeted at high side
(grounded load) switch applications, it can also be used
for low side (supply connected load) switch applications.
Figures 8a and 8b illustrate the LT1910 driving low side
power MOSFETs. Because the LT1910 charge pump tries
to pump the gate of the N-channel MOSFET above the
supply, a clamp Zener is required to prevent the VGS (ab-
solute maximum) of the MOSFET from being exceeded.
The LT1910 gate drive is current limited for this purpose
so that no resistance is needed between the GATE pin
and Zener.
Current sensing for protecting low side drivers can be done
in several ways. In the Figure 8a circuit, the supply voltage
for the load is assumed to be within the supply operating
range of the LT1910. This allows the load to be returned
to supply through current-sense resistor, RS, providing
normal operation of the LT1910 protection circuitry.
If the load cannot be returned to supply through RS, or
the load supply voltage is higher than the LT1910 supply,
the current sense must be moved to the source of the
low side MOSFET.
Figure 8b shows an approach to source sensing. An
operational amplifier (must common mode to ground) is
used to level shift the voltage across RS up to the drain-
sense pin. This approach allows the use of a small sense
resistor which could be made from PC trace material. The
LT1910 restart timer functions the same as in the high side
switch application.
LT1910
11
1910fc
For more information www.linear.com/LT1910
FAULT
IN
V+
SENSE
3
4
8
6
LT1910
R1
5.1k
12V TO 48V
5V
FAULT OUTPUT
INPUT
0V
GND
Q1
IRFZ44
15V
1N4744
1910 F08a
C1
100µF
100V
CT
1µF
RS
0.01Ω
(PTC)
4A
LOAD
+
GATETIMER 5
1
2
FAULT
IN
TIMER
V+
SENSE
GATE
3
4
2
8
6
5
LT1910
R1
5.1k
5V
FAULT OUTPUT
INPUT
GND
Q1
IRF630
15V
1N4744
1910 F08b
C1
10µF
50V
CT
1µF
1
RS
0.02Ω
HV
LOAD
51Ω
2N2222
8V TO 24V HV
–
+
+
LT1006
51Ω
Figure 8a. Low Side Driver with Load Current Sensing
Figure 8b. Low Side Driver for Source Current Sensing
APPLICATIONS INFORMATION
LT1910
12
1910fc
For more information www.linear.com/LT1910
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)× 45°
0°– 8° TYP
.008 – .010
(0.203 – 0.254)
SO8 REV G 0212
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
1234
.150 – .157
(3.810 – 3.988)
NOTE 3
8765
.189 – .197
(4.801 – 5.004)
NOTE 3
.228 – .244
(5.791 – 6.197)
.245
MIN .160 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
.050 BSC
.030 ±.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610 Rev G)
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
LT1910
13
1910fc
For more information www.linear.com/LT1910
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
B 7/14 Updated FAULT pin description 5
C 6/15 Changed top mark 2
(Revision history begins at Rev B)
LT1910
14
1910fc
For more information www.linear.com/LT1910
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT1910
LINEAR TECHNOLOGY CORPORATION 2009
LT 0615 REV C • PRINTED IN USA
RELATED PARTS
TYPICAL APPLICATION
Protected 1A Automotive Solenoid Driver with Overvoltage Shutdown
FAULT
IN
TIMER
V+
SENSE
GATE
3
4
2
8
6
5
LT1910
R1
5.1k
5V
FAULT OUTPUT
INPUT
POWER
GROUND
8V TO 24V OPERATING
32V TO 60V SHUTDOWN
GND
Q1
MTD3055EL
24V
1A
SOLENOID
1910 TA03
C1
10µF
100V
CT
1µF
R3
5.1k
1N4148
2N3904
1
RS
0.03Ω
(PTC)
+
R2
10k
30V
1N6011B
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