CoolSET™-F3
ICE3A(B)0365/0565/1065/1565
ICE3A(B)2065/2565
ICE3A0565Z/2065Z
ICE3A(B)2065I/3065I/3565I
ICE3A(B)5065I/5565I
ICE3A(B)2065P/3065P/3565P
ICE3A(B)5065P/5565P
Off-Line SMPS Current Mode
Controller with integrated 650V
Startup Cell/Depletion CoolMOS™
N e v e r s t o p t h i n k i n g .
P ow e r M an ag e m e nt & S u p pl y
Datasheet, Version 2.3, 0 2 Apr 2013
Edition 2013-04-02
Published by
Infineon Technologies AG,
81726 Munich, Germany,
©2012 Infineon Technologies AG.
All Rights Reserved.
Legal disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact your nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
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For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or
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CoolMOS™, CoolSET™are trademarks of Infineon Technologies AG.
CoolSET™-F3
Revision History: 2013-04-02 Datasheet
Previous Version: V2.2
Page Subjects (major changes since last revision)
29 revised outline dimension for PG-DIP-8
Version 2.3 3 02 Apr 2013
CoolSET™-F3
Off-Line SMPS Current Mode Controller
with integrated 650V Startup Cell/
Depletion CoolMOS™
Product Highlights
• Best in class in DIP7, DIP8, TO220/I2Pak packages
• Active Burst Mode to reach the lowest Standby Power
Requirements < 100mW
• Protection features (Auto Restart Mode) to increase
robustness and safety of the system
• Adjustable Blanking Window for high load jumps to
increase system reliability
• Isolated drain package for TO220/I2Pak
• Wide creepage distance for DIP7/TO220/I2Pak
• Wide power class of products for various applications
• Pb-free lead plating for all packages; RoHS compliant
Features
• 650V avalanche rugged CoolMOS™with built in
switchable Startup Cell
• Active Burst Mode for lowest Standby Power
@ light load controlled by Feedback signal
• Fast load jump response in Active Burst Mode
• 67/100 kHz fixed switching frequency
• Auto Restart Mode for Overtemperature Detection
• Auto Restart Mode for Overvoltage Detection
• Auto Restart Mode for Overload and Open Loop
• Auto Restart Mode for VCC Undervoltage
• Blanking Window for short duration high current
• User defined Soft Start
• Minimum of external components required
• Max Duty Cycle 72%
• Overall tolerance of Current Limiting <±5%
• Internal PWM Leading Edge Blanking
• Soft driving for low EMI
PG-TO220-6-46 (I2Pak)
PG-TO220-6-47
PG-DIP-7-1
PG-DIP-8
Description
The new generation CoolSET™-F3 provides Active Burst
Mode to reach the lowest Standby Power Requirements
<100mW at no load. As the controller is always active
during Active Burst Mode, there is an immediate response
on load jumps without any black out in the SMPS. In Active
Burst Mode the ripple of the output voltage can be reduced
<1%. Furthermore, to increase the robustness and safety
of the system, the device enters into Auto Restart Mode in
the cases of Overtemperature, VCC Overvoltage, Output
Open Loop or Overload and VCC Undervoltage. By means
of the internal precise peak current limitation, the
dimension of the transformer and the secondary diode can
be lowered which leads to more cost efficiency. An
adjustable blanking window prevents the IC from entering
Auto Restart or Active Burst Mode unintentionally during
high load jumps. The CoolSET™-F3 family consists a wide
power class range of products for various applications.
CSoftS
CVCC
CBulk Converter
DC Output
+
Snubber
Power Management
PWM Controller
Current Mode
85 ... 270 VAC
Typical Application
RSense
SoftS
FB
GND Active Burst Mode
Auto Restart Mode
Control
Unit
-
CS
VCC
Startup Cell
Drain
CoolSET™-F3
Depl.
CoolMOS™
Precise Low Tolerance Peak
Current Limitation
Version 2.3 4 02 Apr 2013
CoolSET™-F3
Overview
Type Package VDS FOSC RDSon
1)
1) typ @ T=25°C
230VAC ±15%2)
2) Calculated maximum input power rating at Ta=75°C, Tj=125°C and without copper area as heat sink.
85-265 VAC2)
ICE3A0365 PG-DIP-8 650V 100kHz 6.45 22W 10W
ICE3A0565 PG-DIP-8 650V 100kHz 4.70 25W 12W
ICE3A1065 PG-DIP-8 650V 100kHz 2.95 32W 16W
ICE3A1565 PG-DIP-8 650V 100kHz 1.70 42W 20W
ICE3A2065 PG-DIP-8 650V 100kHz 0.92 57W 28W
ICE3A2565 PG-DIP-8 650V 100kHz 0.65 68W 33W
ICE3B0365 PG-DIP-8 650V 67kHz 6.45 22W 10W
ICE3B0565 PG-DIP-8 650V 67kHz 4.70 25W 12W
ICE3B1065 PG-DIP-8 650V 67kHz 2.95 32W 16W
ICE3B1565 PG-DIP-8 650V 67kHz 1.70 42W 20W
ICE3B2065 PG-DIP-8 650V 67kHz 0.92 57W 28W
ICE3B2565 PG-DIP-8 650V 67kHz 0.65 68W 33W
Type Package VDS FOSC RDSon
1)
1) typ @ T=25°C
230VAC ±15%2)
2) Calculated maximum input power rating at Ta=75°C, Tj=125°C and without copper area as heat sink.
85-265 VAC2)
ICE3A0565Z PG-DIP-7-1 650V 100kHz 4.70 25W 12W
ICE3A2065Z PG-DIP-7-1 650V 100kHz 0.92 57W 28W
Version 2.3 5 02 Apr 2013
CoolSET™-F3
Type Package VDS FOSC RDSon
1) 230VAC
±15%2)
85-265 VAC2)
ICE3A2065I PG-TO-220-6-46 650V 100kHz 3.00 102W 50W
ICE3A3065I PG-TO-220-6-46 650V 100kHz 2.10 128W 62W
ICE3A3565I PG-TO-220-6-46 650V 100kHz 1.55 170W 83W
ICE3A5065I PG-TO-220-6-46 650V 100kHz 0.95 220W 105W
ICE3A5565I PG-TO-220-6-46 650V 100kHz 0.79 240W 120W
ICE3B2065I PG-TO-220-6-46 650V 67kHz 3.00 102W 50W
ICE3B3065I PG-TO-220-6-46 650V 67kHz 2.10 128W 62W
ICE3B3565I PG-TO-220-6-46 650V 67kHz 1.55 170W 83W
ICE3B5065I PG-TO-220-6-46 650V 67kHz 0.95 220W 105W
ICE3B5565I PG-TO-220-6-46 650V 67kHz 0.79 240W 120W
ICE3A2065P PG-TO-220-6-47 650V 100kHz 3.00 102W 50W
ICE3A3065P PG-TO-220-6-47 650V 100kHz 2.10 128W 62W
ICE3A3565P PG-TO-220-6-47 650V 100kHz 1.55 170W 83W
ICE3A5065P PG-TO-220-6-47 650V 100kHz 0.95 220W 105W
ICE3A5565P PG-TO-220-6-47 650V 100kHz 0.79 240W 120W
ICE3B2065P PG-TO-220-6-47 650V 67kHz 3.00 102W 50W
ICE3B3065P PG-TO-220-6-47 650V 67kHz 2.10 128W 62W
ICE3B3565P PG-TO-220-6-47 650V 67kHz 1.55 170W 83W
ICE3B5065P PG-TO-220-6-47 650V 67kHz 0.95 220W 105W
ICE3B5565P PG-TO-220-6-47 650V 67kHz 0.79 240W 120W
1) typ @ T=25°C
2) Calculated maximum continuous input power in an open frame design at Ta=50°C, Tj=125°C and RthCA(external heatsink)=2.7K/W
CoolSET™-F3
Table of Contents Page
Version 2.3 6 02 Apr 2013
1 Pin Configuration and Functionality .............................7
1.1 Pin Configuration with PG-DIP-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
1.2 Pin Configuration with PG-DIP-7-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
1.3 Pin Configuration with PG-TO220-6-46 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
1.4 Pin Configuration with PG-TO220-6-47 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
1.5 PinFunctionality ..............................................9
2 Representative Blockdiagram .................................10
3 Functional Description .......................................11
3.1 Introduction .................................................11
3.2 PowerManagement...........................................11
3.3 StartupPhase ...............................................12
3.4 PWMSection ................................................13
3.4.1 Oscillator .................................................13
3.4.2 PWM-LatchFF1............................................13
3.4.3 GateDriver ...............................................13
3.5 CurrentLimiting ..............................................14
3.5.1 Leading Edge Blanking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
3.5.2 Propagation Delay Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
3.6 ControlUnit .................................................15
3.6.1 Adjustable Blanking Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
3.6.2 ActiveBurstMode ..........................................16
3.6.2.1 Entering Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
3.6.2.2 Working in Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
3.6.2.3 Leaving Active Burst Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
3.6.3 Protection Mode (Auto Restart Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . .17
4 Electrical Characteristics .....................................19
4.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
4.2 OperatingRange .............................................22
4.3 Characteristics ...............................................22
4.3.1 SupplySection1............................................22
4.3.2 SupplySection2............................................23
4.3.3 Internal Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
4.3.4 PWMSection ..............................................24
4.3.5 ControlUnit ...............................................25
4.3.6 CurrentLimiting ............................................25
4.3.7 CoolMOS™Section.........................................26
5 Outline Dimension ...........................................28
Version 2.3 7 02 Apr 2013
CoolSET™-F3
Pin Configuration and Functionality
1 Pin Configuration and Functionality
1.1 Pin Configuration with PG-DIP-8
Figure 1 Pin Configuration PG-DIP-8(top view)
Note: Pin 4 and 5 are shorted within the DIP 8 package.
1.2 Pin Configuration with PG-DIP-7-1
Figure 2 Pin Configuration PG-DIP-7-1(top view)
Pin Symbol Function
1 SoftS Soft-Start
2 FB Feedback
3 CS Current Sense/
650V1) Depl. CoolMOS™Source
1) at Tj= 110°C
4 Drain 650V1) Depl. CoolMOS™Drain
5 Drain 650V1) Depl. CoolMOS™Drain
6 n.c. Not Connected
7 VCC Controller Supply Voltage
8 GND Controller Ground
Package PG-DIP-8
1
6
7
8
4
3
2
5
GNDSoftS
FB
CS
VCC
n.c.
Drain Drain
Pin Symbol Function
1 SoftS Soft-Start
2 FB Feedback
3 CS Current Sense/
650V1) Depl. CoolMOS™Source
1) at Tj= 110°C
4 n.c. Not connected
5 Drain 650V1) Depl. CoolMOS™Drain
- - -
7 VCC Controller Supply Voltage
8 GND Controller Ground
1
7
8
4
3
2
5
GNDSoftS
FB
CS
VCC
n.c. Drain
Package PG-DIP-7-1
Version 2.3 8 02 Apr 2013
CoolSET™-F3
Pin Configuration and Functionality
Figure 3 Pin Configuration PG-TO220-6-46 I2Pak
(front view)
1.4 Pin Configuration with PG-TO220-6-47
Figure 4 Pin Configuration PG-TO220-6-47
(front view)
1.3 Pin Configuration with PG-TO220-6-46
Pin Symbol Function
1 Drain 650V1) Depl. CoolMOS™Drain
3CS Current Sense/
650V1) Depl. CoolMOS™Source
4 GND Controller Ground
5 VCC Controller Supply Voltage
6 SoftS Soft-Start
7 FB Feedback
1) at Tj= 110°C
Package PG-TO220-6-46 (I2Pak)
1
Drain
234567
CS
GND
VCC
SoftS
FB
Pin Symbol Function
1 Drain 650V1) Depl. CoolMOS™Drain
1) at Tj= 110°C
3CS Current Sense/
650V1) Depl. CoolMOS™Source
4 GND Controller Ground
5 VCC Controller Supply Voltage
6 SoftS Soft-Start
7 FB Feedback
Package PG-TO220-6-47
1
Drain
234567
CS
GND
VCC
SoftS
FB
Version 2.3 9 02 Apr 2013
CoolSET™-F3
Pin Configuration and Functionality
1.5 Pin Functionality
SoftS (Soft Start & Auto Restart Control)
The SoftS pin combines the functions of Soft Start
during Start Up and error detection for Auto Restart
Mode. These functions are implemented and can be
adjusted by means of an external capacitor at SoftS to
ground. This capacitor also provides an adjustable
blanking window for high load jumps, before the IC
enters into Auto Restart Mode.
FB (Feedback)
The information about the regulation is provided by the
FB Pin to the internal Protection Unit and to the internal
PWM-Comparator to control the duty cycle. The FB-
Signal controls in case of light load the Active Burst
Mode of the controller.
CS (Current Sense)
The Current Sense pin senses the voltage developed
on the series resistor inserted in the source of the
integrated Depl. CoolMOS™. If CS reaches the internal
threshold of the Current Limit Comparator, the Driver
output is immediately switched off. Furthermore the
current information is provided for the PWM-
Comparator to realize the Current Mode.
Drain (Drain of integrated Depl. CoolMOS™)
Pin Drain is the connection to the Drain of the internal
Depl. CoolMOSTM.
VCC (Power supply)
The VCC pin is the positive supply of the IC. The
operating range is between 8.5V and 21V.
GND (Ground)
The GND pin is the ground of the controller.
CoolSET™-F3
Representative Blockdiagram
Version 2.3 10 02 Apr 2013
2 Representative Blockdiagram
Figure 5 Representative Blockdiagram
Version 2.3 11 02 Apr 2013
CoolSET™-F3
Functional Description
3 Functional Description
All values which are used in the functional description
are typical values. For calculating the worst cases the
min/max values which can be found in section 4
Electrical Characteristics have to be considered.
3.1 Introduction
CoolSET™-F3 is the further development of the
CoolSET™-F2 to meet the requirements for the lowest
Standby Power at minimum load and no load
conditions. A new fully integrated Standby Power
concept is implemented into the IC in order to keep the
application design easy. Compared to CoolSET™-F2
no further external parts are needed to achieve the
lowest Standby Power. An intelligent Active Burst
Mode is used for this Standby Mode. After entering this
mode there is still a full control of the power conversion
by the secondary side via the same optocoupler that is
used for the normal PWM control. The response on
load jumps is optimized. The voltage ripple on Vout is
minimized. Vout is further on well controlled in this
mode.
The usually external connected RC-filter in the
feedback line after the optocoupler is integrated in the
IC to reduce the external part count.
Furthermore a high voltage Startup Cell is integrated
into the IC which is switched off once the Undervoltage
Lockout on-threshold of 15V is exceeded. This Startup
Cell is part of the integrated Depl. CoolMOS™. The
external startup resistor is no longer necessary as this
Startup Cell is connected to the Drain. Power losses
are therefore reduced. This increases the efficiency
under light load conditions drastically.
The Soft-Start capacitor is also used for providing an
adjustable blanking window for high load jumps. During
this time window the overload detection is disabled.
With this concept no further external components are
necessary to adjust the blanking window.
An Auto Restart Mode is implemented in the IC to
reduce the average power conversion in the event of
malfunction or unsafe operating condition in the SMPS
system. This feature increases the system’s
robustness and safety which would otherwise lead to a
destruction of the SMPS. Once the malfunction is
removed, normal operation is automatically initiated
after the next Start Up Phase.
The internal precise peak current limitation reduces the
costs for the transformer and the secondary diode. The
influence of the change in the input voltage on the
power limitation can be avoided together with the
integrated Propagation Delay Compensation.
Therefore the maximum power is nearly independent
on the input voltage which is required for wide range
SMPS. There is no need for an extra over-sizing of the
SMPS, e.g. the transformer or the secondary diode.
3.2 Power Management
Figure 6 Power Management
The Undervoltage Lockout monitors the external
supply voltage VVCC. When the SMPS is plugged to the
main line the internal Startup Cell is biased and starts
to charge the external capacitor CVCC which is
connected to the VCC pin. This VCC charge current
which is provided by the Startup Cell from the Drain pin
is 1.05mA. When VVCC exceeds the on-threshold
VCCon=15V the internal voltage reference and bias
circuit are switched on. Then the Startup Cell is
switched off by the Undervoltage Lockout and therefore
no power losses present due to the connection of the
Startup Cell to the Drain voltage. To avoid uncontrolled
ringing at switch-on a hysteresis is implemented. The
switch-off of the controller can only take place after
Active Mode was entered and VVCC falls below 8.5V.
The maximum current consumption before the
controller is activated is about 160mA.
When VVCC falls below the off-threshold VCCoff=8.5V the
internal reference is switched off and the Power Down
reset let T1 discharging the soft-start capacitor CSoftS at
pin SoftS. Thus it is ensured that at every startup cycle
the voltage ramp at pin SoftS starts at zero.
Power
Management
6.5V
T1
SoftS
Active Burst
Mode
Auto Restart
Mode
Internal Bias
Voltage
Reference
Startup Cell
VCC Drain
Undervoltage Lockout
15V
8.5V
Depl. CoolMOS™
CoolSET™-F3
Functional Description
Version 2.3 12 02 Apr 2013
The internal Voltage Reference is switched off if Auto
Restart Mode is entered. The current consumption is
then reduced to 300mA.
Once the malfunction condition is removed, this block
will then turn back on. The recovery from Auto Restart
Mode does not require disconnecting the SMPS from
the AC line.
When Active Burst Mode is entered, the internal Bias is
switched off in order to reduce the current consumption
to below 1.05mA while keeping the Voltage Reference
active as this is necessary in this mode.
3.3 Startup Phase
Figure 7 Soft Start
At the beginning of the Startup Phase, the IC provides
a Soft Start duration whereby it controls the maximum
primary current by means of a duty cycle limitation. A
signal VSoftS which is generated by the external
capacitor CSofts in combination with the internal pull up
resistor RSoftS, determines the duty cycle until VSoftS
exceeds 4V.
When the Soft Start begins, CSoftS is immediately
charged up to approx. 1V by T2. Therefore the Soft
Start Phase takes place between 1V and 4V. Above
VSoftsS = 4V there is no longer duty cycle limitation
DCmax which is controlled by comparator C7 since
comparator C2 blocks the gate G7 (see Figure 7). This
maximum charge current in the very first stage when
VSoftS is below 1V, is limited to 1.32mA.
Figure 8 Startup Phase
By means of this extra charge stage, there is no delay
in the beginning of the Startup Phase when there is still
no switching. Furthermore Soft Start is finished at 4V to
have faster the maximum power capability. The duty
cycles DC1and DC2are depending on the mains and
the primary inductance of the transformer. The
limitation of the primary current by DC2is related to
VSoftS = 4V. But DC1is related to a maximum primary
current which is limited by the internal Current Limiting
with CS = 1V. Therefore the maximum Startup Phase
is divided into a Soft Start Phase until t1 and a phase
from t1 until t2 where maximum power is provided if
demanded by the FB signal.
Soft-Start
Comparator
SoftStart
&
G7
C7
CSoftS
RSoftS T2
3.25k
6.5V
T3 1V
SoftS
GateDriver
0.85V
x3.7
PWMOP CS
4V C2
DCmax
DC1
DC2
t
t
VSoftS
max.SoftStartPhase
1V
4V
5.4V
max.StartupPhase
t1 t2
CoolSET™-F3
Functional Description
Version 2.3 13 02 Apr 2013
3.4 PWM Section
Figure 9 PWM Section
3.4.1 Oscillator
The oscillator generates a fixed frequency. The
switching frequency of ICE3Axx65x is fOSC = 100kHz
and for ICE3Bxx65x fOSC = 67kHz. A resistor, a
capacitor and a current source and current sink which
determine the frequency are integrated. The charging
and discharging current of the implemented oscillator
capacitor are internally trimmed, in order to achieve a
very accurate switching frequency. The ratio of
controlled charge to discharge current is adjusted to
reach a maximum duty cycle limitation of Dmax=0.72.
3.4.2 PWM-Latch FF1
The oscillator clock output provides a set pulse to the
PWM-Latch when initiating the internal CoolMOS™
conduction. After setting the PWM-Latch can be reset
by the PWM comparator, the Soft Start comparator or
the Current-Limit comparator. In case of resetting, the
driver is shut down immediately.
3.4.3 Gate Driver
Figure 10 Gate Driver
The driver-stage is optimized to minimize EMI and to
provide high circuit efficiency. This is done by reducing
the switch on slope when exceeding the internal
CoolMOS™threshold. This is achieved by a slope
control of the rising edge at the driver’s output (see
Figure 11).
Figure 11 Gate Rising Slope
Thus the leading switch on spike is minimized. When
the integrated CoolMOS™is switched off, the falling
shape of the driver is slowed down when reaching 2V
to prevent an overshoot below ground. Furthermore the
driver circuit is designed to eliminate cross conduction
of the output stage.
During powerup when VCC is below the undervoltage
lockout threshold VVCCoff, the output of the Gate Driver
is low to disable power transfer to the seconding side.
Oscillator
DutyCycle
max
GateDriver
0.72
Clock
&
G9
1
G8
PWMSection
FF1
R
S
Q
SoftStart
Comparator
PWM
Comparator
Current
Limiting
Internal
CoolMOS™
Gate
VCC
1
PWM-Latch
CoolMOS™
GateDriver
Gate
t
(internal)VGate
5V
ca.t=130ns
CoolSET™-F3
Functional Description
Version 2.3 14 02 Apr 2013
3.5 Current Limiting
Figure 12 Current Limiting Block
There is a cycle by cycle Current Limiting realized by
the Current-Limit comparator C10 to provide an
overcurrent detection. The source current of the
internal CoolMOS™is sensed via an external sense
resistor RSense . By means of RSense the source current
is transformed to a sense voltage VSense which is fed
into the pin CS. If the voltage VSense exceeds the
internal threshold voltage Vcsth the comparator C10
immediately turns off the gate drive by resetting the
PWM Latch FF1. A Propagation Delay Compensation
is added to support the immediate shut down without
delay of the internal CoolMOS™in case of Current
Limiting. The influence of the AC input voltage on the
maximum output power can thereby be avoided.
To prevent the Current Limiting from distortions caused
by leading edge spikes a Leading Edge Blanking is
integrated in the current sense path for the
comparators C10, C12 and the PWM-OP.
The output of comparator C12 is activated by the Gate
G10 if Active Burst Mode is entered. Once activated the
current limiting is thereby reduced to 0.257V. This
voltage level determines the power level when the
Active Burst Mode is left if there is a higher power
demand.
3.5.1 Leading Edge Blanking
Figure 13 Leading Edge Blanking
Each time when the internal CoolMOS™is switched
on, a leading edge spike is generated due to the
primary-side capacitances and secondary-side rectifier
reverse recovery time. This spike can cause the gate
drive to switch off unintentionally. To avoid a premature
termination of the switching pulse, this spike is blanked
out with a time constant of tLEB = 220ns. During this
time, the gate drive will not be switched off.
3.5.2 Propagation Delay Compensation
In case of overcurrent detection, the switch-off of the
internal CoolMOS™is delayed due to the propagation
delay of the circuit. This delay causes an overshoot of
the peak current Ipeak which depends on the ratio of dI/
dt of the peak current (see Figure 14).
Figure 14 Current Limiting
The overshoot of Signal2 is bigger than of Signal1 due
to the steeper rising waveform. This change in the
slope is depending on the AC input voltage.
Propagation Delay Compensation is integrated to limit
the overshoot dependency on dI/dt of the rising primary
current. That means the propagation delay time
between exceeding the current sense threshold Vcsth
and the switch off of the internal CoolMOS™is
compensated over temperature within a wide range.
C10
C12
&
0.257V
Leading
Edge
Blanking
220ns
G10
Propagation-Delay
Compensation
Vcsth
ActiveBurst
Mode
PWMLatch
FF1
10k D1
1pF
PWM-OP
CS
Current Limiting
t
VSense
Vcsth tLEB =220ns
t
ISense
ILimit
tPropagationDelay
IOvershoot1
Ipeak1
Signal2Signal1
IOvershoot2
Ipeak2
CoolSET™-F3
Functional Description
Version 2.3 15 02 Apr 2013
Current Limiting is now possible in a very accurate way.
E.g. Ipeak = 0.5A with RSense = 2. Without Propagation
Delay Compensation the current sense threshold is set
to a static voltage level Vcsth=1V. A current ramp of
dI/dt = 0.4A/µs, that means dVSense/dt = 0.8V/µs, and a
propagation delay time of i.e. tPropagation Delay =180ns
leads then to an Ipeak overshoot of 14.4%. By means of
propagation delay compensation the overshoot is only
about 2% (see Figure 15).
Figure 15 Overcurrent Shutdown
The Propagation Delay Compensation is realized by
means of a dynamic threshold voltage Vcsth (see Figure
16). In case of a steeper slope the switch off of the
driver is earlier to compensate the delay.
Figure 16 Dynamic Voltage Threshold Vcsth
3.6 Control Unit
The Control Unit contains the functions for Active Burst
Mode and Auto Restart Mode. The Active Burst Mode
and the Auto Restart Mode are combined with an
Adjustable Blanking Window which is depending on the
external Soft Start capacitor. By means of this
Adjustable Blanking Window, the IC avoids entering
into these two modes accidentally. Furthermore it also
provides a certain time whereby the overload detection
is delayed. This delay is useful for applications which
normally works with a low current and occasionally
require a short duration of high current.
3.6.1 Adjustable Blanking Window
Figure 17 Adjustable Blanking Window
VSoftS is clamped at 4.4V by the closed switch S1 after
the SMPS is settled. If overload occurs VFB is
exceeding 4.8V. Auto Restart Mode can’t be entered as
the gate G5 is still blocked by the comparator C3. But
after VFB has exceeded 4.8V the switch S1 is opened
0,9
0,95
1
1,05
1,1
1,15
1,2
1,25
1,3
0 0,2 0,4 0,6 0,8 1 1,2 1,4 1,6 1,8 2
with compensation without compensation
dt
dVSense s
V
Sense
V
V
t
Vcsth
VOSC
Signal1 Signal2
VSense PropagationDelay
max. DutyCycle
off time
t
C3
5.4V
C4
4.8V
C5
1.32V
&
G5
&
G6
4.4V
S1 1
G2
ControlUnit
5k
Active
Burst
Mode
Auto
Restart
Mode
RSoftS
6.5V
SoftS
FB
CoolSET™-F3
Functional Description
Version 2.3 16 02 Apr 2013
via the gate G2. The external Soft Start capacitor can
now be charged further by the integrated pull up
resistor RSoftS. The comparator C3 releases the gates
G5 and G6 once VSofts has exceeded 5.4V. Therefore
there is no entering of Auto Restart Mode possible
during this charging time of the external capacitor
CSoftS. The same procedure happens to the external
Soft Start capacitor if a low load condition is detected
by comparator C5 when VFB is falling below 1.32V.
Only after VSoftS has exceeded 5.4V and VFB is still
below 1.32V Active Burst Mode is entered.
3.6.2 Active Burst Mode
The controller provides Active Burst Mode for low load
conditions at VOUT. Active Burst Mode increases
significantly the efficiency at light load conditions while
supporting a low ripple on VOUT and fast response on
load jumps. During Active Burst Mode which is
controlled only by the FB signal the IC is always active
and can therefore immediately response on fast
changes at the FB signal. The Startup Cell is kept
switched off to avoid increased power losses for the
self supply.
Figure 18 Active Burst Mode
The Active Burst Mode is located in the Control Unit.
Figure 18 shows the related components.
3.6.2.1 Entering Active Burst Mode
The FB signal is always observed by the comparator
C5 if the voltage level falls below 1.32V. In that case the
switch S1 is released which allows the capacitor CSoftS
to be charged starting from the clamped voltage level
at 4.4V in normal operating mode. If VSoftS exceeds
5.4V the comparator C3 releases the gate G6 to enter
the Active Burst Mode. The time window that is
generated by combining the FB and SoftS signals with
gate G6 avoids a sudden entering of the Active Burst
Mode due to large load jumps. This time window can be
adjusted by the external capacitor CSoftS.
After entering Active Burst Mode a burst flag is set and
the internal bias is switched off in order to reduce the
current consumption of the IC down to approx. 1.05mA.
In this Off State Phase the IC is no longer self supplied
so that therefore CVCC has to provide the VCC current
(see Figure 19). Furthermore gate G11 is then released
to start the next burst cycle once VFB has 3.4V
exceeded.
It has to be ensured by the application that the VCC
remains above the Undervoltage Lockout Level of 8.5V
to avoid that the Startup Cell is accidentally switched
on. Otherwise power losses are significantly increased.
The minimum VCC level during Active Burst Mode is
depending on the load conditions and the application.
The lowest VCC level is reached at no load conditions
at VOUT.
3.6.2.2 Working in Active Burst Mode
After entering the Active Burst Mode the FB voltage
rises as VOUT starts to decrease due to the inactive
PWM section. Comparator C6a observes the FB signal
if the voltage level 4V is exceeded. In that case the
internal circuit is again activated by the internal Bias to
start with switching. As now in Active Burst Mode the
gate G10 is released the current limit is only 0.257V to
reduce the conduction losses and to avoid audible
noise. If the load at VOUT is still below the starting level
for the Active Burst Mode the FB signal decreases
down to 3.4V. At this level C6b deactivates again the
internal circuit by switching off the internal Bias. The
gate G11 is released as after entering Active Burst
Mode the burst flag is set. If working in Active Burst
Mode the FB voltage is changing like a saw tooth
between 3.4V and 4V (see Figure 19).
3.6.2.3 Leaving Active Burst Mode
The FB voltage immediately increases if there is a high
load jump. This is observed by comparator C4. As the
current limit is ca. 26% during Active Burst Mode a
certain load jump is needed that FB can exceed 4.8V.
At this time C4 resets the Active Burst Mode which also
C3
5.4V
C4
4.8V
C6a
4.0V
1.32V
FB
ControlUnit
Active
Burst
Mode
4.4V
S1
5k
InternalBias
RSoftS
6.5V
SoftS
&
G10
Current
Limiting
&
G6
C6b
3.4V
&
G11
C5
CoolSET™-F3
Functional Description
Version 2.3 17 02 Apr 2013
blocks C12 by the gate G10. Maximum current can now
be provided to stabilize VOUT.
Figure 19 Signals in Active Burst Mode
3.6.3 Protection Mode (Auto Restart Mode)
In order to increase the SMPS system’s robustness
and safety, the IC provides the Auto Restart Mode as a
protection feature. The Auto Restart Mode is entered
upon detection of the following faults in the system:
• VCC Overvoltage
• Overtemperature
• Overload
• Open Loop
• VCC Undervoltage
• Short Optocoupler
Figure 20 Auto Restart Mode
The VCC voltage is observed by comparator C1 if 17V
is exceeded. The output of C1 is combined with both
the output of C11 which checks for SoftS<4.0V, and the
output of C4 which checks for FB>4.8V. Therefore the
overvoltage detection is can only active during Soft
Start Phase(SoftS<4.0V) and when FB signal is
outside the operating range > 4.8V. This means any
small voltage overshoots of VVCC during normal
operating cannot trigger the Auto Restart Mode.
In order to ensure system reliability and prevent any
false activation, a blanking time is implemented before
the IC can enter into the Auto Restart Mode. The output
of the VCC overvoltage detection is fed into a spike
blanking with a time constant of 8.0ms.
The other fault detection which can result in the Auto
Restart Mode and has this 8.0ms blanking time is the
Overtemperature detection. This block checks for a
junction temperature of higher than 140°C for
malfunction operation.
1.32V
4.00V
4.80V
VFB
4.40V
5.40V
VSoftS t
t
0.257V
1.00V
VCS
8.5V
VVCC t
t
1.05mA
IVCC
t
7.2mA
VOUT
t
Max.Ripple<1%
BlankingWindow
Currentlimitlevelduring
ActiveBurstMode
3.40V
EnteringActive
BurstMode LeavingActive
BurstMode
C11
C1
17V
CSoftS
C3
5.4V
C4
4.8V
RSoftS
AutoRestart
Mode
&
G5
&
G1
Thermal Shutdown
Tj>140°C
4.4V
S1
6.5V
VCC
ControlUnit
5k
4.0V
SoftS
FB
Voltage
Reference
Spike
Blanking
8.0us
CoolSET™-F3
Functional Description
Version 2.3 18 02 Apr 2013
Once the Auto Restart Mode is entered, the internal
Voltage Reference is switched off in order to reduce the
current consumption of the IC as much as possible. In
this mode, the average current consumption is only
300mA as the only working block is the Undervoltage
Lockout(UVLO) which controls the Startup Cell by
switching on/off at VVCCon/VVCCoff.
As there is no longer a self supply by the auxiliary
winding, VCC starts to drop. The UVLO switches on the
integrated Startup Cell when VCC falls below 8.5V. It
will continue to charge VCC up to 15V whereby it is
switched off again and the IC enters into the Start Up
Phase.
As long as all fault conditions have been removed, the
IC will automatically power up as usual with switching
cycle at the GATE output after Soft Start duration. Thus
the name Auto Restart Mode.
Other fault detections which are active in normal
operation is the sensing for Overload, Open Loop and
VCC undervoltage conditions. In the first 2 cases, FB
will rise above 4.8V which will be observed by C4. At
this time, S1 is released such that VSoftS can rise from
its earlier clamp voltage of 4.4V. If VSoftS exceeds 5.4V
which is observed by C3, Auto Restart Mode is entered
as both inputs of the gate G5 are high.
This charging of the Soft Start capacitor from 4.4V to
5.4V defines a blanking window which prevents the
system from entering into Auto Restart Mode un-
intentionally during large load jumps. In this event, FB
will rise close to 6.5V for a short duration before the
loop regulates with FB less than 4.8V. This is the same
blanking time window as for the Active Burst Mode and
can therefore be adjusted by the external CSoftS.
In the case of VCC undervoltage, ie. VCC falls below
8.5V, the IC will be turn off with the Startup Cell
charging VCC as described earlier in this section. Once
VCC is charged above 15V, the IC will start a new
startup cycle. The same procedure applies when the
system is under Short Optocoupler fault condition, as it
will lead to VCC undervoltage.
CoolSET™-F3
Electrical Characteristics
Version 2.3 19 02 Apr 2013
4 Electrical Characteristics
Note: All voltages are measured with respect to ground (Pin 8). The voltage levels are valid if other ratings are
not violated.
4.1 Absolute Maximum Ratings
Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction
of the integrated circuit. For the same reason make sure, that any capacitor that will be connected to pin 7
(VCC) is discharged before assembling the application circuit.
Parameter Symbol Limit Values Unit Remarks
min. max.
Drain Source Voltage
ICE3Axx65/xx65I/xx65P
ICE3Bxx65/xx65I/xx65P
VDS - 650 V Tj=110°C
Pulse drain current, tp
limited by max. Tj=150°C
ICE3x0365 ID_Puls1 - 1.6 A
ICE3x0565
ICE3A0565Z
ID_Puls2 - 2.3 A
ICE3x1065 ID_Puls3 - 3.4 A
ICE3x1565 ID_Puls4 - 6.1 A
ICE3x2065
ICE3A2065Z
ID_Puls5 - 10.3 A
ICE3x2565 ID_Puls6 - 15.7 A
ICE3x2065I
ICE3x2065P
ID_Puls7 - 3.4 A
ICE3x3065I
ICE3x3065P
ID_Puls8 - 4.3 A
ICE3x3565I
ICE3x3565P
ID_Puls9 - 6.5 A
ICE3x5065I
ICE3x5065P
ID_Puls10 - 9.4 A
ICE3x5565I
ICE3x5565P
ID_Puls11 - 10.7 A
CoolSET™-F3
Electrical Characteristics
Version 2.3 20 02 Apr 2013
Avalanche energy,
repetitive tAR limited by
max. Tj=150°C1)
ICE3x0365 EAR1 - 0.005 mJ
ICE3x0565
ICE3A0565Z
EAR2 - 0.01 mJ
ICE3x1065 EAR3 - 0.07 mJ
ICE3x1565 EAR4 - 0.15 mJ
ICE3x2065
ICE3A2065Z
EAR5 - 0.40 mJ
ICE3x2565 EAR6 - 0.47 mJ
ICE3x2065I
ICE3x2065P
EAR7 - 0.07 mJ
ICE3x3065I
ICE3x3065P
EAR8 - 0.11 mJ
ICE3x3565I
ICE3x3565P
EAR9 - 0.17 mJ
ICE3x5065I
ICE3x5065P
EAR10 - 0.40 mJ
ICE3x5565I
ICE3x5565P
EAR11 - 0.44 mJ
Parameter Symbol Limit Values Unit Remarks
min. max.
CoolSET™-F3
Electrical Characteristics
Version 2.3 21 02 Apr 2013
Avalanche current,
repetitive tAR limited by
max. Tj=150°C
ICE3x0365 IAR1 - 0.3 A
ICE3x0565
ICE3A0565Z
IAR2 - 0.5 A
ICE3x1065 IAR3 - 1.0 A
ICE3x1565 IAR4 - 1.5 A
ICE3x2065
ICE3A2065Z
IAR5 - 2.0 A
ICE3x2565 IAR6 - 2.5 A
ICE3x2065I
ICE3x2065P
IAR7 - 2.0 A
ICE3x3065I
ICE3x3065P
IAR8 - 3.0 A
ICE3x3565I
ICE3x3565P
IAR9 - 3.5 A
ICE3x5065I
ICE3x5065P
IAR10 - 5.0 A
ICE3x5565I
ICE3x5565P
IAR11 - 5.5 A
1) Repetitive avalanche causes additional power losses that can be calculated as PAV=EAR*f
Parameter Symbol Limit Values Unit Remarks
min. max.
CoolSET™-F3
Electrical Characteristics
Version 2.3 22 02 Apr 2013
Parameter Symbol Limit Values Unit Remarks
min. max.
Thermal Resistance
Junction-Ambient
ICE3x0365
ICE3x0565
ICE3x1065
ICE3x1565
ICE3x2065
ICE3x2565
RthJA1 90 K/W PG-DIP-8
ICE3A0565Z
ICE3x2065Z
RthJA2 96 K/W PG-DIP-7-1
ICE3x2065I
ICE3x3065I
ICE3x3565I
ICE3x5065I
ICE3x5565I
RthJA3 103 K/W PG-TO220-6-46
Free standing without
heatsink
ICE3x2065P
ICE3x3065P
ICE3x3565P
ICE3x5065P
ICE3x5565P
RthJA4 82 K/W PG-TO220-6-47
Free standing without
heatsink
Thermal Resistance
Junction-Case
ICE3x2065I
ICE3x2065P
RthJC1 3.30 K/W PG-TO220-6-46
PG-TO220-6-47
ICE3x3065I
ICE3x3065P
RthJC2 3.08 K/W PG-TO220-6-46
PG-TO220-6-47
ICE3x3565I
ICE3x3565P
RthJC3 2.94 K/W PG-TO220-6-46
PG-TO220-6-47
ICE3x5065I
ICE3x5065P
RthJC4 2.79 K/W PG-TO220-6-46
PG-TO220-6-47
ICE3x5565I
ICE3x5565P
RthJC5 2.75 K/W PG-TO220-6-46
PG-TO220-6-47
VCC Supply Voltage VVCC -0.3 22 V
FB Voltage VFB -0.3 6.5 V
SoftS Voltage VSoftS -0.3 6.5 V
CS Voltage VCS -0.3 6.5 V
Junction Temperature Tj-40 150 °C Controller & CoolMOS™
Storage Temperature TS-55 150 °C
ESD Capability(incl. Drain Pin) VESD - 3 kV Human body model1)
1) According to EIA/JESD22-A114-B (discharging a 100pF capacitor through a 1.5kWseries resistor)
CoolSET™-F3
Electrical Characteristics
Version 2.3 23 02 Apr 2013
4.2 Operating Range
Note: Within the operating range the IC operates as described in the functional description.
4.3 Characteristics
4.3.1 Supply Section 1
Note: The electrical characteristics involve the spread of values within the specified supply voltage and junction
temperature range TJfrom – 25 °C to 130 °C. Typical values represent the median values, which are
related to 25°C. If not otherwise stated, a supply voltage of VCC = 15 V is assumed.
Parameter Symbol Limit Values Unit Remarks
min. max.
VCC Supply Voltage VVCC VVCCoff 21 V
Junction Temperature of
Controller
TjCon -25 130 °C Max value limited due to thermal
shut down of controller
Junction Temperature of
CoolMOS™
TjCoolMOS -25 150 °C
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Start Up Current IVCCstart - 160 220 mAVVCC =14V
VCC Charge Current IVCCcharge1 0.55 1.05 1.60 mA VVCC = 0V
IVCCcharge2 - 0.88 - mA VVCC =14V
Leakage Current of
Start Up Cell and CoolMOS™
IStartLeak - 0.2 50 mAVVCC=16V, VDrain = 450V
at Tj=100°C
Supply Current with
Inactive Gate IVCCsup1 - 5.5 7.0 mA
Supply Current in
Auto Restart Mode with
Inactive Gate
IVCCrestart - 300 - mAIFB = 0
ISofts = 0
Supply Current in
Active Burst Mode
with Inactive Gate
IVCCburst1 - 1.05 1.25 mA VVCC =15V
VFB = 3.7V, VSoftS = 4.4V
IVCCburst2 - 0.95 1.15 mA VVCC = 9.5V
VFB = 3.7V, VSoftS = 4.4V
VCC Turn-On Threshold
VCC Turn-Off Threshold
VCC Turn-On/Off Hysteresis
VVCCon
VVCCoff
VVCChys
14.2
8.0
-
15.0
8.5
6.5
15.8
9.0
-
V
V
V
CoolSET™-F3
Electrical Characteristics
Version 2.3 24 02 Apr 2013
4.3.2 Supply Section 2
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Supply Current
with Active Gate ICE3A0365 IVCCsup2 - 5.6 7.1 mA VSoftS = 4.4V
IFB = 0
ICE3B0365 IVCCsup2 - 5.5 7.0 mA
ICE3A0565
ICE3A0565Z IVCCsup2 - 5.7 7.2 mA
ICE3B0565 IVCCsup2 - 5.6 7.1 mA
ICE3A1065 IVCCsup2 - 5.9 7.5 mA
ICE3B1065 IVCCsup2 - 5.7 7.2 mA
ICE3A1565 IVCCsup2 - 6.3 8.0 mA
ICE3B1565 IVCCsup2 - 6.0 7.6 mA
ICE3A2065
ICE3A2065Z IVCCsup2 - 7.1 8.9 mA
ICE3B2065 IVCCsup2 - 6.5 8.2 mA
ICE3A2565 IVCCsup2 - 8.1 10.2 mA
ICE3B2565 IVCCsup2 - 7.2 9.0 mA
Supply Current
with Active Gate ICE3A2065I
ICE3A2065P IVCCsup2 - 5.9 7.5 mA VSoftS = 4.4V
IFB = 0
ICE3B2065I
ICE3B2065P IVCCsup2 - 5.7 7.2 mA
ICE3A3065I
ICE3A3065P IVCCsup2 - 6.1 7.7 mA
ICE3B3065I
ICE3B3065P IVCCsup2 - 5.9 7.4 mA
ICE3A3565I
ICE3A3565P IVCCsup2 - 6.4 8.0 mA
ICE3B3565I
ICE3B3565P IVCCsup2 - 6.0 7.6 mA
ICE3A5065I
ICE3A5065P IVCCsup2 - 7.2 9.0 mA
ICE3B5065I
ICE3B5065P IVCCsup2 - 6.6 8.3 mA
ICE3A5565I
ICE3A5565P IVCCsup2 - 7.6 9.5 mA
ICE3B5565I
ICE3B5565P IVCCsup2 - 6.8 8.5 mA
CoolSET™-F3
Electrical Characteristics
Version 2.3 25 02 Apr 2013
4.3.3 Internal Voltage Reference
4.3.4 PWM Section
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Trimmed Reference Voltage VREF 6.37 6.50 6.63 V measured at pin FB
IFB = 0
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Fixed Oscillator
Frequency
ICE3Axx65
ICE3Axx65Z
ICE3Axx65I
ICE3Axx65P
fOSC1 92 100 108 kHz
fOSC2 94 100 106 kHz Tj= 25°C
Fixed Oscillator
Frequency
ICE3Bxx65
ICE3Bxx65I
ICE3Bxx65P
fOSC1 61 67 73 kHz
fOSC2 63 67 71 kHz Tj= 25°C
Max. Duty Cycle Dmax 0.67 0.72 0.77
Min. Duty Cycle Dmin 0 - - VFB < 0.3V
PWM-OP Gain AV3.5 3.7 3.9
Voltage Ramp Max Level VMax-Ramp - 0.85 - V
VFB Operating Range Min Level VFBmin 0.3 0.7 - V
VFB Operating Range Max level VFBmax - - 4.75 V CS=1V, limited by
Comparator C41)
1) The parameter is not subjected to production test - verified by design/characterization
FB Pull-Up Resistor RFB 16 20 27 kW
SoftS Pull-Up Resistor RSoftS 39 50 62 kW
CoolSET™-F3
Electrical Characteristics
Version 2.3 26 02 Apr 2013
4.3.5 Control Unit
Note: The trend of all the voltage levels in the Control Unit is the same regarding the deviation except VVCCOVP
and VVCCPD
4.3.6 Current Limiting
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Deactivation Level for SoftS
Comparator C7 by C2
VSoftSC2 3.85 4.00 4.15 V VFB > 5V
Clamped VSoftS Voltage during
Normal Operating Mode
VSoftSclmp 4.23 4.40 4.57 V VFB = 4V
Activation Limit of
Comparator C3
VSoftSC3 5.20 5.40 5.60 V VFB > 5V
SoftS Startup Current ISoftSstart - 1.3 - mA VSoftS = 0V
Over Load & Open Loop Detection
Limit for Comparator C4
VFBC4 4.62 4.80 4.98 V VSoftS > 5.6V
Active Burst Mode Level for
Comparator C5
VFBC5 1.23 1.30 1.37 V VSoftS > 5.6V
Active Burst Mode Level for
Comparator C6a
VFBC6a 3.85 4.00 4.15 V After Active Burst
Mode is entered
Active Burst Mode Level for
Comparator C6b
VFBC6b 3.25 3.40 3.55 V After Active Burst
Mode is entered
Overvoltage Detection Limit VVCCOVP 16.1 17.1 18.1 V VFB > 5V
VSoftS < 4.0V
Thermal Shutdown1)
1) The parameter is not subjected to production test - verified by design/characterization
TjSD 130 140 150 °C
Spike Blanking tSpike - 8.0 - ms
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Peak Current Limitation
(incl. Propagation Delay)
Vcsth 0.97 1.02 1.07 V dVsense / dt = 0.6V/ms
(see Figure 16)
Peak Current Limitation during
Active Burst Mode
VCS2 0.232 0.257 0.282 V
Leading Edge Blanking tLEB - 220 - ns VSoftS = 4.4V
CS Input Bias Current ICSbias -1.0 -0.2 0 mAVCS =0V
CoolSET™-F3
Electrical Characteristics
Version 2.3 27 02 Apr 2013
4.3.7 CoolMOS™Section
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Drain Source Breakdown Voltage
ICE3Axx65/xx65I/xx65P
ICE3Bxx65/xx65I/xx65P
V(BR)DSS 600
650
-
-
-
-
V
V
Tj= 25°C
Tj= 110°C
Drain Source
On-Resistance
ICE3A0365
ICE3B0365
RDSon1 -
-
6.45
13.7
7.50
17.0
W
W
Tj= 25°C
Tj=125°C1)
at ID= 0.3A
ICE3A0565
ICE3A0565Z
ICE3B0565
RDSon2 -
-
4.70
10.0
5.44
12.5
W
W
Tj= 25°C
Tj=125°C1)
at ID= 0.5A
ICE3A1065
ICE3B1065
RDSon3 -
-
2.95
6.6
3.42
7.56
W
W
Tj= 25°C
Tj=125°C1)
at ID= 1.0A
ICE3A1565
ICE3B1565
RDSon4 -
-
1.70
3.57
1.96
4.12
W
W
Tj= 25°C
Tj=125°C1)
at ID= 1.5A
ICE3A2065
ICE3A2065Z
ICE3B2065
RDSon5 -
-
0.92
1.93
1.05
2.22
W
W
Tj= 25°C
Tj=125°C1)
at ID= 2.0A
ICE3A2565
ICE3B2565
RDSon6 -
-
0.65
1.37
0.75
1.58
W
W
Tj= 25°C
Tj=125°C1)
at ID= 2.5A
Drain Source
On-Resistance
ICE3A2065I
ICE3A2065P
ICE3B2065I
ICE3B2065P
RDSon7 -
-
3.00
6.6
3.47
7.63
W
W
Tj= 25°C
Tj=125°C1)
at ID=1.0A
ICE3A3065I
ICE3A3065P
ICE3B3065I
ICE3B3065P
RDSon8 -
-
2.10
4.41
2.43
5.10
W
W
Tj= 25°C
Tj=125°C1)
at ID= 1.5A
ICE3A3565I
ICE3A3565P
ICE3B3565I
ICE3B3565P
RDSon9 -
-
1.55
3.26
1.80
3.78
W
W
Tj= 25°C
Tj=125°C1)
at ID= 1.8A
ICE3A5065I
ICE3A5065P
ICE3B5065I
ICE3B5065P
RDSon10 0.95
2.00
1.10
2.31
W
W
Tj= 25°C
Tj=125°C1)
at ID= 2.5A
ICE3A5565I
ICE3A5565P
ICE3B5565I
ICE3B5565P
RDSon11 -
-
0.79
1.68
0.91
1.92
W
W
Tj= 25°C
Tj=125°C1)
at ID= 2.8A
CoolSET™-F3
Electrical Characteristics
Version 2.3 28 02 Apr 2013
Effective output
capacitance,
energy related
ICE3A0365
ICE3B0365
Co(er)1 - 3.65 - pF VDS = 0V to 480V
ICE3A0565
ICE3A0565Z
ICE3B0565
Co(er)2 - 4.75 - pF
ICE3A1065
ICE3B1065
Co(er)3 - 7.0 - pF
ICE3A1565
ICE3B1565
Co(er)4 - 11.63 - pF
ICE3A2065
ICE3A2065Z
ICE3B2065
Co(er)5 - 21 - pF
ICE3A2565
ICE3B2565
Co(er)6 - 26.0 - pF
Effective output
capacitance,
energy related
ICE3A2065I
ICE3A2065P
ICE3B2065I
ICE3B2065P
Co(er)7 - 7.0 - pF VDS = 0V to 480V
ICE3A3065I
ICE3A3065P
ICE3B3065I
ICE3B3065P
Co(er)8 - 10.0 - pF
ICE3A3565I
ICE3A3565P
ICE3B3565I
ICE3B3565P
Co(er)9 - 14.0 - pF
ICE3A5065I
ICE3A5065P
ICE3B5065I
ICE3B5065P
Co(er)10 - 20.5 - pF
ICE3A5565I
ICE3A5565P
ICE3B5565I
ICE3B5565P
Co(er)11 - 23.0 - pF
Rise Time trise - 302) - ns
Fall Time tfall - 302) - ns
1) The parameter is not subjected to production test - verified by design/characterization
2) Measured in a Typical Flyback Converter Application
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
CoolSET™-F3
Outline Dimension
Version 2.3 29 02 Apr 2013
5 Outline Dimension
Figure 21 PG-DIP-8 (Pb-free lead plating Plastic Dual In-Line Outline)
PG-DIP-8
(Plastic Dual In-Line Package)
CoolSET™-F3
Outline Dimension
Version 2.3 30 02 Apr 2013
Figure 22 PG-DIP-7-1 (Pb-free lead plating Plastic Dual In-Line Outline)
PG-DIP-7-1
(Plastic Dual In-Line package)
CoolSET™-F3
Outline Dimension
Version 2.3 31 02 Apr 2013
Figure 23 PG-TO220-6-46 (Pb-free lead plating Isodrain I2Pak Package)
Figure 24 PG-TO220-6-47 (Pb-free lead plating Isodrain Package)
Dimensions in mm
PG-TO220-6-46
(Isodrain I2Pak Package)
PG-TO220-6-47
(Isodrain Package)
Qualität hat für uns eine umfassende
Bedeutung. Wir wollen allen Ihren
Ansprüchen in der bestmöglichen
Weise gerecht werden. Es geht uns also
nicht nur um die Produktqualität –
unsere Anstrengungen gelten
gleichermaßen der Lieferqualität und
Logistik, dem Service und Support
sowie allen sonstigen Beratungs- und
Betreuungsleistungen.
Dazu gehört eine bestimmte
Geisteshaltung unserer Mitarbeiter.
Total Quality im Denken und Handeln
gegenüber Kollegen, Lieferanten und
Ihnen, unserem Kunden. Unsere
Leitlinie ist jede Aufgabe mit „Null
Fehlern“ zu lösen – in offener
Sichtweise auch über den eigenen
Arbeitsplatz hinaus – und uns ständig
zu verbessern.
Unternehmensweit orientieren wir uns
dabei auch an „top“ (Time Optimized
Processes), um Ihnen durch größere
Schnelligkeit den entscheidenden
Wettbewerbsvorsprung zu verschaffen.
Geben Sie uns die Chance, hohe
Leistung durch umfassende Qualität zu
beweisen.
Wir werden Sie überzeugen.
Quality takes on an allencompassing
significance at Semiconductor Group.
For us it means living up to each and
every one of your demands in the best
possible way. So we are not only
concerned with product quality. We
direct our efforts equally at quality of
supply and logistics, service and
support, as well as all the other ways in
which we advise and attend to you.
Part of this is the very special attitude of
our staff. Total Quality in thought and
deed, towards co-workers, suppliers
and you, our customer. Our guideline is
“do everything with zero defects”, in an
open manner that is demonstrated
beyond your immediate workplace, and
to constantly improve.
Throughout the corporation we also
think in terms of Time Optimized
Processes (top), greater speed on our
part to give you that decisive
competitive edge.
Give us the chance to prove the best of
performance through the best of quality
– you will be convinced.
h t t p : / / w w w . i n f i n e o n . c o m
Total Quality Management
Published by Infineon Technologies AG
