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© 2009 Microchip Technology Inc. DS39894B-page 55
PIC18F8723 FAMILY
INDEX
A
A/D ...................................................................................... 31
A/D Converter Interrupt, Configuring .......................... 35
Acquisition Requirements ........................................... 36
ADCON0 Register....................................................... 31
ADCON1 Register....................................................... 31
ADCON2 Register....................................................... 31
ADRESH Register................................................. 31, 34
ADRESL Register ....................................................... 31
Analog Port Pins, Configuring..................................... 38
Associated Registers .................................................. 40
Configuring the Module............................................... 35
Conversion Clock (TAD) .............................................. 37
Conversion Status (GO/DONE Bit) ............................. 34
Conversions ................................................................ 39
Converter Characteristics ........................................... 46
Discharge.................................................................... 39
Operation in Power-Managed Modes ......................... 38
Selecting and Configuring Acquisition Time ............... 37
Special Event Trigger (ECCP2) .................................. 40
Transfer Function........................................................ 35
Use of the ECCP2 Trigger .......................................... 40
Absolute Maximum Ratings ................................................ 43
ADCON0 Register............................................................... 31
GO/DONE Bit.............................................................. 34
ADCON1 Register............................................................... 31
ADCON2 Register............................................................... 31
ADRESH Register............................................................... 31
ADRESL Register ......................................................... 31, 34
Analog-to-Digital Converter. See A/D.
B
Block Diagrams
A/D .............................................................................. 34
Analog Input Model ..................................................... 35
PIC18F6628/6723....................................................... 11
PIC18F8628/8723....................................................... 12
C
Compare (ECCP2 Module)
Special Event Trigger.................................................. 40
Conversion Considerations................................................. 52
Customer Change Notification Service ............................... 57
Customer Notification Service............................................. 57
Customer Notification System............................................... 7
Customer Support ............................................................... 57
D
Device Differences.............................................................. 51
Device ID Registers ............................................................ 41
Device Overview
Features (table)........................................................... 10
Special Features ........................................................... 9
E
Electrical Characteristics..................................................... 43
Equations
A/D Acquisition Time................................................... 36
A/D Minimum Charging Time...................................... 36
Calculating the Minimum Required Acquisition Time.. 36
Errata .................................................................................... 7
External Memory Interface.................................................... 3
F
Features Summary Table ..................................................... 3
I
Internet Address ................................................................. 57
Interrupt Sources
A/D Conversion Complete .......................................... 35
M
Microchip Internet Web Site................................................ 57
Migration From Baseline to Enhanced Devices.................. 52
Migration From High-End to Enhanced Devices................. 53
Migration From Mid-Range to Enhanced Devices .............. 53
More Information................................................................... 7
Customer Notification System ...................................... 7
Errata............................................................................ 7
O
Overview
External Memory Interface ........................................... 3
Features Summary Table ............................................. 3
Peripheral Highlights .................................................... 3
Power-Managed Modes ............................................... 3
Special Microcontroller Features .................................. 3
P
Packaging Information........................................................ 49
Peripheral Highlights............................................................. 3
Pin Diagrams
64-Pin TQFP................................................................. 4
80-Pin TQFP................................................................. 5
Pin Functions
AVDD (64-pin) ............................................................. 20
AVDD (80-pin) ............................................................. 30
AVSS (64-pin).............................................................. 20
AVSS (80-pin).............................................................. 30
OSC1/CLKI/RA7................................................... 13, 21
OSC2/CLKO/RA6 ................................................. 13, 21
RA0/AN0............................................................... 14, 22
RA1/AN1............................................................... 14, 22
RA2/AN2/VREF- .................................................... 14, 22
RA3/AN3/VREF+ ................................................... 14, 22
RA4/T0CKI ........................................................... 14, 22
RA5/AN4/HLVDIN ................................................ 14, 22
RB0/INT0/FLT0 .................................................... 15, 23
RB1/INT1.............................................................. 15, 23
RB2/INT2.............................................................. 15, 23
RB3/INT3.................................................................... 15
RB3/INT3/ECCP2/P2A ............................................... 23
RB4/KBI0.............................................................. 15, 23
RB5/KBI1/PGM..................................................... 15, 23
RB6/KBI2/PGC ..................................................... 15, 23
RB7/KBI3/PGD ..................................................... 15, 23
RC0/T1OSO/T13CKI ............................................ 16, 24
RC1/T1OSI/ECCP2/P2A ...................................... 16, 24
RC2/ECCP1/P1A.................................................. 16, 24
RC3/SCK1/SCL1 .................................................. 16, 24
RC4/SDI1/SDA1 ................................................... 16, 24
RC5/SDO1............................................................ 16, 24
RC6/TX1/CK1....................................................... 16, 24
RC7/RX1/DT1....................................................... 16, 24
RD0/AD0/PSP0 .......................................................... 25
RD0/PSP0 .................................................................. 17