January 2012 Doc ID 2182 Rev 6 1/20
20
NE555
SA555 - SE555
General-purpose single bipolar timers
Features
■Low turn-off time
■Maximum operating frequency greater than
500 kHz
■Timing from microseconds to hours
■Operates in both astable and monostable
modes
■Output can source or sink up to 200 mA
■Adjustable duty cycle
■TTL compatible
■Temperature stability of 0.005% per °C
Description
The NE555, SA555, and SE555 monolithic timing
circuits are highly stable controllers capable of
producing accurate time delays or oscillation. In
the time delay mode of operation, the time is
precisely controlled by one external resistor and
capacitor. For a stable operation as an oscillator,
the free running frequency and the duty cycle are
both accurately controlled with two external
resistors and one capacitor.
The circuit may be triggered and reset on falling
waveforms, and the output structure can source
or sink up to 200 mA.
1
2
36
7
8
45
N
DIP8
(Plastic package)
D
SO8
(Plastic micropackage)
1 - GND
2 - Trigger
3 - Output
4 - Reset
5 - Control voltage
6 - Threshold
7 - Discharge
8 - VCC
Pin connections
(top view)
www.st.com
Schematic diagrams NE555 - SA555 - SE555
2/20 Doc ID 2182 Rev 6
1 Schematic diagrams
Figure 1. Block diagram
Figure 2. Schematic diagram
THRESHOLD
COMP
5kΩ
5kΩ
5kΩ
TRIGGER
R
FLIP-FLOP
S
Q
DISCHARGE
OUT
INHIBIT/
RESET
RESET
COMP
S
+
CONTROL VOLTAGE
VCC
NE555 - SA555 - SE555 Absolute maximum ratings and operating conditions
Doc ID 2182 Rev 6 3/20
2 Absolute maximum ratings and operating conditions
Table 1. Absolute maximum ratings
Symbol Parameter Value Unit
VCC Supply voltage 18 V
IOUT Output current (sink & source) ±225 mA
Rthja
Thermal resistance junction to ambient(1)
DIP8
SO-8
1. Short-circuits can cause excessive heating. These values are typical.
85
125
°C/W
Rthjc
Thermal resistance junction to case(1)
DIP8
SO-8
41
40
°C/W
ESD
Human body model (HBM)(2)
2. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a
1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations
while the other pins are floating.
1000
VMachine model (MM)(3)
3. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between
two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of
connected pin combinations while the other pins are floating.
100
Charged device model (CDM)(4)
4. Charged device model: all pins and the package are charged together to the specified voltage and then
discharged directly to the ground through only one pin. This is done for all pins.
1500
Latch-up immunity 200 mA
TLEAD Lead temperature (soldering 10 seconds) 260 °C
TjJunction temperature 150 °C
Tstg Storage temperature range -65 to 150 °C
Table 2. Operating conditions
Symbol Parameter Value Unit
VCC
Supply voltage
NE555
SA555
SE555
4.5 to 16
4.5 to 16
4.5 to 18
V
Vth, Vtrig,
Vcl, Vreset
Maximum input voltage VCC V
IOUT Output current (sink and source) ±200 mA
Toper
Operating free air temperature range
NE555
SA555
SE555
0 to 70
-40 to 105
-55 to 125
°C
Electrical characteristics NE555 - SA555 - SE555
4/20 Doc ID 2182 Rev 6
3 Electrical characteristics
Table 3. Tamb = +25° C, VCC = +5 V to +15 V (unless otherwise specified)
Symbol Parameter
SE555 NE555 - SA555
Unit
Min. Typ. Max. Min. Typ. Max.
ICC
Supply current (RL = ∝)
Low state VCC = +5 V
VCC = +15 V
High state VCC = +5 V
3
10
2
5
12
3
10
2
6
15 mA
Timing error (monostable)
(RA = 2 kΩ to 100 kΩ, C = 0.1 μF)
Initial accuracy (1)
Drift with temperature
Drift with supply voltage
0.5
30
0.05
2
100
0.2
1
50
0.1
3
0.5
%
ppm/°C
%/V
Timing error (astable)
(RA, RB = 1 kΩ to 100 kΩ, C = 0.1 μF, V CC= +15 V)
Initial accuracy (1)
Drift with temperature
Drift with supply voltage
1.5
90
0.15
2.25
150
0.3
%
ppm/°C
%/V
VCL
Control voltage level
VCC = +15 V
VCC = +5 V
9.6
2.9
10
3.33
10.4
3.8
9
2.6
10
3.33
11
4
V
Vth
Threshold voltage
VCC = +15 V
VCC = +5 V
9.4
2.7
10
3.33
10.6
4
8.8
2.4
10
3.33
11.2
4.2
V
Ith Threshold current (2) 0.1 0.25 0.1 0.25 µA
Vtrig
Trigger voltage
VCC = +15 V
VCC = +5 V
4.8
1.45
5
1.67
5.2
1.9
4.5
1.1
5
1.67
5.6
2.2
V
Itrig Trigger current (Vtrig = 0 V) 0.5 0.9 0.5 2.0 µA
Vreset Reset voltage (3)0.4 0.7 1 0.4 0.7 1 V
Ireset
Reset current
Vreset = +0.4 V
Vreset = 0 V
0.1
0.4
0.4
1
0.1
0.4
0.4
1.5
mA
VOL
Low level output voltage
VCC = +15 VIO(sink) = 10 mA
IO(sink) = 50 mA
IO(sink) = 100 mA
IO(sink) = 200 mA
VCC = +5 V IO(sink) = 8 mA
IO(sink) = 5 mA
0.1
0.4
2
2.5
0.1
0.05
0.15
0.5
2.2
0.25
0.2
0.1
0.4
2
2.5
0.3
0.25
0.25
0.75
2.5
0.4
0.35
V
NE555 - SA555 - SE555 Electrical characteristics
Doc ID 2182 Rev 6 5/20
VOH
High level output voltage
VCC = +15 VIO(sink) = 200 mA
IO(sink) = 100 mA
VCC = +5 V IO(sink) = 100 mA
13
3
12.5
13.3
3.3
12.7
5
2.75
12.5
13.3
3.3
V
Idis(off)
Discharge pin leakage current
(output high) Vdis = 10 V 20 100 20 100 nA
Vdis(sat)
Discharge pin saturation voltage
(output low) (4)
VCC = +15V, Idis = 15 mA
VCC = +5V, Idis = 4.5 mA
180
80
480
200
180
80
480
200
mV
tr
tf
Output rise time
Output fall time
100
100
200
200
100
100
300
300 ns
toff Turn off time (5) (Vreset = VCC)0.50.5µs
1. Tested at VCC = +5 V and VCC = +15 V.
2. This will determine the maximum value of RA + RB for 15 V operation. The maximum total (RA + RB) is 20 MΩ for +15 V
operation and 3.5 MΩ for +5 V operation.
3. Specified with trigger input high.
4. No protection against excessive pin 7 current is necessary, providing the package dissipation rating is not exceeded.
5. Time measured from a positive pulse (from 0 V to 0.8 x VCC) on the threshold pin to the transition from high to low on the
output pin. Trigger is tied to threshold.
Table 3. Tamb = +25° C, VCC = +5 V to +15 V (unless otherwise specified) (continued)
Symbol Parameter
SE555 NE555 - SA555
Unit
Min. Typ. Max. Min. Typ. Max.
Electrical characteristics NE555 - SA555 - SE555
6/20 Doc ID 2182 Rev 6
Figure 3. Minimum pulse width required for
triggering
Figure 4. Supply current versus supply
voltage
Figure 5. Delay time versus temperature Figure 6. Low output voltage versus output
sink current
Figure 7. Low output voltage versus output
sink current
Figure 8. Low output voltage versus output
sink current
NE555 - SA555 - SE555 Electrical characteristics
Doc ID 2182 Rev 6 7/20
Figure 9. High output voltage drop versus
output
Figure 10. Delay time versus supply voltage
Figure 11. Propagation delay versus voltage
level of trigger value
Application information NE555 - SA555 - SE555
8/20 Doc ID 2182 Rev 6
4 Application information
4.1 Monostable operation
In the monostable mode, the timer generates a single pulse. As shown in Figure 12, the
external capacitor is initially held discharged by a transistor inside the timer.
Figure 12. Typical schematics in monostable operation
The circuit triggers on a negative-going input signal when the level reaches 1/3 VCC. Once
triggered, the circuit remains in this state until the set time has elapsed, even if it is triggered
again during this interval. The duration of the output HIGH state is given by t = 1.1 R1C1 and
is easily determined by Figure 14.
Note that because the charge rate and the threshold level of the comparator are both
directly proportional to supply voltage, the timing interval is independent of supply. Applying
a negative pulse simultaneously to the reset terminal (pin 4) and the trigger terminal (pin 2)
during the timing cycle discharges the external capacitor and causes the cycle to start over.
The timing cycle now starts on the positive edge of the reset pulse. During the time the reset
pulse is applied, the output is driven to its LOW state.
When a negative trigger pulse is applied to pin 2, the flip-flop is set, releasing the short-
circuit across the external capacitor and driving the output HIGH. The voltage across the
capacitor increases exponentially with the time constant t = R1C1. When the voltage across
the capacitor equals 2/3 VCC, the comparator resets the flip-flop which then discharges the
capacitor rapidly and drives the output to its LOW state.
Figure 13 shows the actual waveforms generated in this mode of operation.
When Reset is not used, it should be tied high to avoid any possibility of unwanted
triggering.
Reset
Trigger
Output
R1
C1
Control Voltage
0.01
μ
F
NE555
= 5 to 15V
V
CC
4
2
3
1
5
6
7
8
NE555 - SA555 - SE555 Application information
Doc ID 2182 Rev 6 9/20
Figure 13. Waveforms in monostable operation
Figure 14. Pulse duration versus R1C1
4.2 Astable operation
When the circuit is connected as shown in Figure 15 (pins 2 and 6 connected) it triggers
itself and free runs as a multi-vibrator. The external capacitor charges through R1 and R2
and discharges through R2 only. Thus the duty cycle can be set accurately by adjusting the
ratio of these two resistors.
In the astable mode of operation, C1 charges and discharges between 1/3 VCC and 2/3 VCC.
As in the triggered mode, the charge and discharge times and, therefore, frequency are
independent of the supply voltage.
CAPACITOR VOLTAGE = 2.0V/div
t = 0.1 ms / div
INPUT = 2.0V/div
OUTPUT VOLTAGE = 5.0V/div
R1 = 9.1kΩ, C1 = 0.01μF, R = 1kΩ
L
C
(μF)
10
1.0
0.1
0.01
0.001
10 100 1.0 10 100 10 (t )
d
μsμsmsmsmss
10M
Ω
1M
Ω
100k
Ω
10k
Ω
R1= 1k
Ω
Application information NE555 - SA555 - SE555
10/20 Doc ID 2182 Rev 6
Figure 15. Typical schematics in astable operation
Figure 16 shows the actual waveforms generated in this mode of operation.
The charge time (output HIGH) is given by:
t1 = 0.693 (R1 + R2) C1
and the discharge time (output LOW) by:
t2 = 0.693 (R2) C1
Thus the total period T is given by:
T = t1 + t2 = 0.693 (R1 + 2R2) C1
The frequency of oscillation is then:
It can easily be found from Figure 17.
The duty cycle is given by:
Output3
48
7
5
1
R1
C1
2
6
R2
Control
Voltage
NE555
V
CC = 5 to 15V
0.01μF
f = 1
T
--- 1.44
R1 2R2+()C1
---------------------------------------=
t1
t1 t2+()
--------------------- R1 R2+()
R1 2 R2•+()
------------------------------------1R2
R1 R2+()
---------------------------
–==
NE555 - SA555 - SE555 Application information
Doc ID 2182 Rev 6 11/20
Figure 16. Waveforms in astable operation
Figure 17. Free running frequency versus R1, R2 and C1
t = 0.5 ms / div
OUTPUT VOLTAGE = 5.0V/div
CAPACITOR VOLTAGE = 1.0V/div
R1 = R2 = 4.8k
Ω
, C1= 0.1
μ
F, R = 1k
Ω
L
C
(μF)
10
1.0
0.1
0.01
0.001
0.1 1 10 100 1k 10k f (Hz)
o
1M
Ω
R1 + R2 = 10M
Ω
100k
Ω
10k
Ω
1k
Ω
Application information NE555 - SA555 - SE555
12/20 Doc ID 2182 Rev 6
4.3 Pulse width modulator
When the timer is connected in the monostable mode and triggered with a continuous pulse
train, the output pulse width can be modulated by a signal applied to pin 5. Figure 18 shows
the circuit.
Figure 18. Pulse width modulator
4.4 Linear ramp
When the pull-up resistor, RA, in the monostable circuit is replaced by a constant current
source, a linear ramp is generated. Figure 19 shows a circuit configuration that will perform
this function.
Figure 19. Linear ramp
Trigger
Output
R
C
NE555
2
4
3
1
5
6
7
Modulation
Input
8
A
V
CC
Trigger
Output
C
NE555
2
4
3
1
5
6
7
8
E
V
CC
0.01
μ
F
R2
R1
R
2N4250
or equiv.
NE555 - SA555 - SE555 Application information
Doc ID 2182 Rev 6 13/20
Figure 20 shows the waveforms generator by the linear ramp.
The time interval is given by:
Figure 20. Linear ramp
4.5 50% duty cycle oscillator
For a 50% duty cycle, the resistors RA and RB can be connected as in Figure 21. The time
period for the output high is the same as for astable operation (see Section 4.2 on page 9):
t1 = 0.693 RA C
For the output low it is
Thus the frequency of oscillation is:
T = (2/3 Vcc RE (R1+R2) C
R1 Vcc - VBE (R1+R2)
---------------------------------------------------------------- VBE = 0.6V
VCC = 5 V
Time:
20 µs/DIV
R1 + 47 kΩ
R2 = 100 kΩ
RE = 2.7 kΩ
C = 0.01 µF
Top trace: input 3V/DIV
Middle trace: output 5 V/DIV
Bottom trace: output 5 V/DIV
Bottom trace: capacitor voltage 1 V/DIV
t2[(R. RB)/(RA+RB)].C.Ln RB 2RA–
2RB RA–
---------------------------
=
f1
t1 t2+
-----------------=
Application information NE555 - SA555 - SE555
14/20 Doc ID 2182 Rev 6
Figure 21. 50% duty cycle oscillator
Note that this circuit will not oscillate if RB is greater than 1/2 RA because the junction of RA
and RB cannot bring pin 2 down to 1/3 VCC and trigger the lower comparator.
4.6 Additional information
Adequate power supply bypassing is necessary to protect associated circuitry. The
minimum recommended is 0.1 µF in parallel with 1 µF electrolytic.
Out
RA
C
NE555
2
4
3
1
5
6
7
8
V
CC
51kΩ
RB
22kΩ
0.01μF
V
CC
0.01μF
NE555 - SA555 - SE555 Package information
Doc ID 2182 Rev 6 15/20
5 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Package information NE555 - SA555 - SE555
16/20 Doc ID 2182 Rev 6
5.1 DIP8 package information
Figure 22. DIP8 package mechanical drawing
Table 4. DIP8 package mechanical data
Ref.
Dimensions
Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A5.33 0.210
A1 0.380.015
A2 2.92 3.30 4.95 0.115 0.1300.195
b0.36 0.46 0.56 0.014 0.018 0.022
b2 1.14 1.52 1.78 0.045 0.060 0.070
c0.200.250.36 0.008 0.010 0.014
D 9.02 9.27 10.16 0.355 0.365 0.400
E 7.62 7.87 8.26 0.300 0.310 0.325
E1 6.10 6.35 7.11 0.240 0.250 0.280
e 2.54 0.100
eA 7.62 0.300
eB 10.92 0.430
L2.923.303.81 0.115 0.1300.150
NE555 - SA555 - SE555 Package information
Doc ID 2182 Rev 6 17/20
5.2 SO-8 package information
Figure 23. SO-8 package mechanical drawing
Table 5. SO-8 package mechanical data
Ref.
Dimensions
Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A1.750.069
A1 0.10 0.25 0.004 0.010
A2 1.25 0.049
b 0.28 0.48 0.011 0.019
c0.17 0.230.007 0.010
D 4.80 4.90 5.00 0.189 0.1930.197
E 5.80 6.00 6.20 0.228 0.2360.244
E1 3.80 3.90 4.00 0.150 0.154 0.157
e 1.27 0.050
h 0.25 0.50 0.010 0.020
L 0.40 1.27 0.016 0.050
L1 1.04 0.040
k 0 8° 1° 8°
ccc 0.10 0.004
Ordering information NE555 - SA555 - SE555
18/20 Doc ID 2182 Rev 6
6 Ordering information
Table 6. Order codes
Part number Temperature range Package Packing Marking
NE555N 0 °C, +70 °C DIP8 Tube NE555N
NE555D(1)/DT
1. Not recommended for new design. Contact local ST sales office for availability.
SO-8 Tube(1) or tape & reel NE555
SA555N -40 °C, +105 °C DIP8 Tube SA555N
SA555D(1)/DT SO-8 Tube(1) or tape & reel SA555
SE555N -55 °C, + 125 °C DIP8 Tube SE555N
SE555D(1)/DT SO-8 Tube(1) or tape & reel SE555
NE555 - SA555 - SE555 Revision history
Doc ID 2182 Rev 6 19/20
7 Revision history
Table 7. Document revision history
Date Revision Changes
01-Jun-20031 Initial release.
2004-2006 2-3Internal revisions
15-Mar-2007 4 Expanded order code table.
Template update.
06-Nov-2008 5
Added IOUT value in Table 1: Absolute maximum ratings and
Table 2: Operating conditions.
Added ESD tolerance, latch-up tolerance, Rthja and Rthjcin
Table 1: Absolute maximum ratings.
04-Jan-2012 6
Modified duty cycle equation in Section 4.2: Astable operation.
Updated ECOPACK® text in Section 5: Package information.
Added footnote 1 to Table 6: Order codes as shipping method in
tubes is not recommended for new design.
NE555 - SA555 - SE555
20/20 Doc ID 2182 Rev 6
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