MAX4737/MAX4738/MAX4739
4.5
Ω
Quad SPST Analog Switches in UCSP
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Detailed Description
The MAX4737/MAX4738/MAX4739 quad SPST analog
switches operate from a single +1.8V to +5.5V supply.
The MAX4737/MAX4738/MAX4739 offer excellent AC
characteristics, <0.5nA leakage current, less than 1ns
differential skew, and 15pF on-channel capacitance. All
of these devices are CMOS-logic compatible with V+ to
GND signal handling capability.
The MAX4737/MAX4738/MAX4739 are USB-complaint
switches that provide 4.5Ω(max) on-resistance and
15pF on-channel capacitance to maintain signal integri-
ty. At 12Mbps (USB full-speed data rate specification),
the MAX4737/MAX4738/MAX4739 introduce less than
2ns propagation delay between input and output sig-
nals and less than 0.5ns change in skew for the output
signals (see Figure 4).
The MAX4737 has four normally open (NO) switches, the
MAX4738 has four normally closed (NC) switches, and
the MAX4739 has two NO switches and two NC switches.
Applications Information
Digital Control Inputs
The MAX4737/MAX4738/MAX4739 logic inputs accept
up to +5.5V regardless of supply voltage. For example,
with a +3.3V supply, IN_ can be driven low to GND and
high to +5.5V allowing for mixing of logic levels in a
system. Driving the control logic inputs rail-to-rail mini-
mizes power consumption. For a +1.8V supply voltage,
the logic thresholds are 0.5V (low) and 1.4V (high); for
a +5V supply voltage, the logic thresholds are 0.8V
(low) and 2.0V (high).
Analog Signal Levels
Analog signals that range over the entire supply voltage
(V+ to GND) are passed with very little change in on-resis-
tance (see Typical Operating Characteristics). The switch-
es are bidirectional, so the NO_, NC_, and COM_ pins can
be either inputs or outputs.
Power-Supply Bypassing
Power-supply bypassing improves noise margin and
prevents switching noise from propagating from the V+
supply to other components. A 0.1µF capacitor connect-
ed from V+ to GND is adequate for most applications.
UCSP Applications Information
For the latest application details on UCSP construction,
dimensions, tape carrier information, PC board tech-
niques, bump-pad layout, and recommended reflow
temperature profile, as well as the latest information on
reliability testing results, refer to the Application Note:
UCSP—A Wafer-Level Chip-Scale Package on Maxim’s
web site at www.maxim-ic.com/ucsp.
connected.