TB62706BN/BF
2003-05-14
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TOSHIBA BiCMOS INTEGRATED CIRCUIT SILICON MONOLITHIC
TB62706BN,TB62706BF
16BIT SHIFT REGISTER, LATCHES & CONSTANT CURRENT DRIVERS
The TB62706BN, TB62706BF is specifically designed for LED
and LED DISPLAY constant current drivers.
This constant current output circuits is able to set up external
resistor (IOUT = 5~90 mA). (Note)
This IC is monolithic integrated circuit designed to be used
together with BiCMOS process.
The devices consist of 16bit shift register, latch, ANDGATE and
Constant Current Drivers.
FEATURES
Constant Current Output : Can set up all output current
with one resister for 5 to 90
mA.
Maximum Clock Frequency : fCLK = 15 (MHz) (Cascade
Connected Operate, Topr =
25°C)
5 V CMOS Compatible Input
Package : SDIP24P300−1.78~1.778mmPitch~ (TB62706BN)
SSOP24P300−1.00B~1.0mmPitch~ (TB62706BF)
Constant Output Current Matchong:
OUTPUTGND
VOLTAGE
CURRENT
MATCHING
OUTPUT
CURRENT
0.4 V ±6.0% 5~40 mA
0.7 V ±6.0% 5~90 mA (Note)
Note: TB62706BF can be used under limited PD
(PD 1.04 W, with PCB)
TB62706BN
TB62706BF
Weight
SDIP24-P-300-1.78 : 1.22 g (typ.)
SSOP24-P-300-1.00B : 0.32 g (typ.)
TB62706BN/BF
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PIN CONNECTION (Top view)
BLOCK DIAGRAM
TIMING DIAGRAM
Note: Latches are level sensitive, not rising edges sensitive and not syncronus CLOCK.
Input of LATCHterminal to H Level, data passes latches, and input to L level, data hold latches.
Input of ENABLEterminal to H level, all output (OUT0~15) do off.
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TERMINAL DISCRIPTION
PIN No. PIN NAME FUNCTION
1 GND GND terminal for control logic.
2 SERIALIN Input terminal of a serialdata for shiftregister.
3 CLOCK Input terminal of a clock for data shift to upedge.
4 LATCH Input terminal of a data strobe. Latches passes data with “H” level input of
LATCH terminal, and hold data with "L" level input.
5~20 15~OUT0 Output terminals.
21 ENABLE Input terminal of output enable. All outputs (OUT0~15) do off with “H” level input of
ENABLE terminal, and do on with "L" level input.
22 SERIALOUT Output terminal of a serialdata for next SERIALIN terminal.
23 REXT Input terminal of connects with a resister for to set up all output current.
24 VDD 5 V Supply voltage terminal.
TRUTH TABLE
CLOCK LATCH ENABLE SERIALIN OUT0 ··· OUT7 ··· OUT15 SERIALOUT
UP H L Dn D
n ··· Dn7 ··· Dn15 D
n15
UP L L Dn+1 No change Dn14
UP H L Dn+2 D
n+2 ··· Dn5 ··· Dn13 D
n13
DOWN X L Dn+3 D
n+2 ··· Dn5 ··· Dn13 D
n13
DOWN X H Dn+3 Off Dn13
Note: 15~OUT0 = on in case of Dn = H level and 15~OUT0 = off in case of Dn = L level.
A resistor is connected with REXT and GND accompanied with outside, and it is necessary that a correct
power supply voltage is supplied.
EQUIVALENT CIRCUIT OF INPUTS AND OUTPUTS
1. ENABLE terminal 2. LATCH terminal
3. CLOCK, SERIALIN terminal 4. SERIALOUT terminal
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MAXIMUM RATINGS (Ta = 25°C)
CHARACTERISTIC SYMBOL RATING UNIT
Supply Voltage VDD 0~7.0 V
Input Voltage VIN 0.4~VDD + 0.4 V
Output Current IOUT 90 mA
Output Voltage VOUT 0.5~17.0 V
Clock Frequency fCK 15 MHz
GND Terminal Current IGND 1440 mA
1.78 (BNtype : ON PCB, Ta = 25°C )
Power Dissipation PD
1.00 (BFtype : ON PCB, Ta = 25°C )
W
BN : 70 (BNtype : ON PCB)
Tharmal Resistance Rth (ja)
BF : 120 (BFtype : ON PCB)
°C / W
Operating Temperature Topr 40~85 °C
Storage Temperature Tstg 55~150 °C
Note: BNtype : Ambient temperature delated above 25°C in the proportion of 14.2 mW / °C
BFtype : Ambient temperature delated above 25°C in the proportion of 8.3 mW / °C
RECOMMENDED OPERATING CONDITION (Ta = 40~85°C unless otherwise noted)
CHARACTERISTIC SYMBOL CONDITION MIN TYP. MAX UNIT
Supply Voltage VDD 4.5 5.0 5.5 V
Output Voltage VOUT 15.0 V
IO OUTn, DC 1 circuit 5 88
IOH SERIALOUT 1.0
Output Current
IOL SERIALOUT 1.0
mA
VIH 0.7
VDD VDD
+0.3
Input Voltage
VIL 0.3 0.3
VDD
V
LATCH Pulse Width tLATw 100 ns
CLOCK Pulse Width tw CLK 50 ns
ENABLE Pulse Width tENw 4500 ns
SetUp Time for DATA tsetup (D) 60 ns
Hold Time for DATA thold (D) 20 ns
SetUp Time for LATCH t
setup (L) 100 ns
Hold Time for LATCH t
hold (L)
VDD = 4.5~5.5 V
60 ns
Clock Frequency fCLK Cascade operation 10.0 MHz
Ta = 85°C (BNtype) 0.92
Power Dissipation PD
Ta = 85°C (BFtype) 0.50
W
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ELECTRICAL CHARACTERISTICS (VDD = 5.0 V, Ta = 25°C unless otherwise noted)
CHARACTERISTIC SYMBOL
TEST
CIR
CUIT
CONDITION MIN TYP. MAX UNIT
"H" Level VIH Ta = 40~85°C 0.7
VDD V
DD
Input Voltage
"L" Level VIL Ta = 40~85°C GND 0.3
VDD
V
Output Leakage Current IOH V
OH = 15.0 V 10 µA
VOL I
OL = 1.0 mA 0.4
Output Voltage SERIALOUT
VOH I
OH = 1.0 mA 4.6
V
IOL1 V
CE = 0.7 V 34.1 40.0 45.9
Output Current 1
IOL2 V
CE = 0.4 V
REXT = 470
(Include current
matching) 33.7 39.5 45.3
mA
Current Skew IOL1 IO = 40 mA,
VCE = 0.4 V REXT = 470 ±1.5 ±6.0 %
IOL3 V
CE = 1.0 V 64.2 75.5 86.8
Output Current 2
IOL4 V
CE = 0.7 V
REXT = 250
(Include current
matching) 63.8 75.0 86.2
mA
Current Skew IOL2 IO = 75 mA,
VCE = 0.7 V REXT = 250 ±1.5 ±6.0 %
Supply Voltage Regulation % / VDD REXT = 470 ,
Ta = 40~85°C 1.5 5.0 % / V
PullUp Resistor RIN (up) 150 300 600
PullDown Resistor RIN (down) 100 200 400
IDD (off) 1 REXT = OPEN,
15~OUT0 = off 0.6 1.2
IDD (off) 2 R
EXT = 470 , 15~OUT0 = off 3.5 5.8 8.0
"OFF"
IDD (off) 3 R
EXT = 250 , 15~OUT0 = off 6.5 10.7 15.0
IDD (on) 1 R
EXT = 470 , 15~OUT0 = on 10.0 16.0 22.0
Supply Current
"ON"
IDD (on) 2 R
EXT = 250 , 15~OUT0 = on 18.0 28.3 38.5
mA
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SWITCHING CHARACTERISTICS (Ta = 25°C unless otherwise noted)
CHARACTERISTIC SYMBOL
TEST
CIR
CUIT
CONDITION MIN TYP. MAX UNIT
CLKOUTn 1200 1500
OUTn LATCH 1200 1500
OUTn ENABLE 1200 1500
Propagation
Delay Time
(“L” to “H”)
CLKSOUT
tpLH
15 30 70
ns
CLKOUTn 700 1000
OUTn LATCH 700 1000
OUTn ENABLE 700 1000
Propagation
Delay Time
(“H” to “L”)
CLKSOUT
tpHL
15 30 70
ns
CLK tw CLK 20 30 ns
Pulse Width
LATCH tLATw 10 25 ns
LH tsetup (L) 25 50 ns
Setup Time
HL tsetup (C)
25 50 ns
LH thold (L) 0 15 ns
Hold Time
HL thold (C)
0 15 ns
Maximum CLOCK Rise Time tr 10 µs
Maximum CLOCK Fall Time tf 10 µs
Output Rise Time tor 150 300 600 ns
Output Fall Time tof
VDD = 5.0 V
VCE = 0.4 V
VIH = VDD
VIL = GND
REXT = 470
VL = 3.0 V
RL = 65
CL = 10.5 pF
150 300 600 ns
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TEST CIRCUIT
DC characteristic
AC characteristic
PRECAUTIONS for USING
Utmost care is necessary in the design of the output line, VCC (VDD) and GND line since IC may be destroyed
due to shortcircuit between outputs, air contamination fault, or fault by improper grounding.
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TIMING WAVEFORM
1. CLOCKSERIAL OUT, OUTn
2. CLOCKLATCH
3. ENABLE OUTn
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TB62706BN/BF
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LED DRIVER TB6270X SERIES APPICATION NOTE
Fig.1
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[1] Output current (IOUT)
IOUT is set by the enternal resistor (REXT) as shown in Fig.1.
[2] Total supply voltage (VLED)
This device can operate 0.4~0.7V (VO).
When a higher voltage is input to the device, the excess voltage is consumed inside the device, that leads to
power dissipation.
In order to minimize power dissipation and loss, we would like to recommend to set the total supply voltage as
shown below,
VLED (total supply voltage) = VCE (Tr Vsat) + Vf (LED Forward voltage) + VO (IC supply voltage)
When the total supply is too high considering the power dissipation of this device, an additional R can
decrease the supply voltage (VO).
[3] Pattern layout
This device owns only one ground pin that means signal ground pin and power ground pin are common.
If ground pattern layout contains large inductance and impedance, and the voltage between ground and
LATCH, CLOCK terminals exceeds 2.5 V by switching noise in operation, this device may missoperate. So we
would lile you to pay attention to pattern layout to minimize inductance.
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Package Dimensions
Weight: 1.22 g (typ.)
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Package Dimensions
Weight: 0.32 g (typ.)
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000707EB
A
RESTRICTIONS ON PRODUCT USE