1. Product profile
1.1 General description
A general purpose 500 W LDMOS RF power transistor for pulsed and continuous wave
applications in the HF/VHF band up to 500 MHz.
[1] Th is the heatsink temperature.
[2] tp = 2 ms; δ = 10 %.
1.2 Features
nTypical pulsed performance at 225 MHz, a drain-source voltage VDS of 32 V and a
quiescent drain current IDq = 2 ×1.0 A:
uLoad power PL = 500 W
uPower gain Gp=19dB
uDrain efficiency ηD=55%
nAdvanced flange material for optimum thermal behavior and reliability
nExcellent ruggedness
nHigh power gain
nDesigned for broadband operation (HF/VHF band)
nSource on underside eliminates DC isolators, reducing common-mode inductance
nEasy power control
nIntegrated ESD protection
nCompliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS), using exemption No. 7 of the annex
BLF369
Multi-use VHF power LDMOS transistor
Rev. 04 — 19 February 2009 Product data sheet
Table 1. Typical performance
Typical RF performance at V
DS
= 32 V and T
h
=25
°
C in a common-source 225 MHz test circuit.
[1]
Mode of operation f PLPL(PEP) GpηDIMD3
(MHz) (W) (W) (dB) (%) (dBc)
CW, class AB 225 500 - 18 60 -
2-tone, class AB f1 = 225; f2= 225.1 - 500 19 47 28
pulsed, class AB [2] 225 500 - 19 55 -
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
BLF369_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 19 February 2009 2 of 17
NXP Semiconductors BLF369
Multi-use VHF power LDMOS transistor
1.3 Applications
nPulsed applications up to 500 MHz
nCommunication transmitter applications in the HF/VHF/UHF band under specific
conditions
nIndustrial applications up to 500 MHz under special conditions
2. Pinning information
[1] Connected to flange.
3. Ordering information
4. Limiting values
Table 2. Pinning
Pin Description Simplified outline Graphic symbol
1 drain1
2 drain2
3 gate1
4 gate2
5 source [1]
5
12
43 4
35
1
2
sym117
Table 3. Ordering information
Type number Package
Name Description Version
BLF369 - flanged LDMOST ceramic package; 2 mounting holes;
4 leads SOT800-2
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS drain-source voltage - 65 V
VGS gate-source voltage 0.5 +13 V
Tstg storage temperature 65 +150 °C
Tjjunction temperature - 200 °C
BLF369_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 19 February 2009 3 of 17
NXP Semiconductors BLF369
Multi-use VHF power LDMOS transistor
5. Thermal characteristics
[1] Tj is the junction temperature.
[2] Rth(j-case) and Rth(j-h) are measured under RF conditions.
[3] Rth(j-h) is dependent on the applied thermal compound and clamping/mounting of the device.
[4] See Figure 1.
Table 5. Thermal characteristics
Symbol Parameter Conditions Typ Unit
Rth(j-case) thermal resistance from
junction to case Tj= 200 °C[1][2] 0.26 K/W
Rth(j-h) thermal resistance from
junction to heatsink Tj= 200 °C[1][2][3] 0.35 K/W
Zth(j-h) transient thermal impedance
from junction to heatsink Tj= 200 °C
tp= 100 µs; δ=10% [4] 0.063 K/W
tp= 1 ms; δ=10% [4] 0.117 K/W
tp= 2 ms; δ=10% [4] 0.133 K/W
tp= 3 ms; δ=10% [4] 0.142 K/W
tp= 1 ms; δ=20% [4] 0.140 K/W
(1) δ = 1 %
(2) δ = 2 %
(3) δ = 5 %
(4) δ = 10 %
(5) δ = 20 %
(6) δ = 50 %
(7) δ = 100 % (DC)
Fig 1. Transient thermal impedance from junction to heatsink as function of pulse duration
001aah494
0.2
0.1
0.3
0.4
Zth(j-h)
(K/W)
0
107101
104
1061103tp (s)
10510102
(7)
(6)
(5)
(4)
(3)
(2)
(1)
BLF369_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 19 February 2009 4 of 17
NXP Semiconductors BLF369
Multi-use VHF power LDMOS transistor
6. Characteristics
[1] ID is the drain current.
[2] Ciss and Coss include reverse transfer capacitance (Crss).
Table 6. Characteristics
T
j
=25
°
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
V(BR)DSS drain-source breakdown voltage VGS =0V; I
D=6mA [1] 65 - - V
VGS(th) gate-source threshold voltage VDS = 20 V; ID= 600 mA [1] 4 - 5.5 V
IDSS drain leakage current VGS =0V; V
DS =32V - - 4.2 µA
IDSX drain cut-off current VGS =V
GS(th) + 9 V; VDS = 10 V - 100 - A
IGSS gate leakage current VGS =20V; V
DS =0V - - 60 nA
gfs forward transconductance VGS =20V; I
D=13A [1] -15-S
RDS(on) drain-source on-state resistance VGS =V
GS(th) + 9 V; ID=13A [1] -40-m
Ciss input capacitance VGS = 0 V; VDS =32V; f=1MHz [2] - 400 - pF
Coss output capacitance VGS = 0 V; VDS =32V; f=1MHz [2] - 230 - pF
Crss reverse transfer capacitance VGS = 0 V; VDS = 32 V; f = 1 MHz - 15 - pF
VGS = 0 V; f = 1 MHz.
Fig 2. Output capacitance as a function of drain-source voltage; typical values per
section
VDS (V)
0504020 3010
001aae484
200
400
600
Coss
(pF)
0
BLF369_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 19 February 2009 5 of 17
NXP Semiconductors BLF369
Multi-use VHF power LDMOS transistor
7. Application information
[1] tp = 2 ms; δ = 10 %.
7.1 CW
Table 7. RF performance in a common-source 225 MHz test circuit
T
h
=25
°
C unless otherwise specified.
Mode of operation f VDS IDq PLPL(PEP) GpηDIMD3 Gp
(MHz) (V) (A) (W) (W) (dB) (%) (dBc) (dB)
CW, class AB 225 32 2 × 1.0 500 - > 17 > 55 - -
2-tone, class AB f1= 225; f2= 225.1 32 2 × 1.0 - 500 > 18 > 43 < 24 1
pulsed, class AB [1] 225 - - 500 - > 18 > 50 - -
Fig 3. CW power gain and drain efficiency as a function of output power; typical values
PL (W)
0 500400200 300100
001aae501
18
20
22
GP
(dB)
16
30
50
70
ηD
(%)
10
GP
ηD
BLF369_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 19 February 2009 6 of 17
NXP Semiconductors BLF369
Multi-use VHF power LDMOS transistor
7.2 2-Tone
7.3 Pulsed
VDS = 32 V; f1 = 225 MHz; f2 = 225.1 MHz;
IDq =2×1.0 A; Th = 25 °C. VDS = 32 V; f1 = 225 MHz; f2 = 225.1 MHz;
IDq =2×1.0 A; Th = 25 °C.
Fig 4. 2-Tone power gain and drain efficiency as a
function of peak envelope power; typical
values
Fig 5. 2-Tone third order intermodulation distortion
as a function of peak envelope power; typical
values
PL(PEP) (W)
0 600400200
001aae502
18
20
22
GP
(dB)
16
20
40
60
ηD
(%)
0
GP
ηD
PL(PEP) (W)
0 600400200
001aae503
40
20
0
IMD3
(dBc)
60
f = 225 MHz; VDS = 32 V; IDq =2× 1 A; tp= 2 ms;
δ= 10 %. f = 225 MHz; VDS = 32 V; IDq =2× 1 A; tp= 2 ms;
δ= 10 %.
Fig 6. Pulsed power gain as function of load power;
typical values Fig 7. Pulsed drain efficiency as function of
load power; typical values
001aah498
PL (W)
0 800600200 400
17
18
16
19
20
Gp
(dB)
15
001aah499
PL (W)
0 800600200 400
30
50
70
ηD
(%)
10
BLF369_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 19 February 2009 7 of 17
NXP Semiconductors BLF369
Multi-use VHF power LDMOS transistor
7.4 Maximum heatsink temperature
The heatsink temperature is defined 1 mm below the surface of the heatsink at the center
of the flange.
The maximum allowable heatsink temperature is given in the following graphs at several
pulsed conditions as well as for CW.
f = 225 MHz; VDS = 32 V; IDq =2× 1 A; tp= 100 µs;
δ= 10 %. f = 225 MHz; VDS = 32 V; IDq =2× 1 A; tp= 100 µs;
δ= 10 %.
Fig 8. Pulsed power gain as function of load power;
typical values Fig 9. Pulsed drain efficiency as function of
load power; typical values
PL (W)
0 800600200 400
001aah500
17
19
21
Gp
(dB)
15
PL (W)
0 800600200 400
001aah501
30
50
70
ηD
(%)
10
BLF369_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 19 February 2009 8 of 17
NXP Semiconductors BLF369
Multi-use VHF power LDMOS transistor
7.5 Ruggedness in class-AB operation
The BLF369 is capable of withstanding a load mismatch corresponding to VSWR = 10 : 1
through all phases under the following conditions: 2-tone signal; VDS =32V;f=225MHz
at rated load power (PL(PEP) = 500 W).
δ= 10 %.
(1) tp 2 ms
(2) tp = 10 ms
(3) tp = 20 ms
(4) tp = 50 ms
(5) tp = 100 ms
δ= 20 %.
(1) tp 2 ms
(2) tp = 10 ms
(3) tp = 20 ms
(4) tp = 50 ms
(5) tp = 100 ms
Fig 10. Heatsink temperature as function of power
dissipation at a duty cycle of 10 % Fig 11. Heatsink temperature as function of power
dissipation at a duty cycle of 20 %
001aah502
P (W)
0 1000800400 600200
40
60
20
80
100
Th
(°C)
0
(1)
(2)
(3)
(4)
(5)
001aah503
P (W)
0 1000800400 600200
40
60
20
80
100
Th
(°C)
0
(4)
(1)
(2)
(3)
(5)
Fig 12. CW heatsink temperature as function of power dissipation
001aah504
P (W)
100 700500300
40
60
20
80
100
Th
(°C)
0
BLF369_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 19 February 2009 9 of 17
NXP Semiconductors BLF369
Multi-use VHF power LDMOS transistor
7.6 Reliability
8. Test information
TTF (0.1 % failure fraction); best estimate values.
The reliability at pulsed conditions can be calculated as follows: TTF (0.1 %) × 1 / δ.
(1) Tj = 100 °C
(2) Tj = 110 °C
(3) Tj = 120 °C
(4) Tj = 130 °C
(5) Tj = 140 °C
(6) Tj = 150 °C
(7) Tj = 160 °C
(8) Tj = 170 °C
(9) Tj = 180 °C
(10) Tj = 190 °C
(11) Tj = 200 °C
Fig 13. BLF369 electromigration (ID, total device)
001aae504
Idc (A)
0 302412 186
103
10
102
105
104
106
Years
1
(11)(10)(9)(8)(7)
(6)(5)(4)(3)(2)(1)
Table 8. List of components
For test circuit, see Figure 14,Figure 15 and Figure 16.
Component Description Value Remarks
B1 semi rigid coax 25 ; 120 mm EZ90-25-TP
B2 semi rigid coax 25 ; 56 mm EZ90-25-TP
C1 multilayer ceramic chip capacitor 91 pF [1]
C2, C3 multilayer ceramic chip capacitor 56 pF [1]
C4, C7 multilayer ceramic chip capacitor 100 pF [1]
C5, C8 ceramic capacitor 15 nF
C6, C9 electrolytic capacitor 220 µF
C10, C11, C13, C14 multilayer ceramic chip capacitor 220 pF [1]
C12, C15 ceramic capacitor 15 nF [1]
BLF369_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 19 February 2009 10 of 17
NXP Semiconductors BLF369
Multi-use VHF power LDMOS transistor
[1] American technical ceramics type 100B or capacitor of same quality.
[2] Printed-Circuit Board (PCB): Rogers 5880; εr = 2.2 F/m; height = 0.79 mm; Cu (top/bottom metallization);
thickness copper plating = 35 µm.
C20 multilayer ceramic chip capacitor 100 pF [1]
C21 multilayer ceramic chip capacitor 20 pF [1]
C22, C25 multilayer ceramic chip capacitor 100 pF [1]
C23, C26 ceramic capacitor 15 nF
C24, C27 electrolytic capacitor 10 µF
C28, C31 multilayer ceramic chip capacitor 100 pF [1]
C29, C32 multilayer ceramic chip capacitor 220 pF
C30, C33 ceramic capacitor 15 nF
L1, L3 stripline - [2] (W × L) 12 mm × 15 mm
L2, L4 air coil - 4 windings; D = 8 mm; d = 1 mm
L5, L6 stripline - [2] (W × L) 14 mm × 15 mm
R1, R2, R3, R4 resistor 0.25 W; 4
R5, R6, R8, R9 resistor 0.25 W; 10
R7, R10 potentiometer 10 k
R11, R12 resistor 0.25 W; 1
T1, T2 semi rigid coax 25 ; 68 mm EZ90-25-TP
T3, T4 semi rigid coax 25 ; 60 mm EZ90-25-TP
Table 8. List of components
…continued
For test circuit, see Figure 14,Figure 15 and Figure 16.
Component Description Value Remarks
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx
xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x
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xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
BLF369_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 19 February 2009 11 of 17
NXP Semiconductors BLF369
Multi-use VHF power LDMOS transistor
Fig 14. Class-AB common-source 225 MHz test circuit; VD1(test), VD2(test), VG1(test) and VG2(test) are drain and gate test voltages
001aae535
50
50
C7
C32
+ VD2(test)
+ VG2(test)
L4
R9R8
R10
C8
C9
C27
C26
C25
+ VG1(test)
R6R5
R7
C24
C22
C23
C6
+ VD1(test)
L2
L1L5
L6 L3
C1 C3
C20
C21
C5
C4
C12
C10 C11 R2R1
C2
C15
C13 C14 R4R3
C31
B2 B1
T3
T4
T1
T2
C28
C29R11
R12
C30
C33
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx
xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
BLF369_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 19 February 2009 12 of 17
NXP Semiconductors BLF369
Multi-use VHF power LDMOS transistor
Fig 15. Printed-Circuit Board (PCB) for class-AB 225 MHz test circuit
001aae536
95 mm
80 mm
95 mm
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx
xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
BLF369_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 19 February 2009 13 of 17
NXP Semiconductors BLF369
Multi-use VHF power LDMOS transistor
C1 mounted on top of transformers T1 and T2; C20 mounted on top of transformers T3 and T4.
Fig 16. Component layout for class-AB 225 MHz test circuit
001aae537
C24
C30
C29
C32
C31
B2
C28
R11
R12
C33
+ VD1(test)
+ VG1(test)
+ VG2(test)
+ VD2(test)
T3
T4
C20 C21
L6
R8 R9
C25
C26
R10C27
L5
C23 C22
C4 C5
L2 R1 C12
C6
R2
C10
C11 C2
B1
C3
C14
C15
C9
C8
C7
C13
T2
L4 R3 R4
T1
L1
C1
L3
R6R5
R7
BLF 369
+
+
+
+
BLF369_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 19 February 2009 14 of 17
NXP Semiconductors BLF369
Multi-use VHF power LDMOS transistor
9. Package outline
Fig 17. Package outline SOT800-2
SOT800-2
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
SOT800-2 05-06-02
05-06-07
Flanged LDMOST ceramic package; 2 mounting holes; 4 leads
0 5 10 mm
scale
mm 0.050.25 0.2538.512.7
10.55
10.45 0.15
0.10 30.5
29.9 15.3
15.1 22.8
21.8 15.4
15.0
6.3
5.9 2.26
2.00 44.5
44.2
3.56
3.49 3.1
2.8
14.6
14.4
31.1
30.9 3.7
3.3
inches 0.0020.01 0.011.516
UNIT A Dbc eU2yq w2
w1
FU1
pQEE1
D1HL
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
y
D
F
A
D1
Q
c
E
E1
0.5
0.415
0.411 0.006
0.004 1.201
1.177 1.224
1.216 0.602
0.594 0.898
0.858 0.606
0.591
0.248
0.232 0.089
0.079 1.752
1.740
0.140
0.137 0.122
0.110
0.575
0.567 0.146
0.130
B
b
q
e
H
L
U2P
w1 A
M M BM
w2 C
M M
U1
12
5
34
C
A
BLF369_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 19 February 2009 15 of 17
NXP Semiconductors BLF369
Multi-use VHF power LDMOS transistor
10. Abbreviations
11. Revision history
Table 9. Abbreviations
Acronym Description
CW Continuous Wave
DC Direct Current
GSM Global System for Mobile communications
HF High Frequency
LDMOS Laterally Diffused Metal-Oxide Semiconductor
LDMOST Laterally Diffused Metal-Oxide Semiconductor Transistor
PEP Peak Envelope Power
RF Radio Frequency
TTF Time To Failure
UHF Ultra High Frequency
VHF Very High Frequency
VSWR Voltage Standing-Wave Ratio
Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
BLF369_4 20090219 Product data sheet - BLF369_3
Modifications: Data sheet status updated from 'Preliminary data sheet' to 'Product data sheet'
BLF369_3 20080129 Preliminary data sheet - BLF369_2
BLF369_2 20061208 Objective data sheet - BLF369_1
BLF369_1 20060413 Objective data sheet - -
BLF369_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 19 February 2009 16 of 17
NXP Semiconductors BLF369
Multi-use VHF power LDMOS transistor
12. Legal information
12.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
12.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
12.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
12.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
13. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
NXP Semiconductors BLF369
Multi-use VHF power LDMOS transistor
© NXP B.V. 2009. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 19 February 2009
Document identifier: BLF369_4
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
14. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description. . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Thermal characteristics. . . . . . . . . . . . . . . . . . . 3
6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Application information. . . . . . . . . . . . . . . . . . . 5
7.1 CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
7.2 2-Tone. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
7.3 Pulsed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
7.4 Maximum heatsink temperature . . . . . . . . . . . . 7
7.5 Ruggedness in class-AB operation. . . . . . . . . . 8
7.6 Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
8 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 9
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14
10 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 15
11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 15
12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16
12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16
12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
13 Contact information. . . . . . . . . . . . . . . . . . . . . 16
14 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17