Sample & Buy Product Folder Support & Community Tools & Software Technical Documents OPA1611, OPA1612 SBOS450C - JULY 2009 - REVISED AUGUST 2014 OPA161x SoundPlusTM High-Performance, Bipolar-Input Audio Operational Amplifiers 1 Features 3 Description * * * The OPA1611 (single) and OPA1612 (dual) bipolarinput operational amplifiers achieve very low 1.1-nV/Hz noise density with an ultralow distortion of 0.000015% at 1 kHz. The OPA1611 and OPA1612 offer rail-to-rail output swing to within 600 mV with a 2-k load, which increases headroom and maximizes dynamic range. These devices also have a high output drive capability of 30 mA. 1 * * * * * * * * Superior Sound Quality Ultralow Noise: 1.1 nV/Hz at 1 kHz Ultralow Distortion: 0.000015% at 1 kHz High Slew Rate: 27 V/s Wide Bandwidth: 40 MHz (G = +1) High Open-Loop Gain: 130 dB Unity Gain Stable Low Quiescent Current: 3.6 mA per Channel Rail-to-Rail Output Wide Supply Range: 2.25 V to 18 V Single and Dual Versions Available These devices operate over a very wide supply range of 2.25 V to 18 V, on only 3.6 mA of supply current per channel. The OPA1611 and OPA1612 op amps are unity-gain stable and provide excellent dynamic behavior over a wide range of load conditions. The dual version features completely independent circuitry for lowest crosstalk and freedom from interactions between channels, even when overdriven or overloaded. 2 Applications * * * * * * Both the OPA1611 and OPA1612 are available in SOIC-8 packages and the OPA1612 is available in SON-8. These devices are specified from -40C to +85C. Professional Audio Equipment Microphone Preamplifiers Analog and Digital Mixing Consoles Broadcast Studio Equipment Audio Test And Measurement High-End A/V Receivers Device Information(1) PART NUMBER OPA1611 OPA1612 PACKAGE BODY SIZE (NOM) SOIC (8) 4.90 mm x 3.91 mm SOIC (8) 4.90 mm x 3.91 mm SON (8) 3.00 mm x 3.00 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. space space THD+N Ratio vs Output Amplitude Total Harmonic Distortion + Noise (%) -80 1kHz Signal BW = 80kHz RSOURCE = 0W -100 0.001 0.0001 0.00001 0.000001 0.01 -120 G = +1, RL = 600W G = +1, RL = 2kW G = -1, RL = 600W G = -1, RL = 2kW G = +10, RL = 600W G = +10, RL = 2kW 0.1 -140 -160 1 10 Functional Block Diagram V+ Total Harmonic Distortion + Noise (dB) 0.01 Pre-Output Driver OUT IN- IN+ 20 Output Amplitude (VRMS) V- 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. OPA1611, OPA1612 SBOS450C - JULY 2009 - REVISED AUGUST 2014 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 6.1 6.2 6.3 6.4 6.5 7 1 1 1 2 3 4 Absolute Maximum Ratings ...................................... 4 Handling Ratings....................................................... 4 Recommended Operating Conditions....................... 4 Electrical Characteristics: VS = 2.25 V to 18 V .... 5 Typical Characteristics .............................................. 7 Detailed Description ............................................ 12 7.1 Overview ................................................................. 12 7.2 Functional Block Diagram ....................................... 12 7.3 Feature Description................................................. 12 8 Application and Implementation ........................ 15 8.1 8.2 8.3 8.4 8.5 Application Information............................................ Noise Performance ................................................. Total Harmonic Distortion Measurements............... Capacitive Loads..................................................... Application Circuit ................................................... 15 15 17 17 18 9 Power-Supply Recommendations...................... 19 10 Layout................................................................... 20 10.1 Layout Guidelines ................................................. 20 10.2 Layout Example .................................................... 20 11 Device and Documentation Support ................. 21 11.1 11.2 11.3 11.4 11.5 Documentation Support ........................................ Related Links ........................................................ Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 21 21 21 21 21 12 Mechanical, Packaging, and Orderable Information ........................................................... 21 4 Revision History Changes from Revision B (July 2011) to Revision C Page * Changed format to meet latest data sheet standards; added new sections, and moved existing sections........................... 1 * Added SON-8 (DRG) package to data sheet ......................................................................................................................... 1 * Changed SO to SOIC throughout document to match industry standard term...................................................................... 1 * Added front-page curve .......................................................................................................................................................... 1 * Added title to block diagram ................................................................................................................................................... 1 * Deleted Package Information table; see package option addendum..................................................................................... 3 Changes from Revision A (August 2009) to Revision B Page * Revised Features list items .................................................................................................................................................... 1 * Updated front-page figure....................................................................................................................................................... 1 * Added max specification for input voltage noise density at f = 1kHz .................................................................................... 5 * Corrected typo in footnote 1 for Electrical Characteristics ..................................................................................................... 5 * Revised Figure 4 .................................................................................................................................................................... 7 * Updated Figure 7.................................................................................................................................................................... 7 * Changed Figure 9 .................................................................................................................................................................. 7 * Revised Figure 11 .................................................................................................................................................................. 7 * Corrected typo in Figure 15 .................................................................................................................................................... 8 * Updated Figure 29................................................................................................................................................................ 12 * Revised fourth paragraph of Electrincal Overstress section ................................................................................................ 13 * Revised table in Figure 34.................................................................................................................................................... 17 2 Submit Documentation Feedback Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 OPA1611, OPA1612 www.ti.com SBOS450C - JULY 2009 - REVISED AUGUST 2014 5 Pin Configuration and Functions D Package OPA1611, SOIC-8 (Top View) NC (1) D Package OPA1612, SOIC-8 (Top View) (1) 1 8 NC -IN 2 7 V+ +IN 3 6 OUT V- 4 5 NC OUT A -IN A 1 A 2 +IN A 3 V- 4 B 8 V+ 7 OUT B 6 -IN B 5 +IN B (1) DRG Package OPA1612, SON-8 (Top View) 8 V+ OUT A 1 -IN A 2 7 OUT B A +IN A 3 B 5 +IN B V- 4 Pad 6 -IN B (2) (1) NC denotes no internal connection. Pin can be left floating or connected to any voltage between (V-) and (V+). (2) Exposed thermal die pad on underside; connect thermal die pad to V-. Soldering the thermal pad improves heat dissipation and provides specified performance. Pin Functions PIN NAME -IN NO. I/O DESCRIPTION -- I Inverting input D (OPA1611) D (OPA1612) DRG (OPA1612) 2 -- +IN 3 -- -- I Noninverting input -IN A -- 2 2 I Inverting input, channel A +IN A -- 3 3 I Noninverting input, channel A -IN B -- 6 6 I Inverting input, channel B +IN B -- 5 5 I Noninverting input, channel B NC 1, 5, 8 -- -- -- No internal connection OUT 6 -- -- O Output OUT A -- 1 1 O Output, channel A OUT B -- 7 7 O Output, channel B V- 4 4 4 -- Negative (lowest) power supply V+ 7 8 8 -- Positive (highest) power supply Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 Submit Documentation Feedback 3 OPA1611, OPA1612 SBOS450C - JULY 2009 - REVISED AUGUST 2014 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN Supply voltage VS = (V+) - (V-) Input voltage (V-) - 0.5 Input current (all pins except power-supply pins) Output short-circuit (2) (TA) Junction temperature (TJ) (2) UNIT 40 V (V+) + 0.5 V 10 mA Continuous Operating temperature (1) MAX -55 +125 C 200 C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Short-circuit to VS / 2 (ground in symmetrical dual supply setups), one amplifier per package. 6.2 Handling Ratings Tstg V(ESD) (1) (2) MIN MAX UNIT -65 +150 C Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) -3000 3000 Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) -1000 1000 Machine model (MM) -200 200 Storage temperature range Electrostatic discharge V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN Supply voltage (V+ - V-) Specified temperature 4 Submit Documentation Feedback NOM MAX UNIT 4.5 (2.25) 36 (18) V -40 +85 C Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 OPA1611, OPA1612 www.ti.com 6.4 SBOS450C - JULY 2009 - REVISED AUGUST 2014 Electrical Characteristics: VS = 2.25 V to 18 V At TA = +25C and RL = 2 k, unless otherwise noted. VCM = VOUT = midsupply, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT AUDIO PERFORMANCE THD+N IMD Total harmonic distortion + noise Intermodulation distortion 0.000015% G = +1, f = 1 kHz, VO = 3 VRMS -136 SMPTE/DIN two-tone, 4:1 (60 Hz and 7 kHz), G = +1, VO = 3 VRMS 0.000015% DIM 30 (3-kHz square wave and 15-kHz sine wave), G = +1, VO = 3 VRMS 0.000012% CCIF twin-tone (19 kHz and 20 kHz), G = +1, VO = 3 VRMS 0.000008% dB -136 dB -138 dB -142 dB FREQUENCY RESPONSE G = 100 80 MHz G=1 40 MHz Slew rate G = -1 27 V/s Full-power bandwidth (1) VO = 1 VPP 4 MHz Overload recovery time G = -10 500 ns Channel separation (dual) f = 1 kHz -130 dB Input voltage noise f = 20 Hz to 20 kHz GBW Gain-bandwidth product SR NOISE Input voltage noise density (2) en In Input current noise density VPP 1.2 f = 10 Hz 2 nV/Hz f = 100 Hz 1.5 f = 1 kHz 1.1 nV/Hz f = 10 Hz 3 pA/Hz f = 1 kHz 1.7 pA/Hz 1.5 nV/Hz OFFSET VOLTAGE VOS Input offset voltage VS = 15 V dVOS/dT VOS over temperature (2) TA = -40C to +85C PSRR Power-supply rejection ratio V 100 500 1 4 V/C VS = 2.25 V to 18 V 0.1 1 V/V VCM = 0 V 60 250 nA VCM = 0 V, DRG package only 60 300 nA 350 nA 25 175 nA INPUT BIAS CURRENT IB Input bias current IB over temperature IOS (2) Input offset current TA = -40C to +85C VCM = 0 V INPUT VOLTAGE RANGE VCM Common-mode voltage range CMRR Common-mode rejection ratio (V-) + 2 (V-) + 2 V VCM (V+) - 2 V 110 (V+) - 2 V 120 dB INPUT IMPEDANCE (1) (2) Differential 20k || 8 || pF Common-mode 109 || 2 || pF Full-power bandwidth = SR / (2 x VP), where SR = slew rate. Specified by design and characterization. Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 Submit Documentation Feedback 5 OPA1611, OPA1612 SBOS450C - JULY 2009 - REVISED AUGUST 2014 www.ti.com Electrical Characteristics: VS = 2.25 V to 18 V (continued) At TA = +25C and RL = 2 k, unless otherwise noted. VCM = VOUT = midsupply, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT (V-) + 0.2 V VO (V+) - 0.2 V, RL = 10 k 114 130 dB (V-) + 0.6 V VO (V+) - 0.6 V, RL = 2 k 110 114 dB OPEN-LOOP GAIN AOL Open-loop voltage gain OUTPUT RL = 10 k, AOL 114 dB (V-) + 0.2 (V+) - 0.2 RL = 2 k, AOL 110 dB (V-) + 0.6 (V+) - 0.6 V VOUT Voltage output IOUT Output current See Figure 27 mA ZO Open-loop output impedance See Figure 28 ISC Short-circuit current CLOAD Capacitive load drive V +55 mA -62 mA See Typical Characteristics pF POWER SUPPLY VS Specified voltage IQ Quiescent current (per channel) IOUT = 0 A 2.25 IQ over Temperature (3) TA = -40C to +85C 3.6 18 V 4.5 mA 5.5 mA C TEMPERATURE RANGE JA (3) 6 Specified range -40 +85 Operating range -55 +125 Thermal resistance, SOIC-8 150 C C/W Specified by design and characterization. Submit Documentation Feedback Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 OPA1611, OPA1612 www.ti.com SBOS450C - JULY 2009 - REVISED AUGUST 2014 6.5 Typical Characteristics At TA = +25C, VS = 15 V, and RL = 2 k, unless otherwise noted. 20nV/div Voltage Noise Density (nV/OHz) Current Noise Density (pA/OHz) 100 Voltage Noise Density 10 Current Noise Density 1 0.1 1 10 100 1k 10k 100k Time (1s/div) Frequency (Hz) Figure 2. 0.1-Hz to 10-Hz Noise 30 10k Maximum output voltage range without slew-rate induced distortion VS = 15V 25 EO 1k Output Voltage (VPP) Voltage Noise Spectral Density, EO (nV/?Hz) Figure 1. Input Voltage Noise Density and Input Current Noise Density vs Frequency Total Output Voltage Noise RS 100 Resistor Noise 10 20 15 VS = 5V 10 VS = 2.25V 5 2 EO = 1 100 1k 10k 2 2 en + (in RS) + 4kTRS 100k 0 10k 1M 100k 140 180 25 120 160 20 140 15 Gain (dB) 120 60 100 40 80 60 Phase Phase (degrees) 80 -5 -10 -15 -20 20 -20 100 1k 10k 100k 1M 10M G = +1 0 40 0 100M G = -1 5 0 -40 G = +10 10 Gain (dB) Gain 20 10M Figure 4. Maximum Output Voltage vs Frequency Figure 3. Voltage Noise vs Source Resistance 100 1M Frequency (Hz) Source Resistance, RS (W) -25 100k 1M Frequency (Hz) 10M 100M Frequency (Hz) Figure 5. Gain and Phase vs Frequency Figure 6. Closed-Loop Gain vs Frequency Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 Submit Documentation Feedback 7 OPA1611, OPA1612 SBOS450C - JULY 2009 - REVISED AUGUST 2014 www.ti.com Typical Characteristics (continued) At TA = +25C, VS = 15 V, and RL = 2 k, unless otherwise noted. VOUT = 3VRMS BW = 80kHz 0.00001 10 100 1k 0.01 Total Harmonic Distortion + Noise (%) Total Harmonic Distortion + Noise (%) G = -1, RL = 2kW G = +10, RL = 600W G = +10, RL = 2kW -140 RSOURCE OPA1611 -15V 0.001 RL RSOURCE = 600W 0.0001 RSOURCE = 150W 100 1k Frequency (Hz) 0.01 Total Harmonic Distortion + Noise (%) Total Harmonic Distortion + Noise (%) VOUT = 3VRMS BW > 500kHz -140 100k 10k RSOURCE OPA1611 -15V 0.001 -120 0.0001 10 100 -140 -160 1 10 20 Intermodulation Distortion (%) Total Harmonic Distortion + Noise (%) -120 0.01 -80 SMPTE/DIN Two-Tone 4:1 (60Hz and 7kHz) 0.001 -100 DIM30 (3kHz square wave and 15kHz sine wave) 0.0001 -120 -140 0.00001 CCIF Twin-Tone (19kHz and 20kHz) -160 0.000001 0.1 1 10 20 Output Amplitude (VRMS) Figure 11. THD+N Ratio vs Output Amplitude Submit Documentation Feedback -140 100k 10k G = +1 Output Amplitude (VRMS) 8 1k Intermodulation Distortion (dB) -100 Total Harmonic Distortion + Noise (dB) -80 G = +1, RL = 600W G = +1, RL = 2kW G = -1, RL = 600W G = -1, RL = 2kW G = +10, RL = 600W G = +10, RL = 2kW 0.1 RSOURCE = 150W RSOURCE = 0W 0.00001 Figure 10. THD+N Ratio vs Frequency 0.001 0.000001 0.01 -100 RSOURCE = 600W Frequency (Hz) 1kHz Signal BW = 80kHz RSOURCE = 0W 0.00001 RL RSOURCE = 300W Figure 9. THD+N Ratio vs Frequency 0.0001 -80 VOUT = 3VRMS BW > 500kHz +15V Frequency (Hz) 0.01 20k Total Harmonic Distortion + Noise (dB) -120 0.0001 Total Harmonic Distortion + Noise (dB) -100 G = -1, RL = 2kW G = +11, RL = 600W G = +11, RL = 2kW 1k 10k Figure 8. THD+N Ratio vs Frequency 0.001 100 -120 -140 20 Figure 7. THD+N Ratio vs Frequency 10 RSOURCE = 300W 0.00001 10k 20k 0.00001 -100 RSOURCE = 0W Frequency (Hz) G = +1, RL = 600W G = +1, RL = 2kW G = -1, RL = 600W -80 VOUT = 3VRMS BW = 80kHz +15V Total Harmonic Distortion + Noise (dB) -120 G = +1, RL = 600W G = +1, RL = 2kW G = -1, RL = 600W Total Harmonic Distortion + Noise (dB) 0.0001 Figure 12. Intermodulation Distortion vs Output Amplitude Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 OPA1611, OPA1612 www.ti.com SBOS450C - JULY 2009 - REVISED AUGUST 2014 Typical Characteristics (continued) At TA = +25C, VS = 15 V, and RL = 2 k, unless otherwise noted. -100 160 VS = 15V VOUT = 3.5VRMS G = +1 RL = 600W -110 -120 -130 -140 RL = 2kW -150 -160 RL = 5kW -170 Power-Supply Rejection Ratio (dB) Channel Separation (dB) -90 Common-Mode Rejection Ratio (dB) -80 140 -PSRR 120 +PSRR 100 CMRR 80 60 40 20 -180 0 100 10 1k 10k 100k 1 10 100 1k Frequency (Hz) 10k 100k Figure 13. Channel Separation vs Frequency 100M G = -1 CL = 50pF CF 20mV/div 20mV/div 10M Figure 14. CMRR and PSRR vs Frequency (Referred to Input) G = +1 CL = 50pF +15V OPA1611 -15V 1M Frequency (Hz) RI = 2kW RF = 5.6pF = 2kW +15V RL CL OPA1611 CL -15V Time (0.1ms/div) Time (0.1ms/div) Figure 15. Small-Signal Step Response (100 mV) Figure 16. Small-Signal Step Response (100 mV) G = +1 CL = 50pF RL = 2kW G = -1 CL = 50pF RL = 2kW RF = 75W 2V/div 2V/div RF = 0W See Applications Information, Input Protection section Time (0.5ms/div) Time (0.5ms/div) Figure 17. Large-Signal Step Response Figure 18. Large-Signal Step Response Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 Submit Documentation Feedback 9 OPA1611, OPA1612 SBOS450C - JULY 2009 - REVISED AUGUST 2014 www.ti.com Typical Characteristics (continued) At TA = +25C, VS = 15 V, and RL = 2 k, unless otherwise noted. 25 50 CF = 5.6pF RS = 0W RS 40 RS = 25W RL -15V RS = 25W 30 CL 20 RS = 50W 10 0 RS 15 CL -15V 10 RS = 50W G = -1 0 100 200 300 400 500 +15V OPA1611 5 G = +1 0 RF = 2kW RI = 2kW 20 OPA1611 Overshoot (%) Overshoot (%) RS = 0W +15V 0 600 100 200 300 400 500 600 700 800 900 1000 Capacitive Load (pF) Capacitive Load (pF) Figure 19. Small-Signal Overshoot vs Capacitive Load (100-mV Output Step) Figure 20. Small-Signal Overshoot vs Capacitive Load (100-mV Output Step) 120 1.0 0.8 100 IB and IOS Current (nA) 0.6 AOL (mV/V) 0.4 0.2 10kW 0 -0.2 -0.4 2kW -0.6 -IB 80 60 +IB 40 IOS 20 -0.8 -1.0 -40 0 10 -15 35 60 -40 85 -15 70 VS = 18V +IB 85 4.5 50 4.0 40 30 IQ (mA) IB and IOS (nA) 50 5.0 60 IOS 20 3.5 3.0 10 -IB 0 2.5 Common-Mode Range -10 2.0 -20 -18 -12 -6 0 6 12 18 -40 -15 Common-Mode Voltage (V) Figure 23. IB and IOS vs Common-Mode Voltage 10 35 Figure 22. IB and IOS vs Temperature Figure 21. Open-Loop Gain vs Temperature 80 10 Temperature (C) Temperature (C) Submit Documentation Feedback 10 35 60 85 Temperature (C) Figure 24. Quiescent Current vs Temperature Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 OPA1611, OPA1612 www.ti.com SBOS450C - JULY 2009 - REVISED AUGUST 2014 Typical Characteristics (continued) At TA = +25C, VS = 15 V, and RL = 2 k, unless otherwise noted. 4.0 75 3.9 70 3.8 65 60 3.6 ISC (mA) IQ (mA) 3.7 -ISC 3.5 3.4 55 +ISC 50 45 3.3 40 3,2 35 Specified Supply-Voltage Range 3.1 3.0 30 0 4 8 12 16 20 24 28 32 36 -50 -25 0 Supply Voltage (V) 14 1k VS = 15V Dual version with both channels driven simultaneously -13 50 75 100 125 Figure 26. Short-Circuit Current vs Temperature 10k +25C ZO (W) Output Voltage (V) Figure 25. Quiescent Current vs Supply Voltage 15 13 25 Temperature (C) +85C -40C 100 10 1 -14 0.1 -15 0 10 20 30 40 50 10 100 1k 10k 100k 1M 10M 100M Output Current (mA) Frequency (Hz) Figure 27. Output Voltage vs Output Current Figure 28. Open-Loop Output Impedance vs Frequency Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 Submit Documentation Feedback 11 OPA1611, OPA1612 SBOS450C - JULY 2009 - REVISED AUGUST 2014 www.ti.com 7 Detailed Description 7.1 Overview The OPA161x family of bipolar-input operational amplifiers achieve very low 1.1-nV/Hz noise density with an ultralow distortion of 0.000015% at 1 kHz. The rail-to-rail output swing, within 600 mV with a 2-k load, increases headroom and maximizes dynamic range. These devices also have a high output drive capability of 40 mA. The wide supply range of 2.25 V to 18 V, on only 3.6 mA of supply current per channel, makes them applicable to both 5V systems and 36V audio applications. The OPA1611 and OPA1612 op amps are unity-gain stable and provide excellent dynamic behavior over a wide range of load conditions. 7.2 Functional Block Diagram V+ Pre-Output Driver OUT IN- IN+ V- Figure 29. OPA1611 Simplified Schematic 7.3 Feature Description 7.3.1 Power Dissipation The OPA1611 and OPA1612 series op amps are capable of driving 2-k loads with a power-supply voltage up to 18 V. Internal power dissipation increases when operating at high supply voltages. Copper leadframe construction used in the OPA1611 and OPA1612 series op amps improves heat dissipation compared to conventional materials. Circuit board layout can also help minimize junction temperature rise. Wide copper traces help dissipate the heat by acting as an additional heat sink. Temperature rise can be further minimized by soldering the devices to the circuit board rather than using a socket. 7.3.2 Electrical Overstress Designers often ask questions about the capability of an operational amplifier to withstand electrical overstress. These questions tend to focus on the device inputs, but may involve the supply voltage pins or even the output pin. Each of these different pin functions have electrical stress limits determined by the voltage breakdown characteristics of the particular semiconductor fabrication process and specific circuits connected to the pin. Additionally, internal electrostatic discharge (ESD) protection is built into these circuits to protect them from accidental ESD events both before and during product assembly. 12 Submit Documentation Feedback Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 OPA1611, OPA1612 www.ti.com SBOS450C - JULY 2009 - REVISED AUGUST 2014 Feature Description (continued) Having a good understanding of this basic ESD circuitry and its relevance to an electrical overstress event is helpful. Figure 30 shows the ESD circuits contained in the OPA161x series (indicated by the dashed line area). The ESD protection circuitry involves several current-steering diodes connected from the input and output pins and routed back to the internal power-supply lines, where they meet at an absorption device internal to the operational amplifier. This protection circuitry is intended to remain inactive during normal circuit operation. RF +V +VS OPA1611 RI ESD CurrentSteering Diodes -In Op-Amp Core +In Edge-Triggered ESD Absorption Circuit ID VIN Out RL (1) -V -VS (1) VIN = +VS + 500 mV. Figure 30. Equivalent Internal ESD Circuitry and its Relation to a Typical Circuit Application An ESD event produces a short duration, high-voltage pulse that is transformed into a short duration, highcurrent pulse when discharged through a semiconductor device. The ESD protection circuits are designed to provide a current path around the operational amplifier core to prevent damage to the core. The energy absorbed by the protection circuitry is then dissipated as heat. When an ESD voltage develops across two or more of the amplifier device pins, current flows through one or more of the steering diodes. Depending on the path that the current takes, the absorption device may activate. The absorption device internal to the OPA1611 triggers when a fast ESD voltage pulse is impressed across the supply pins. Once triggered, the absorption device quickly activates and clamps the ESD pulse to a safe voltage level. When the operational amplifier connects into a circuit such as the one Figure 30 shows, the ESD protection components are intended to remain inactive and not become involved in the application circuit operation. However, circumstances may arise where an applied voltage exceeds the operating voltage range of a given pin. If this condition occurs, some of the internal ESD protection circuits may possibly be biased on, and conduct current. Any such current flow occurs through steering diode paths and rarely involves the absorption device. Figure 30 shows a specific example where the input voltage, VIN, exceeds the positive supply voltage (+VS) by 500 mV or more. Much of what happens in the circuit depends on the supply characteristics. If +VS can sink the current, one of the upper input steering diodes conducts and directs current to +VS. Excessively high current levels can flow with increasingly higher VIN. As a result, the datasheet specifications recommend that applications limit the input current to 10 mA. Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 Submit Documentation Feedback 13 OPA1611, OPA1612 SBOS450C - JULY 2009 - REVISED AUGUST 2014 www.ti.com Feature Description (continued) If the supply is not capable of sinking the current, VIN may begin sourcing current to the operational amplifier, and then take over as the source of positive supply voltage. The danger in this case is that the voltage can rise to levels that exceed the operational amplifier absolute maximum ratings. In extreme but rare cases, the absorption device triggers on while +VS and -VS are applied. If this event happens, a direct current path is established between the +VS and -VS supplies. The power dissipation of the absorption device is quickly exceeded, and the extreme internal heating destroys the operational amplifier. Another common question involves what happens to the amplifier if an input signal is applied to the input while the power supplies +VS or -VS are at 0 V. Again, the result depends on the supply characteristic while at 0 V, or at a level below the input signal amplitude. If the supplies appear as high impedance, then the operational amplifier supply current may be supplied by the input source via the current steering diodes. This state is not a normal bias condition; the amplifier most likely does not operate normally. If the supplies are low impedance, then the current through the steering diodes can become quite high. The current level depends on the ability of the input source to deliver current, and any resistance in the input path. If there is an uncertainty about the ability of the supply to absorb this current, external zener diodes may be added to the supply pins; see Figure 30. The zener voltage must be selected such that the diode does not turn on during normal operation. However, the zener diode voltage must be low enough so that the zener diode conducts if the supply pin begins to rise above the safe operating supply voltage level. 7.3.3 Operating Voltage The OPA161x series op amps operate from 2.25-V to 18-V supplies while maintaining excellent performance. The OPA161x series can operate with as little as +4.5 V between the supplies and with up to +36 V between the supplies. However, some applications do not require equal positive and negative output voltage swing. With the OPA161x series, power-supply voltages do not need to be equal. For example, the positive supply could be set to +25 V with the negative supply at -5 V. In all cases, the common-mode voltage must be maintained within the specified range. In addition, key parameters are assured over the specified temperature range of TA = -40C to +85C. Parameters that vary with operating voltage or temperature are shown in the Typical Characteristics. 7.3.4 Input Protection The input terminals of the OPA1611 and the OPA1612 are protected from excessive differential voltage with back-to-back diodes, as Figure 31 shows. In most circuit applications, the input protection circuitry has no consequence. However, in low-gain or G = +1 circuits, fast ramping input signals can forward bias these diodes because the output of the amplifier cannot respond rapidly enough to the input ramp. This effect is illustrated in Figure 17 of the Typical Characteristics. If the input signal is fast enough to create this forward bias condition, the input signal current must be limited to 10 mA or less. If the input signal current is not inherently limited, an input series resistor (RI) or a feedback resistor (RF) can be used to limit the signal input current. This input series resistor degrades the low-noise performance of the OPA1611 and is examined in the Noise Performance section. Figure 31 shows an example configuration when both current-limiting input and feedback resistors are used. RF - OPA1611 RI Input Output + Figure 31. Pulsed Operation 14 Submit Documentation Feedback Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 OPA1611, OPA1612 www.ti.com SBOS450C - JULY 2009 - REVISED AUGUST 2014 8 Application and Implementation 8.1 Application Information The OPA1611 and OPA1612 are unity-gain stable, precision op amps with very low noise; these devices are also free from output phase reversal. Applications with noisy or high-impedance power supplies require decoupling capacitors close to the device power-supply pins. In most cases, 0.1-F capacitors are adequate. 8.2 Noise Performance Figure 32 shows the total circuit noise for varying source impedances with the op amp in a unity-gain configuration (no feedback resistor network, and therefore no additional noise contributions). The OPA1611 (GBW = 40 MHz, G = +1) is shown with total circuit noise calculated. The op amp itself contributes both a voltage noise component and a current noise component. The voltage noise is commonly modeled as a time-varying component of the offset voltage. The current noise is modeled as the time-varying component of the input bias current and reacts with the source resistance to create a voltage component of noise. Therefore, the lowest noise op amp for a given application depends on the source impedance. For low source impedance, current noise is negligible, and voltage noise generally dominates. The low voltage noise of the OPA161x series op amps makes them a good choice for use in applications where the source impedance is less than 1 k. 8.2.1 Detailed Design Procedure The equation in Figure 32 shows the calculation of the total circuit noise, with these parameters: * en = voltage noise * In = current noise * RS = source impedance * k = Boltzmann's constant = 1.38 x 10-23 J/K * T = temperature in degrees Kelvin (K) 8.2.2 Application Curve Voltage Noise Spectral Density, EO (nV/?Hz) VOLTAGE NOISE SPECTRAL DENSITY vs SOURCE RESISTANCE 10k EO 1k Total Output Voltage Noise RS 100 Resistor Noise 10 2 2 2 EO = en + (in RS) + 4kTRS 1 100 1k 10k 100k 1M Source Resistance, RS (W) Figure 32. Noise Performance of the OPA1611 In Unity-Gain Buffer Configuration 8.2.3 Basic Noise Calculations Design of low-noise op amp circuits requires careful consideration of a variety of possible noise contributors: noise from the signal source, noise generated in the op amp, and noise from the feedback network resistors. The total noise of the circuit is the root-sum-square combination of all noise components. The resistive portion of the source impedance produces thermal noise proportional to the square root of the resistance. Figure 32 plots this function. The source impedance is usually fixed; consequently, select the op amp and the feedback resistors to minimize the respective contributions to the total noise. Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 Submit Documentation Feedback 15 OPA1611, OPA1612 SBOS450C - JULY 2009 - REVISED AUGUST 2014 www.ti.com Noise Performance (continued) Figure 33 shows both inverting and noninverting op amp circuit configurations with gain. In circuit configurations with gain, the feedback network resistors also contribute noise. The current noise of the op amp reacts with the feedback resistors to create additional noise components. The feedback resistor values can generally be chosen to make these noise sources negligible. The equations for total noise are shown for both configurations. Noise in Noninverting Gain Configuration Noise at the output: R2 2 2 R1 EO = 1 + R2 R1 2 2 2 2 2 2 en + e1 + e2 + (inR2) + eS + (inRS) EO R2 Where eS = O4kTRS 1 + R1 2 1+ R2 R1 = thermal noise of RS RS R2 e1 = O4kTR1 R1 VS = thermal noise of R1 e2 = O4kTR2 = thermal noise of R2 Noise in Inverting Gain Configuration Noise at the output: R2 2 2 EO R1 = 1+ R2 R1 + RS 2 EO RS Where eS = O4kTRS 2 2 2 2 en + e1 + e2 + (inR2) + eS R2 R1 + RS = thermal noise of RS VS e1 = O4kTR1 R2 R1 + RS = thermal noise of R1 e2 = O4kTR2 = thermal noise of R2 For the OPA161x series op amps at 1 kHz, en = 1.1 nV/Hz and in = 1.7 pA/Hz. Figure 33. Noise Calculation in Gain Configurations 16 Submit Documentation Feedback Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 OPA1611, OPA1612 www.ti.com SBOS450C - JULY 2009 - REVISED AUGUST 2014 8.3 Total Harmonic Distortion Measurements The OPA161x series op amps have excellent distortion characteristics. THD + noise is below 0.00008% (G = +1, VO = 3 VRMS, BW = 80 kHz) throughout the audio frequency range, 20 Hz to 20 kHz, with a 2-k load (see Figure 7 for characteristic performance). The distortion produced by OPA1611 series op amps is below the measurement limit of many commercially available distortion analyzers. However, a special test circuit (such as Figure 34 shows) can be used to extend the measurement capabilities. Op amp distortion can be considered an internal error source that can be referred to the input. Figure 34 shows a circuit that causes the op amp distortion to be 101 times (or approximately 40 dB) greater than that normally produced by the op amp. The addition of R3 to the otherwise standard noninverting amplifier configuration alters the feedback factor or noise gain of the circuit. The closed-loop gain is unchanged, but the feedback available for error correction is reduced by a factor of 101, thus extending the resolution by 101. Note that the input signal and load applied to the op amp are the same as with conventional feedback without R3. Keep the value of R3 small to minimize its effect on the distortion measurements. Validity of this technique can be verified by duplicating measurements at high gain and/or high frequency where the distortion is within the measurement capability of the test equipment. Measurements for this data sheet were made with an audio precision system two distortion and noise analyzer, which greatly simplifies such repetitive measurements. The measurement technique can, however, be performed with manual distortion measurement instruments. R1 R2 SIG. DIST. GAIN GAIN R3 Signal Gain = 1+ VO = 3VRMS OPA1611 R2 R1 R2 Distortion Gain = 1+ R1 II R3 Generator Output 1 101 R1 R2 R3 1kW 10W -1 101 4.99kW 4.99kW 49.9W +10 110 549W 4.99kW 49.9W Analyzer Input Audio Precision System Two(1) with PC Controller Load (1) For measurement bandwidth, see Figure 7 through Figure 12. Figure 34. Distortion Test Circuit 8.4 Capacitive Loads The dynamic characteristics of the OPA1611 and OPA1612 have been optimized for commonly encountered gains, loads, and operating conditions. The combination of low closed-loop gain and high capacitive loads decreases the phase margin of the amplifier and can lead to gain peaking or oscillations. As a result, heavier capacitive loads must be isolated from the output. The simplest way to achieve this isolation is to add a small resistor (RS equal to 50 , for example) in series with the output. This small series resistor also prevents excess power dissipation if the output of the device becomes shorted. Figure 19 and Figure 20 illustrate graphs of Small-Signal Overshoot vs Capacitive Load for several values of RS. Also, refer to Applications Bulletin AB-028, Feedback Plots Define Op Amp AC Performance (SBOA015), available for download from the TI web site, for details of analysis techniques and application circuits. Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 Submit Documentation Feedback 17 OPA1611, OPA1612 SBOS450C - JULY 2009 - REVISED AUGUST 2014 www.ti.com 8.5 Application Circuit Figure 35 shows how to use the OPA1611 as an amplifier for professional audio headphones. The circuit shows the left side stereo channel. An identical circuit is used to drive the right side stereo channel. 820W 2200pF 0.1mF +VA (+15V) 330W IOUTL+ OPA1611 2700pF -VA (-15V) 680W 620W Audio DAC with Differential Current Outputs 0.1mF +VA (+15V) 0.1mF 100W 820W OPA1611 8200pF 2200pF -VA (-15V) 0.1mF 0.1mF +VA (+15V) L Ch Output 680W 620W IOUTLOPA1611 330W 2700pF -VA (-15V) 0.1mF Figure 35. Audio DAC Post Filter (I/V Converter and Low-Pass Filter) 18 Submit Documentation Feedback Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 OPA1611, OPA1612 www.ti.com SBOS450C - JULY 2009 - REVISED AUGUST 2014 9 Power-Supply Recommendations The OPA161x is specified for operation from 4.5 V to 36 V (2.25 V to 18 V); many specifications apply from -40C to +85C. Parameters that can exhibit significant variance with regard to operating voltage or temperature are presented in the Typical Characteristics section. CAUTION Supply voltages larger than 40 V can permanently damage the device; see the Absolute Maximum Ratings. Place 0.1-F bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or highimpedance power supplies. For more detailed information on bypass capacitor placement, refer to the Typical Characteristics section. Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 Submit Documentation Feedback 19 OPA1611, OPA1612 SBOS450C - JULY 2009 - REVISED AUGUST 2014 www.ti.com 10 Layout 10.1 Layout Guidelines For best operational performance of the device, use good printed circuit board (PCB) layout practices, including: * Noise can propagate into analog circuitry through the power pins of the circuit as a whole and the op amp itself. Bypass capacitors are used to reduce the coupled noise by providing low-impedance power sources local to the analog circuitry. - Connect low-ESR, 0.1-F ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. A single bypass capacitor from V+ to ground is applicable for singlesupply applications. * Separate grounding for analog and digital portions of the circuitry is one of the simplest and most-effective methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes. A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital and analog grounds while paying attention to the flow of the ground current. For more detailed information, refer to the application report Circuit Board Layout Techniques (SLOA089). * In order to reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. If these traces cannot be keep them separate, crossing the sensitive trace perpendicular as opposed to in parallel with the noisy trace is the preferred method. * Place the external components as close to the device as possible. As shown in Figure 36, keeping RF and RG close to the inverting input minimizes parasitic capacitance. * Keep the length of input traces as short as possible. Always remember that the input traces are the most sensitive part of the circuit. * Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce leakage currents from nearby traces that are at different potentials. 10.2 Layout Example RIN + VIN VOUT RG RF (Schematic Representation) Run the input traces as far away from the supply lines as possible Place components close to device and to each other to reduce parasitic errors VS+ RF NC NC IN V+ +IN OUT V NC RG GND VIN GND RIN Only needed for dual-supply operation GND VS (or GND for single supply) Use low-ESR, ceramic bypass capacitor VOUT Ground (GND) plane on another layer Figure 36. Operational Amplifier Board Layout for a Noninverting Configuration 20 Submit Documentation Feedback Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 OPA1611, OPA1612 www.ti.com SBOS450C - JULY 2009 - REVISED AUGUST 2014 11 Device and Documentation Support 11.1 Documentation Support 11.1.1 Related Documentation For related documentation see the following: * Feedback Plots Define Op Amp AC Performance , SBOA015 * Circuit Board Layout Techniques, SLOA089 11.2 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 1. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY OPA1611 Click here Click here Click here Click here Click here OPA1612 Click here Click here Click here Click here Click here 11.3 Trademarks SoundPlus is a trademark of Texas Instruments, Inc. All other trademarks are the property of their respective owners. 11.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.5 Glossary SLYZ022 -- TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Copyright (c) 2009-2014, Texas Instruments Incorporated Product Folder Links: OPA1611 OPA1612 Submit Documentation Feedback 21 PACKAGE OPTION ADDENDUM www.ti.com 29-Aug-2014 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) OPA1611AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA 1611A OPA1611AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA 1611A OPA1612AID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA 1612A OPA1612AIDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OPA 1612A OPA1612AIDRGR ACTIVE SON DRG 8 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OVII OPA1612AIDRGT ACTIVE SON DRG 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 OVII (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 29-Aug-2014 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 4-Sep-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing OPA1611AIDR SOIC SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 OPA1612AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 OPA1612AIDRGR SON DRG 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 OPA1612AIDRGT SON DRG 8 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 4-Sep-2014 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) OPA1611AIDR SOIC D 8 2500 367.0 367.0 35.0 OPA1612AIDR SOIC D 8 2500 367.0 367.0 35.0 OPA1612AIDRGR SON DRG 8 3000 367.0 367.0 35.0 OPA1612AIDRGT SON DRG 8 250 210.0 185.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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