1 of 14 060303
FEATURES
§ 5V power-on reset
§ 3.3V power-on reset
§ Two referenced comparators with separate
outputs for monitoring additional supplies
§ Internal power is drawn from higher of either
the IN5V input or the IN3.3V input
§ Excellent for systems designed to operate
with multiple power supplies
§ Asserts resets during power transients
§ Pushbutton reset input for system override
§ Maintains reset for user configurable times
of 10ms, 100ms, or 1s
§ Watchdog timer for software monitoring
(DS1831A)
§ Precision temperature-compensated voltage
reference and voltage sensor
§ 16 pin DIP and 16 pin 150mil SO available
§ Operating Temperature of -40°C to +85°C
PIN ASSIGNMENT
DESCRIPTION
The DS1831 multisupply monitor and reset monitors up to four system voltages: 5V supply, 3.3V (or 3V)
supply, and two additional user configurable voltage monitors. DS1831 power for internal operation
comes from the higher voltage level of the 3.3V input or the 5V input. One of these inputs must be greater
than 1V for device operation. Pushbutton (manual reset) functionality is provided for the 5V reset, the
DS1831/A/B
Multisupply Micromonito
r
www.maxim-ic.com
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN3.3V
RST3.3V
TOL3.3V
TD3.3V
PBRST3.3V
N
MI1
N
MI2
MPBRST
IN5V
RST5V
TOL5V
TD5V
PBRST5V
IN1
IN2
GND
DS1831
16-Pin (300mil) DIP
&
16-Pin
(
150mil
)
SO
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN3.3V
RST3.3V
TOL3.3V
TD3.3V
PBRST3.3V
N
MI1
WDS
TDWD
IN5V
RST5V
TOL5V
TD5V
PBRST5V
IN1
ST
GND
DS1831
A
16-Pin (300mil) DIP
&
16-Pin
(
150mil
)
SO
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN3.3V
RST3.3V
TOL3.3V
TD3.3V
PBST
N
MI1
N
MI2
MPBRST
IN5V
RST5V
TOL5V
TD5V
PBRST5V
IN1
IN2
GND
DS1831B
16-Pin (300mil) DIP
&
16-Pin
(
150mil
)
SO
DS1831/A/B
2 of 14
3.3V reset or for all reset outputs by the master pushbutton. The DS1831A replaces one reference
comparator and the master pushbutton with watchdog and the DS1831B replaces the 3.3V PBRST with a
last reset status output.
TOL and TD inputs allow user configuration of the DS1831 for multiple applications. The TOL inputs
configure the tolerance for the specified output and the TD inputs configure the reset time delays.
PIN DESCRIPTION
IN5V 5V Power Supply Input MPBRST Master Pushbutton (DS1831)
TDWD Watchdog Time Delay Select (DS1831A)
RST 5V 5V Reset Open Drain Output NMI2 Non-maskable Interrupt 2 (DS1831)
WDS Watchdog Status Output (DS1831A)
TOL5V Selects 5V Input Tolerance NMI1 Non-maskable Interrupt 1
TD5V Selects 5V Reset Time Delay PBRST 3.3V 3.3V Reset Pushbutton
PBST Pushbutton Status Output (DS1831B)
PBRST 5V 5V Reset Pushbutton TD3.3V Select 3.3V Reset Time Delay
IN1 Sense Input 1 TOL3.3V Selects 3.3V Input Tolerance
IN2
ST
Sense Input 2 (DS1831)
Watchdog Strobe Inputs
(DS1831A)
RST 3.3V 3.3V Reset Open Drain Output
GND Ground IN3.3V 3.3V Power Supply Input
DS1831 BLOCK DIAGRAM Figure 1
RST3.3V
VCC
TOLERANCE
BIAS
IN
5
V
+
-
TIME
DELAY
1.25V T.C.
REFERENCE
TOL5V
GROUND
VCC
TOLERANCE
BIAS
IN
3.3V
TOL3.3V
TIME
DELAY
Level
Sense
&
MPBRST
+
-
100k
TD5V
TD3.3V
100k
PBRST3.3V
PBRST5V
100k
+
-
+
-
IN1
IN2
NMI1
NMI2
RST5V
DS1831/A/B
3 of 14
OPERATION—POWER MONITOR
The DS1831 provides the functions of detecting out-of-tolerance conditions on a 3.3V (or 3V) and 5V
power supply and warning a processor-based system of impending power failure. When an input is
detected as out-of-tolerance on either voltage input the RST for that supply will be forced active low.
When that input returns to a valid state the associated RST will remain active for the time delay selected
with the associated TD input and then return to an inactive state until the next input out-of-tolerance
condition.
On power-up both resets are kept active for the selected reset time after the associated power supply input
has reached the selected tolerance. This allows the power supply and system power to stabilize before
RST is released.
All internal operating current for the DS1831 will be supplied by either the IN3.3V or IN5V input which
ever has the highest voltage level.
OPERATION—TOLERANCE SELECT
The DS1831 provides two TOL inputs for individual customization of the DS1831 to specific application
requirements. If the TOL for the 5V supply is tied to the 5V input a 5% tolerance is selected. If the TOL
is connected to ground a 10% tolerance is selected or if it is left unconnected a 15% tolerance is selected.
If the TOL for the 3.3V supply is tied to the 3.3V input a 5% tolerance is selected, a 10% tolerance is
selected if it is connected to ground, and a 20% tolerance is selected if the input is left unconnected.
These tolerance conditions are set at power up and can only be changed by power cycling the device.
OPERATION—RESET TIME-DELAY SELECT
The DS1831 provides two TD inputs for individual customization of reset time-delays and an additional
one for the DS1831A watchdog. TD inputs select time delays for the IN5V and IN3.3V resets outputs and
the Watchdog on the DS1831A. The reset time delays are shown in Table 1. These allow the selection of
minimum delays of 10ms, 100ms, and 1000ms.
Wiring an individual reset output to the push-button input of the other voltage reset allows custom reset
timings or allows for the sequencing of the reset outputs. See Figure 2.
These time-delays are set at power-up and cannot be changed after the device reaches an in-tolerance
condition.
TD INPUTS/RESET AND WATCHDOG TIME-DELAYS Table 1
RESET TIME-DELAY
TD MIN TYP MAX
GND 10ms 16ms 20ms
Float 100ms 160ms 200ms
VCC 1000ms 1600ms 2000ms
DS1831/A/B
4 of 14
PUSHBUTTON RESET SEQUENCING Figure 2
NOTE: The RST 5V output is connected to the IN3.3V via a 100 kW resistor in the push-button input and
therefore does not require a pull-up resistor (an addition pull up can be used to accelerate responses). If an
external pull up is used in this example it must be connected to the 3.3V power supply.
OPERATION—PUSHBUTTON RESET
The DS1831 provides three pushbutton inputs for manual reset of the device. Pushbutton inputs for the
3.3V reset, 5V reset, and a master pushbutton reset (DS1831 and DS1831B only) input; provide multiple
options for system control. The 3.3V pushbutton reset and 5V pushbutton resets provide a simple manual
reset for the associated reset output; while the master pushbutton reset forces all resets and NMI outputs
active low.
The 5V reset pushbutton input and the 3.3V reset pushbutton input provide manual reset control input for
each associated reset output. When the output associated with a pushbutton input is not active, a
pushbutton reset can be generated by pulling the associated PBRST pin low for at least 20µs. When the
pushbutton is held low the reset will be forced active and will remain active for a reset cycle after the
pushbutton is released. See Figure 2 for an application example that allows a user to sequence the reset
outputs.
A master pushbutton reset cycle can be started if at least one voltage input (IN5V, IN3.3V, IN1, or IN2) is in
tolerance and at least one output is active. A master pushbutton reset is generated by pulling the MPBRST
pin low for at least 20µs. When the pushbutton is held low all outputs are forced active and will remain
active for a reset or NMI time delay after the pushbutton is released. The Master Pushbutton input is
pulled high through an internal 100kW pull up resistor and debounced via internal circuitry. See Figure 3
for an application example. Figures 4 and 5 for the timing diagram.
The 5V and 3.3V pushbutton reset inputs are pulled high through an internal 100kW pull up resistor to the
voltage input, which is associated with that pushbutton. The master pushbutton is pulled to the greater of
the IN5V and IN3.3V inputs.
RST5V
PBRST3.3V
GND
TD5V
IN3.3V
IN5V
RST3.3V
TOL3.3V
PBRST5V
TOL5V
DS1831
TD3.3V
5V Supply 3.3V Supply
1
2
3
4
5
16
15
14
13
12
DS1831/A/B
5 of 14
PUSHBUTTON RESET Figure 3
TIMING DIAGRAM—MASTER PUSHBUTTON RESET Figure 4
RST5V
GND
TD5V
IN5V
PBRST5V
TOL5V
5V Supply
1
2
3
4
5
16
15
14
13
12
DS1831
10 kW
VIH
VIL
tPDLY
tPB
tRST
MPBRST
RST5V and RST3.3V
VOH
tNMI
NMI1 and NMI2
VOH
DS1831/A/B
6 of 14
TIMING DIAGRAM—5V OR 3.3V PUSHBUTTON RESET Figure 5
OPERATION—PUSHBUTTON STATUS
The DS1831B provides a master pushbutton status open drain output. The PBST output indicates the
status of the most recent reset condition. If the last reset was generated by the master pushbutton input it
would maintain a low condition until cleared by another event (except the master pushbutton) generating
a reset. Once cleared it will remain high until the master pushbutton is pulled low generating a reset
condition. The PBST output is open drain and will require a pull-up resistor on the output to maintain a
valid condition. The value of the pull up resistor is not critical in most cases but must be set low enough
to pull the output to a high state. A common value used is 10kW (see Figure 6).
DS1831B APPLICATION EXAMPLE Figure 6
VIH
VIL
tPDLY
tPB
tRST
PBRST5V
(or PBRST3.3V)
RST5V (or RST3.3V)
VOH
VIL
5V Supply
PBRST5V
GND
NMI2
IN1 NMI1
VSENSE1
IN2
MPBRST
VSENSE2
VCC
10kW
DS1831B
RST5V
TD5V
IN5V
TOL5V
PBST
IN3.3V
RST3.3V
TOL3.3V
TD3.3V
3.3V Supply
VCC
10
k
W
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
DS1831/A/B
7 of 14
OUTPUT VALID CONDITIONS
The DS1831 can maintain valid outputs as long as one input remains above 1.0V. Accurate voltage
monitoring additionally requires that either the 3.3V IN or 5V IN input be above 1.5V. If this condition is
not met and at least one of the supply inputs are at or above 1.0V all outputs are maintained in the active
condition. The DS1831 requires pull-up resistors on the outputs to maintain a valid output. The value of
the pull up resistor is not critical in most cases but must be set low enough to pull the output to a high
state. A common pull-up resistor value used is 10kW (see Figure 7).
APPLICATION DIAGRAM—OPEN DRAIN OUTPUTS Figure 7
NOTE: If outputs are at different voltages the outputs can not be connected to form a wired AND.
OPERATION—NON-MASKABLE INTERRUPT
The DS1831 has two referenced comparator (DS1831A has only one referenced comparator) that can be
used to monitor upstream voltages or other system specific voltages. Each comparator is referenced to the
1.25V internal band gap reference and controls an open-drain output. When a voltage being monitored
decays to the voltage sense point, the DS1831 pulses the NMI output to the active state for a minimum
10µs. The comparator detection circuitry also has built-in hysteresis of 100µV. The supply must be below
the voltage sense point for approximately 2µs before a low NMI will be generated. In this way, power
supply noise is minimized in the monitoring function, reducing false interrupts. See Figure 8 for the non-
maskable timing diagram.
Versatile trip voltages can be configured by the use of an external resistor divider to divide the voltage at
a sense point to the 1.25V trip levels of the referenced comparators. See Figure 9 for an example circuit
diagram and sample equations. The equations demonstrate a design process to determine the resistor
values to use.
Connecting one or both NMI outputs to one of the reset specific PBRST s allows the non-maskable
interrupt to generate an automatic reset for the reset time period when an out-of-tolerance condition
occurs in a monitored supply. An example is shown in Figure 9.
RST5V
PBRST3.3V
GND
TD5V
IN3.3v
IN5V
RST3.3V
TOL3.3V
PBRST5V
TOL5V
DS1831
TD3.3V
5V Supply 3.3V Supply
1
2
3
4
5
16
15
14
13
12
10 kW
10
K
W
DS1831/A/B
8 of 14
The output associated with the specific input will be held low if the voltage on the input pin is less than
1.25V. If the voltage is above 1.25V the output will not sink current and will be pulled up by the required
pull up resistor. The value of the resistors is not critical in most cases but must be set low enough to pull
the output to a high state. A common value used is 10kW. If a NMI output is connected to a pushbutton
input an additional pull-up resistor can be used (to improve speed of transitions) but is not required.
During a power-up, any detected IN pin levels above VTP by the comparator are disabled from generating
an inactive (high) interrupt until at least 1 supply on the VIN inputs rises above 1.5 volts. All NMI outputs
will be held active (low) until at least one VIN reaches 1.5 volts at which point the NMI outputs will be
based on the value of the associated IN input.
TIMING DIAGRAM—NON-MASKABLE INTERRUPT Figure 8
VIN >1.25V
VTP VTP(min)
VTP(max)
tIPD
NMI
VOL
VTP
VTP(min)
VTP(max)
VOH
tNMI
DS1831/A/B
9 of 14
NON-MASKABLE INTERRUPT CIRCUIT EXAMPLE Figure 9
Example: VSENSE1 = 11.50V trip point VSENSE1 = R2
R2R1 +X 1.25V
Therefore: 11.50V = k 100
k 100R1 +X 1.25V
Resulting In: R1 = 820kW
Repeat the same steps to solve for R3 and R4 with VSENSE2.
OPERATION - WATCHDOG TIMER
The watchdog timer function (DS1831A only) forces the WDS signal active (low) when the ST input
does not have a transition (high-to-low or low-to-high) within the predetermined time period. The time-
out period is determined by the condition of the TDWD pin (see Table 1). If TDWD is connected to ground
the minimum watchdog time-out would be 10ms, TD floating would yield a minimum time-out of 100ms,
and TDWD connected to VCC would provide a time-out of 1000ms minimum. Time-out of the watchdog
starts when at least one of the RST outputs becomes inactive (high). If a transition occurs on the ST input
pin prior to time-out, the watchdog timer is reset and begins to time-out again. If the watchdog timer is
allowed to time-out, then the WDS output is pulsed active for a minimum of 100µs.
The WDS output is an open-drain output and must be pulled up externally. In most applications this
output would be connected to one of the Pushbutton inputs and would not require an external pull-up
resistor. The value of the resistors is not critical in most cases but must be set low enough to pull the
output to a high state. A common value used is 10kW. If a WDS output is connected to a pushbutton input
an additional pull-up resistor can be used (to improve speed of transitions) but is not required.
R1
DS1831
GND
IN1
VSENSE1
R2
IN2
R3
VSENSE2
R4
VCC
10 KW
PBRST5V
PBRST3.3V
NMI1
NMI2
MPBRST
W
W
DS1831/A/B
10 of 14
The ST input can be derived from many microprocessor outputs. The most typical signals used are the
microprocessor address signals, data signals, or control signals. When the microprocessor functions
normally, these signals would, as a matter of routine, cause the watchdog to be reset prior to time-out. To
guarantee that the watchdog timer does not time-out, a transition must occur at or less than the minimum
times shown in Table 1. A typical circuit example is shown in Figure 10. The watchdog timing is shown
in Figure 11.
The DS1831A watchdog function cannot be disabled. The watchdog strobe input must be strobed to avoid
a watchdog time-out however the watchdog status output can be disconnected yielding the same result.
WATCHDOG CIRCUIT EXAMPLE Figure 10
TIMING DIAGRAM — STROBE INPUT Figure 11
R1 PBRST5V
PBRST3.3V
DS1831
GND
WDS
IN1 NMI1
VSENSE1
R2
ST
TDWD
µP
VCC
10kW
INVALID
EDGES
VALID
EDGES
INDETERMINATE
EDGES
MIN
MAX
ST
WDS
tST tTD
DS1831/A/B
11 of 14
RESET TIMING DIAGRAM—POWER UP Figure 12
RESET TIMING DIAGRAM — POWER DOWN Figure 13
tRPU
VOH
VINTP
VINTP (MIN)
VINTP (MAX)
tR
IN5V (or IN3.3V)
RST5V (or RST3.3V)
tF
IN5V (or IN3.3V)
tRPD
VOL
VINTP VINTP (MIN)
VINTP (MAX)
RST5V (or RST3.3V)
DS1831/A/B
12 of 14
ABSOLUTE MAXIMUM RATINGS*
Voltage on IN5V or IN3.3V
Pins Relative to Ground -0.5V to +6.0V
Voltage on either RST Relative to Ground -0.5V to the greater of IN5V + 0.5V or IN3.3V + 0.5V
Voltage on PBRST 3.3V Relative to Ground -0.5V to IN3.3V + 0.5V
Voltage on PBRST 5V Relative to Ground -0.5V to IN5V + 0.5V
Voltage on MPBRST, IN1, IN2
Relative to Ground -0.5V to the greater of IN5V + 0.5V or IN3.3V + 0.5V
Operating Temperature Range -40°C to +85°C
Storage Temperature Range -55°C to +125°C
Soldering Temperature See IPC/JEDEC J-STD-020A specification
* This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operation sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS (-40°C to 85°C)
PARAMETER SYMBOL MIN MAX UNITS NOTES
IN5V (Supply Voltage) V IN 1.0 5.5 V 1
IN3.3V (Supply Voltage) V IN 1.0 5.5 V 1
PBRST 3.3V, PBRST 5V, MPBRST , ST
input High Level VIH 0.7 x VINT VINT + 0.3 V 1*
PBRST 3.3V, PBRST 5V, MPBRST , ST
input Low Level VIL -0.3 0.3 x VINT V1*
* VINT is the greater voltage level of the IN5V or IN3.3V.
DC ELECTRICAL CHARACTERISTICS
(-40°C to 85°C; IN3.3V, IN5V = 1.0V to 5.5V)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Input Leakage IIL -1.0 +1.0 µA2
Output Current @ 2.4V IOH 3
Output Current @ 0.4V IOL +10 mA 4
Operating Current @ Ü5.5V ICC 80 100 µA5
Operating Current @ Ü3.6V ICC 60 85 µA6
IN5V Trip Point (TOL5V = IN5V)V
INTP 4.50 4.63 4.75 V
IN5V Trip Point (TOL5V = GND) VINTP 4.25 4.38 4.49 V
IN5V Trip Point (TOL5V = Float) VINTP 4.00 4.15 4.24 V
IN3.3V Trip Point (TOL3.3V = IN3.3V)V
INTP 2.98 3.06 3.15 V
IN3.3V Trip Point (TOL3.3V = GND) VINTP 2.80 2.88 2.97 V
IN3.3V Trip Point (TOL3.3V = Float) VINTP 2.47 2.55 2.64 V
IN Input Trip Points VTP 1.15 1.25 1.30 V
DS1831/A/B
13 of 14
CAPACITANCE (tA = +25°C)
PARAMETER SYMBOL MAX UNITS NOTES
Input Capacitance CIN 5pF
Input Capacitance COUT 7pF
AC ELECTRICAL CHARACTERISTICS
(-40°C to 85°C; IN3.3V, IN5V = 1.0V to 5.5V)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
RESET Active Time (TD=Low) tRST 10 16 20 ms 5
RESET Active Time (TD=Float) tRST 100 160 200 ms 5
RESET Active Time (TD=High) tRST 1000 1600 2000 ms 5
VCC Detect to RST tRPU See RESET Active Time ms 5
VCC Detect to RST tRPD 210
ms6
VIN Detect to NMI tIPD 210
ms6
NMI Active Time tNMI 20 ms
PBRST = VIL tPB 20 ms
PBRST Stable Low to Reset
Active tPDLY 50 ms
Watchdog Timeout (TD(WD)=Low) tTD 10 16 20 ms
Watchdog Timeout (TDWD=Float) tTD 100 160 200 ms
Watchdog Timeout (TDWD=High) tTD 1000 1600 2000 ms
ST Pulse Width tST 10 ns
Vin Slew Rate (V INTP(MAX) to V
INTP(MIN))tF300 ms
Vin Slew Rate (V INTP(MAX) to V
INTP(MIN))tR0ns
NOTES:
1) All voltages are referenced to ground.
2) All Pushbutton inputs are internally pulled to the associated Supply IN input or the greatest Supply IN
input for the MPBRST with an internal Impedance of 100kW.
3) Measured with outputs open and IN3.3V or IN5V £ 5.5V
4) Measured with outputs open and IN3.3V or IN5V £ 3.6V.
5) Measured using tR = 5µs
6) Noise immunity - pulses <2µs at a trip level will not cause a RST or NMI .
DS1831/A/B
14 of 14
ORDERING INFORMATION
Ordering Part
Number
Package Type Description
DS1831 16-Pin DIP 300mil 5V/3.3V Multisupply Monitor
DS1831S 16-Pin SO 150mil 5V/3.3V Multisupply Monitor
DS1831A 16-Pin DIP 300mil 5V/3.3V Multisupply Monitor w/Watchdog
DS1831AS 16-Pin SO 150mil 5V/3.3V Multisupply Monitor w/Watchdog
DS1831B 16-Pin DIP 300mil 5V/3.3V Multisupply Monitor w/Pushbutton Status
DS1831BS 16-Pin SO 150mil 5V/3.3V Multisupply Monitor w/Pushbutton Status
* Add “/T&R” for tape and reeling of surface mount packages.
