TL071, TL071A, TL071B, TL072 TL072A, TL072B, TL074, TL074A, TL074B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS SLOS080J - SEPTEMBER 1978 - REVISED MARCH 2005 D Low Power Consumption D Wide Common-Mode and Differential Voltage Ranges D Low Input Bias and Offset Currents D Output Short-Circuit Protection D Low Total Harmonic Distortion . . . 0.003% Typ D Low Noise D D D D D Vn = 18 nV/Hz Typ at f = 1 kHz High Input Impedance . . . JFET Input Stage Internal Frequency Compensation Latch-Up-Free Operation High Slew Rate . . . 13 V/s Typ Common-Mode Input Voltage Range Includes VCC+ description/ordering information The JFET-input operational amplifiers in the TL07x series are similar to the TL08x series, with low input bias and offset currents and fast slew rate. The low harmonic distortion and low noise make the TL07x series ideally suited for high-fidelity and audio preamplifier applications. Each amplifier features JFET inputs (for high input impedance) coupled with bipolar output stages integrated on a single monolithic chip. The C-suffix devices are characterized for operation from 0C to 70C. The I-suffix devices are characterized for operation from -40C to 85C. The M-suffix devices are characterized for operation over the full military temperature range of -55C to 125C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright (c) 2005, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 TL071, TL071A, TL071B, TL072 TL072A, TL072B, TL074, TL074A, TL074B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS SLOS080J - SEPTEMBER 1978 - REVISED MARCH 2005 description/ordering information (continued) ORDERING INFORMATION TA VIOmax AT 25C TL071CP TL071CP Tube of 50 TL072CP TL072CP Tube of 25 TL074CN TL074CN Tube of 75 TL071CD Reel of 2500 TL071CDR Tube of 75 TL072CD Reel of 2500 TL072CDR Tube of 50 TL074CD Reel of 2500 TL074CDR Reel of 2000 TL074CNSR TL074 Reel of 2000 TL071CPSR TL071 Reel of 2000 TL072CPSR T072 Reel of 2000 TL072CPWR T072 Tube of 90 TL074CPW Reel of 2000 TL074CPWR Tube of 50 TL071ACP TL071ACP Tube of 50 TL072ACP TL072ACP Tube of 25 TL074ACN TL074ACN Tube of 75 TL071ACD Reel of 2500 TL071ACDR Tube of 75 TL072ACD Reel of 2500 TL072ACDR Tube of 50 TL074ACD Reel of 2500 TL074ACDR SOP (PS) Reel of 2000 TL072ACPSR T072A SOP (NS) Reel of 2000 TL074ACNSR TL074A Tube of 50 TL071BCP TL071BCP Tube of 50 TL072BCP TL072BCP Tube of 25 TL074BCN TL074BCN Tube of 75 TL071BCD Reel of 2500 TL071BCDR Tube of 75 TL072BCD Reel of 2500 TL072BCDR Tube of 50 TL074BCD Reel of 2500 TL074BCDR Reel of 2000 TL074BCNSR PDIP (N) SOIC (D) 10 mV SOP (NS) SOP (PS) TSSOP (PW) PDIP (P) PDIP (N) 0C to 70C SOIC (D) PDIP (P) PDIP (N) 3 mV SOIC (D) SOP (NS) 2 TOP-SIDE MARKING Tube of 50 PDIP (P) 6 mV ORDERABLE PART NUMBER PACKAGE TL071C TL072C TL074C T074 071AC 072AC TL074AC 071BC 072BC TL074BC TL074B Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL071, TL071A, TL071B, TL072 TL072A, TL072B, TL074, TL074A, TL074B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS SLOS080J - SEPTEMBER 1978 - REVISED MARCH 2005 description/ordering information (continued) ORDERING INFORMATION TA VIOmax AT 25C TL071IP TL071IP Tube of 50 TL072IP TL072IP Tube of 25 TL074IN TL074IN Tube of 75 TL071ID Reel of 2500 TL071IDR Tube of 75 TL072ID Reel of 2500 TL072IDR Tube of 50 TL074ID Reel of 2500 TL074IDR CDIP (JG) Tube of 50 TL072MJGB TL072MJGB CFP (U) Tube of 150 TL072MUB TL072MUB LCCC (FK) Tube of 55 TL072MFKB TL072MFKB CDIP (J) Tube of 25 TL074MJB TL074MJB CFP (W) Tube of 25 TL074MWB TL074MWB LCCC (FK) Tube of 55 TL074MFKB TL074MFKB PDIP (N) 6 mV SOIC (D) 6 mV -55C 55C to 125C 9 mV TOP-SIDE MARKING Tube of 50 PDIP (P) -40C 40 C to 85C 85 C ORDERABLE PART NUMBER PACKAGE TL071I TL072I TL074I Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 TL071, TL071A, TL071B, TL072 TL072A, TL072B, TL074, TL074A, TL074B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS SLOS080J - SEPTEMBER 1978 - REVISED MARCH 2005 TL071, TL071A, TL071B D, P, OR PS PACKAGE (TOP VIEW) OFFSET N1 IN- IN+ VCC- 1 8 2 7 3 6 4 5 TL072, TL072A, TL072B D, JG, P, PS, OR PW PACKAGE (TOP VIEW) NC VCC+ OUT OFFSET N2 1OUT 1IN- 1IN+ VCC- 1 8 2 7 3 6 4 5 TL074A, TL074B D, J, N, NS, OR PW PACKAGE TL074 . . . D, J, N, NS, PW, OR W PACKAGE (TOP VIEW) VCC+ 2OUT 2IN- 2IN+ 1OUT 1IN- 1IN+ VCC+ 2IN+ 2IN- 2OUT TL072 U PACKAGE (TOP VIEW) NC 1OUT 1IN- 1IN+ VCC- 5 17 6 16 7 15 8 14 9 10 11 12 13 8 4 7 5 6 3 12 4 11 5 10 6 9 7 8 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 1IN- 1OUT NC 4OUT 4IN- NC 2OUT NC 2IN- NC 1IN+ NC VCC+ NC 2IN+ 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 NC - No internal connection symbols TL071 TL072 (each amplifier) TL074 (each amplifier) OFFSET N1 IN+ + IN+ + IN- - OUT IN- - OUT OFFSET N2 4 POST OFFICE BOX 655303 4OUT 4IN- 4IN+ VCC- 3IN+ 3IN- 3OUT TL074 FK PACKAGE (TOP VIEW) NC 1OUT NC V CC+ NC NC VCC+ NC OUT NC 13 2IN- 2OUT NC 3OUT 3IN- 3 2 1 20 19 18 9 3 NC V CC- NC 2IN+ NC 4 NC 1IN- NC 1IN+ NC NC V CC- NC OFFSET N2 NC NC IN- NC IN+ NC 10 2 14 2 NC VCC+ 2OUT 2IN- 2IN+ TL072 FK PACKAGE (TOP VIEW) NC OFFSET N1 NC NC NC TL071 FK PACKAGE (TOP VIEW) 1 1 * DALLAS, TEXAS 75265 4IN+ NC VCC- NC 3IN+ TL071, TL071A, TL071B, TL072 TL072A, TL072B, TL074, TL074A, TL074B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS SLOS080J - SEPTEMBER 1978 - REVISED MARCH 2005 schematic (each amplifier) VCC+ IN+ 64 IN- 128 OUT 64 C1 18 pF III AAA AAA 1080 1080 AAAAA AAAAA VCC- OFFSET N1 OFFSET N2 TL071 Only All component values shown are nominal. COMPONENT COUNT COMPONENT TYPE Resistors Transistors JFET Diodes Capacitors epi-FET TL071 TL072 TL074 11 14 2 1 1 1 22 28 4 2 2 2 44 56 6 4 4 4 Includes bias and trim circuitry POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 TL071, TL071A, TL071B, TL072 TL072A, TL072B, TL074, TL074A, TL074B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS SLOS080J - SEPTEMBER 1978 - REVISED MARCH 2005 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage (see Note 1): VCC+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V VCC- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -18 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 V Input voltage, VI (see Notes 1 and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V Duration of output short circuit (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited Package thermal impedance, JA (see Notes 5 and 6): D package (8 pin) . . . . . . . . . . . . . . . . . . . . . . 97C/W D package (14 pin) . . . . . . . . . . . . . . . . . . . . . 86C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 76C/W P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85C/W PS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 95C/W PW package (8 pin) . . . . . . . . . . . . . . . . . . . 149C/W PW package (14 pin) . . . . . . . . . . . . . . . . . . 113C/W U package . . . . . . . . . . . . . . . . . . . . . . . . . . . 185C/W Package thermal impedance, JC (see Notes 7 and 8): FK package . . . . . . . . . . . . . . . . . . . . . . . . . 5.61C/W J package . . . . . . . . . . . . . . . . . . . . . . . . . 15.05C/W JG package . . . . . . . . . . . . . . . . . . . . . . . . . 14.5C/W W package . . . . . . . . . . . . . . . . . . . . . . . . 14.65C/W Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150C Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: J, JG, or W package . . . . . . . . . . . . 300C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC-. 2. Differential voltages are at IN+, with respect to IN-. 3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less. 4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded. 5. Maximum power dissipation is a function of TJ(max), JA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) - TA)/JA. Operating at the absolute maximum TJ of 150C can affect reliability. 6. The package thermal impedance is calculated in accordance with JESD 51-7. 7. Maximum power dissipation is a function of TJ(max), JC, and TC. The maximum allowable power dissipation at any allowable case temperature is PD = (TJ(max) - TC)/JC. Operating at the absolute maximum TJ of 150C can affect reliability. 8. The package thermal impedance is calculated in accordance with MIL-STD-883. 6 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 electrical characteristics, VCC = 15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TL071C TL072C TL074C TA MIN VIO V IO IIO VO = 0 0, RS = 50 Temperature coefficient of input offset voltage VO = 0, RS = 50 Input offset current VO = 0 Input bias current VICR Common-mode Common mode input voltage range VOM Maximum peak output voltage swing TYP MAX 3 10 Full range Full range 18 25C 5 100 65 200 Full range RL 10 k 6 MIN TYP MAX 2 3 7.5 MIN 100 65 200 MAX 3 6 8 18 5 100 65 200 5 100 pA 2 nA 65 200 pA 20 nA 2 7 7 11 -12 to 15 11 -12 to 15 11 -12 to 15 11 -12 to 15 25C 12 13.5 12 13.5 12 13.5 12 13.5 12 12 12 12 10 10 10 10 mV V/C 18 5 2 UNIT TYP 5 18 7 TL071I TL072I TL074I 25C 25 C Full range RL 2 k MAX 3 10 25C RL = 10 k TYP 13 Full range VO = 0 MIN TL071BC TL072BC TL074BC V V Large-signal differential voltage amplification B1 Unity-gain bandwidth 25C 3 3 3 3 ri Input resistance 25C 1012 1012 1012 1012 kSVR Common mode Common-mode rejection ratio Supply-voltage rejection ratio (VCC /VIO) VO = 10 V V, RL 2 k 25C 25 Full range 15 200 50 200 50 200 50 200 V/mV 25 25 25 MHz VIC = VICRmin, RS = 50 VO = 0, 25C 70 100 75 100 75 100 75 100 dB VCC = 9 V to 15 V, RS = 50 VO = 0, 25C 70 100 80 100 80 100 80 100 dB 25C 14 1.4 25C 120 ICC Supply current (each amplifier) VO = 0 0, VO1/ VO2 Crosstalk attenuation AVD = 100 No load 2 5 2.5 14 1.4 120 2 5 2.5 14 1.4 120 2 5 2.5 14 1.4 120 2 5 2.5 mA dB All characteristics are measured under open-loop conditions with zero common-mode voltage, unless otherwise specified. Full range is TA = 0C to 70C for TL07_C,TL07_AC, TL07_BC and is TA = -40C to 85C for TL07_I. Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in Figure 4. Pulse techniques must be used that maintain the junction temperature as close to the ambient temperature as possible. 7 SLOS080J - SEPTEMBER 1978 - REVISED MARCH 2005 AVD TL071, TL071A, TL071B, TL072 TL072A, TL072B, TL074, TL074A, TL074B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IIB CMRR Input offset voltage 25C TL071AC TL072AC TL074AC TL071, TL071A, TL071B, TL072 TL072A, TL072B, TL074, TL074A, TL074B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS SLOS080J - SEPTEMBER 1978 - REVISED MARCH 2005 electrical characteristics, VCC = 15 V (unless otherwise noted) PARAMETER TEST CONDITIONS TA TL071M TL072M MIN VIO Input offset voltage VO = 0 0, RS = 50 V Temperature coefficient of input offset voltage VO = 0, RS = 50 IIO Input offset current VO = 0 IO IIB Input bias current VICR Common-mode input voltage range VOM Maximum M i peakk output t t voltage swing 25C TL074M TYP MAX 3 6 Full range MIN TYP 3 9 Full range 18 25C 5 Full range 100 5 25C 65 200 65 25C 11 -12 to 15 11 -12 to 15 RL 10 k 25C 12 13.5 12 13.5 Full range RL 2 k 25C 12 12 10 10 35 200 35 mV V/C 18 50 RL = 10 k 9 15 20 VO = 0 UNIT MAX 100 pA 20 nA 200 pA 50 nA V V 200 AVD Large signal differential Large-signal voltage amplification VO = 10 V V, B1 Unity-gain bandwidth TA = 25C 3 3 1012 1012 RL 2 k 15 V/mV 15 MHz ri Input resistance TA = 25C CMRR Common mode rejection Common-mode ratio VIC = VICRmin, RS = 50 VO = 0, 25C 80 86 80 86 dB kSVR Supply voltage rejection Supply-voltage ratio (VCC/VIO) VCC = 9 V to 15 V, RS = 50 VO = 0, 25C 80 86 80 86 dB ICC Supply current (each amplifier) VO = 0, 25C 1.4 VO1/VO2 Crosstalk attenuation AVD = 100 25C 120 No load 2.5 1.4 120 2.5 mA dB Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in Figure 4. Pulse techniques must be used that will maintain the junction temperature as close to the ambient temperature as possible. All characteristics are measured under open-loop conditions with zero common-mode voltage, unless otherwise specified. Full range is TA = -55C to 125C. 8 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL071, TL071A, TL071B, TL072 TL072A, TL072B, TL074, TL074A, TL074B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS SLOS080J - SEPTEMBER 1978 - REVISED MARCH 2005 operating characteristics, VCC = 15 V, TA = 25C TL07xM PARAMETER TEST CONDITIONS SR Slew rate at unity gain VI = 10 V, CL = 100 pF, RL = 2 k, See Figure 1 tr Rise time overshoot Rise-time factor VI = 20 mV, CL = 100 pF, RL = 2 k, See Figure 1 Vn Equivalent input noise voltage RS = 20 In Equivalent input noise current RS = 20 , f = 1 kHz THD Total harmonic distortion VIrms = 6 V, RL 2 k, f = 1 kHz AVD = 1, RS 1 k, MIN TYP 5 13 ALL OTHERS MAX MAX UNIT MIN TYP 8 13 V/s s 0.1 0.1 20% 20% 18 18 nV/Hz 4 4 V 0.01 0.01 0.003 % 0.003% f = 1 kHz f = 10 Hz to 10 kHz pA/Hz PARAMETER MEASUREMENT INFORMATION 10 k - VI + CL = 100 pF 1 k VO RL = 2 k + RL IN- CL = 100 pF Figure 2. Gain-of-10 Inverting Amplifier Figure 1. Unity-Gain Amplifier - TL071 OUT IN+ N2 + VI - VO N1 100 k 1.5 k VCC- Figure 3. Input Offset-Voltage Null Circuit POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 9 TL071, TL071A, TL071B, TL072 TL072A, TL072B, TL074, TL074A, TL074B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS SLOS080J - SEPTEMBER 1978 - REVISED MARCH 2005 TYPICAL CHARACTERISTICS Table of Graphs FIGURE IIB Input bias current vs Free-air temperature 4 VOM Maximum output voltage vs Frequency vs Free-air Free air temperature vs Load resistance vs Supply voltage 5, 6, 7 8 9 10 AVD Large signal differential voltage amplification Large-signal vs Free-air Free air temperature vs Frequency 11 12 Phase shift vs Frequency 12 Normalized unity-gain bandwidth vs Free-air temperature 13 Normalized phase shift vs Free-air temperature 13 CMRR Common-mode rejection ratio vs Free-air temperature 14 ICC Supply current vs Supply voltage vs Free-air temperature 15 16 PD Total power dissipation vs Free-air temperature 17 Normalized slew rate vs Free-air temperature 18 Vn Equivalent input noise voltage vs Frequency 19 THD Total harmonic distortion vs Frequency 20 Large-signal pulse response vs Time 21 Output voltage vs Elapsed time 22 VO 10 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL071, TL071A, TL071B, TL072 TL072A, TL072B, TL074, TL074A, TL074B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS SLOS080J - SEPTEMBER 1978 - REVISED MARCH 2005 TYPICAL CHARACTERISTICS MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY INPUT BIAS CURRENT vs FREE-AIR TEMPERATURE 100 15 VOM VOM - Maximum Peak Output Voltage - V IIIB- IB Input Bias Current - nA VCC = 15 V 10 1 -50 -25 0 25 50 75 100 VCC = 15 V VCC = 10 V 7.5 IIII VCC = 5 V 5 2.5 125 0 100 1k TA - Free-Air Temperature - C Figure 4 VCC = 15 V 10 15 RL = 2 k TA = 25C See Figure 2 VCC = 10 V 7.5 AA AA AA 5 VCC = 5 V 2.5 0 100 1k 10 k 100 k f - Frequency - Hz 1M 10 M 12.5 10 IIII IIII 10 M VCC = 15 V RL = 2 k See Figure 2 TA = 25C IIIII IIIII TA = -55C 7.5 5 AAA AAA AAA TA = 125C 2.5 0 10 k Figure 6 1M MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY VOM VOM - Maximum Peak Output Voltage - V VOM VOM - Maximum Peak Output Voltage - V IIIII IIIII 12.5 10 k 100 k f - Frequency - Hz Figure 5 MAXIMUM PEAK OUTPUT VOLTAGE vs FREQUENCY 15 RL = 10 k TA = 25C See Figure 2 IIIII 10 AAA AAA 0.1 0.01 -75 12.5 IIIII IIIII 40 k 100 k 400 k 1 M f - Frequency - Hz 4M 10 M Figure 7 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 11 TL071, TL071A, TL071B, TL072 TL072A, TL072B, TL074, TL074A, TL074B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS SLOS080J - SEPTEMBER 1978 - REVISED MARCH 2005 TYPICAL CHARACTERISTICS MAXIMUM PEAK OUTPUT VOLTAGE vs LOAD RESISTANCE MAXIMUM PEAK OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE 15 RL = 10 k IIII IIII 12.5 VOM VOM - Maximum Peak Output Voltage - V VOM - Maximum Peak Output Voltage - V VOM 15 RL = 2 k 10 7.5 5 AA AA 2.5 VCC = 15 V See Figure 2 0 -75 -50 -25 0 25 50 75 100 125 VCC = 15 V TA = 25C See Figure 2 12.5 AA AA 10 7.5 5 2.5 0 0.1 0.2 TA - Free-Air Temperature - C 0.4 1000 RL = 10 k TA = 25C 12.5 400 AVD A VD - Large-Signal Differential Voltage Amplification - V/mV VOM VOM - Maximum Peak Output Voltage - V 7 10 LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION vs FREE-AIR TEMPERATURE 15 10 7.5 5 2.5 200 100 40 20 10 4 2 0 0 2 4 6 8 10 12 14 16 1 -75 VCC = 15 V VO = 10 V RL = 2 k -50 -25 0 25 50 75 100 TA - Free-Air Temperature - C |VCC| - Supply Voltage - V Figure 11 Figure 10 12 4 Figure 9 MAXIMUM PEAK OUTPUT VOLTAGE vs SUPPLY VOLTAGE 2 RL - Load Resistance - k Figure 8 AA AA AA 0.7 1 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 125 TL071, TL071A, TL071B, TL072 TL072A, TL072B, TL074, TL074A, TL074B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS SLOS080J - SEPTEMBER 1978 - REVISED MARCH 2005 TYPICAL CHARACTERISTICS LARGE-SIGNAL DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE SHIFT vs FREQUENCY VCC = 5 V to 15 V RL = 2 k TA = 25C 105 104 0 Differential Voltage Amplification 103 45 102 Phase Shift AVD A VD - Large-Signal Differential Voltage Amplification 106 90 Phase Shift 101 135 1 10 1 100 1k 10 k 100 k f - Frequency - Hz 1M 180 10 M Figure 12 NORMALIZED UNITY-GAIN BANDWIDTH AND PHASE SHIFT vs FREE-AIR TEMPERATURE 1.03 Unity-Gain Bandwidth 1.2 1.01 1.1 1 Phase Shift 1 0.99 0.9 0.8 0.7 -75 1.02 VCC = 15 V RL = 2 k f = B1 for Phase Shift -50 -25 0 25 50 75 100 TA - Free-Air Temperature - C Normalized Phase Shift Normalized Unity-Gain Bandwidth 1.3 0.98 0.97 125 Figure 13 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 13 TL071, TL071A, TL071B, TL072 TL072A, TL072B, TL074, TL074A, TL074B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS SLOS080J - SEPTEMBER 1978 - REVISED MARCH 2005 TYPICAL CHARACTERISTICS SUPPLY CURRENT PER AMPLIFIER vs SUPPLY VOLTAGE COMMON-MODE REJECTION RATIO vs FREE-AIR TEMPERATURE 2 VCC = 15 V ICC - Supply Current Per Amplifier - mA I CC CMRR - Common-Mode Rejection Ratio - dB 89 RL = 10 k 88 87 86 85 83 -75 1.6 1.4 1.2 1 0.8 AA AA 84 -50 -25 0 25 50 75 100 TA = 25C No Signal No Load 1.8 0.6 0.4 0.2 0 125 0 2 TA - Free-Air Temperature - C 4 Figure 14 VCC = 15 V No Signal No Load 1.8 14 16 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 VCC = 15 V No Signal No Load 225 200 175 TL074 150 125 IIII IIII 100 TL072 75 TL071 50 25 -50 -25 0 25 50 75 100 125 0 -75 -50 -25 0 25 50 75 100 TA - Free-Air Temperature - C Figure 16 14 12 250 TA - Free-Air Temperature - C 10 TOTAL POWER DISSIPATION vs FREE-AIR TEMPERATURE PD PD - Total Power Dissipation - mW ICC - Supply Current Per Amplifier - mA I CC 2 0 -75 8 Figure 15 SUPPLY CURRENT PER AMPLIFIER vs FREE-AIR TEMPERATURE AAA AAA AAA 6 |VCC| - Supply Voltage - V Figure 17 Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 125 TL071, TL071A, TL071B, TL072 TL072A, TL072B, TL074, TL074A, TL074B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS SLOS080J - SEPTEMBER 1978 - REVISED MARCH 2005 TYPICAL CHARACTERISTICS NORMALIZED SLEW RATE vs FREE-AIR TEMPERATURE AAA AAA AAA AAA Vn V nV/ Hz n - Equivalent Input Noise Voltage - nV/Hz Normalized Slew Rate - V/ s 1.15 VCC = 15 V RL = 2 k CL = 100 pF 1.10 1.05 1 0.95 0.90 0.85 -75 EQUIVALENT INPUT NOISE VOLTAGE vs FREQUENCY 50 VCC = 15 V AVD = 10 RS = 20 TA = 25C 40 30 20 10 0 -50 -25 0 25 50 75 100 10 125 40 100 TA - Free-Air Temperature - C Figure 18 6 VCC = 15 V AVD = 1 VI(RMS) = 6 V TA = 25C 0.1 0.04 0.01 0.004 0.001 100 400 1k 4 k 10 k f - Frequency - Hz VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE VI and VO - Input and Output Voltages - V THD - Total Harmonic Distortion - % 0.4 40 k 100 k Figure 19 TOTAL HARMONIC DISTORTION vs FREQUENCY 1 400 1 k 4 k 10 k f - Frequency - Hz 40 k 100 k VCC = 15 V RL = 2 k CL = 100 pF TA = 25C 4 Output 2 0 AA AA AA AA III III -2 Input -4 -6 0 0.5 1 1.5 t - Time - s 2 2.5 3 3.5 Figure 21 Figure 20 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 15 TL071, TL071A, TL071B, TL072 TL072A, TL072B, TL074, TL074A, TL074B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS SLOS080J - SEPTEMBER 1978 - REVISED MARCH 2005 TYPICAL CHARACTERISTICS OUTPUT VOLTAGE vs ELAPSED TIME 28 24 VO V O - Output Voltage - mV Overshoot 20 90% 16 12 AAA AAA 8 4 VCC = 15 V RL = 2 k TA = 25C 10% 0 tr -4 0 0.1 0.2 0.3 0.4 0.5 t - Elapsed Time - s 0.6 Figure 22 16 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 0.7 TL071, TL071A, TL071B, TL072 TL072A, TL072B, TL074, TL074A, TL074B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS SLOS080J - SEPTEMBER 1978 - REVISED MARCH 2005 APPLICATION INFORMATION Table of Application Diagrams PART NUMBER FIGURE 0.5-Hz square-wave oscillator TL071 23 High-Q notch filter TL071 24 Audio-distribution amplifier TL074 25 100-kHz quadrature oscillator TL072 26 AC amplifier TL071 27 APPLICATION DIAGRAM RF = 100 k VCC+ - Output - TL071 CF = 3.3 F Input R1 R2 C3 + -15 V R1 + R2 + 2R3 + 1.5 MW R3 C1 C2 9.1 k 1 2p R F C F Figure 23. 0.5-Hz Square-Wave Oscillator C1 + C2 + C3 + 110 pF 2 1 + 1 kHz fO + 2p R1 C1 Figure 24. High-Q Notch Filter VCC+ - 1 M TL074 VCC+ + VCC- - 1 F TL074 VCC+ + 100 k Output B VCC- VCC+ VCC+ 100 k TL074 Output C + 100 F TL074 VCC- 100 k + 100 k - Input Output A - f+ Output VCC- 1 k 3.3 k TL071 + 15 V 3.3 k VCC- Figure 25. Audio-Distribution Amplifier POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 17 TL071, TL071A, TL071B, TL072 TL072A, TL072B, TL074, TL074A, TL074B LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS SLOS080J - SEPTEMBER 1978 - REVISED MARCH 2005 APPLICATION INFORMATION 1N4148 6 sin t 18 k (see Note A) -15 V 18 pF 18 pF 1 k VCC+ VCC+ - 88.4 k TL072 - + 6 cos t TL072 + 88.4 k VCC- 1 k 18 pF VCC- 15 V 1N4148 18 k (see Note A) 88.4 k NOTE A: These resistor values may be adjusted for a symmetrical output. Figure 26. 100-kHz Quadrature Oscillator VCC+ 0.1 F 10 k 10 k IN- 1 M - TL071 50 + IN+ 0.1 F 10 k N2 N1 100 k Figure 27. AC Amplifier 18 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 OUT PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty 10 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) 8102304HA OBSOLETE TBD Call TI Call TI -55 to 125 81023052A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 81023052A TL072MFKB 8102305HA ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 8102305HA TL072M 8102305PA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 8102305PA TL072M 81023062A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 81023062A TL074MFKB 8102306CA ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 8102306CA TL074MJB 8102306DA ACTIVE CFP W 14 1 TBD A42 N / A for Pkg Type -55 to 125 8102306DA TL074MWB JM38510/11905BPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510 /11905BPA JM38510/11906BCA OBSOLETE CDIP J 14 TBD Call TI Call TI -55 to 125 M38510/11905BPA ACTIVE CDIP JG 8 TBD A42 N / A for Pkg Type -55 to 125 TL071-W ACTIVE WAFERSALE YS 0 TBD Call TI Call TI TL071ACD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 071AC TL071ACDE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 071AC TL071ACDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 071AC TL071ACDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 071AC TL071ACDRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 071AC TL071ACDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 071AC TL071ACP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL071ACP 1 Addendum-Page 1 JM38510 /11905BPA Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) TL071ACPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL071ACP TL071BCD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 071BC TL071BCDE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 071BC TL071BCDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 071BC TL071BCDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 071BC TL071BCDRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 071BC TL071BCDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 071BC TL071BCP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL071BCP TL071BCPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL071BCP TL071CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL071C TL071CDE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL071C TL071CDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL071C TL071CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL071C TL071CDRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL071C TL071CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL071C TL071CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL071CP TL071CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL071CP TL071CPSR ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T071 Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) TL071CPSRE4 ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T071 TL071CPSRG4 ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T071 TL071CPWLE OBSOLETE TSSOP PW 8 TBD Call TI Call TI 0 to 70 TL071ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL071I TL071IDE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL071I TL071IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL071I TL071IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL071I TL071IDRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL071I TL071IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL071I TL071IJG OBSOLETE CDIP JG 8 TBD Call TI Call TI -40 to 85 TL071IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 TL071IP TL071IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 TL071IP TL071MFKB OBSOLETE LCCC FK 20 TBD Call TI Call TI -55 to 125 TL071MJG OBSOLETE CDIP JG 8 TBD Call TI Call TI -55 to 125 TL071MJGB OBSOLETE CDIP JG 8 TBD Call TI Call TI -55 to 125 TL072ACD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 072AC TL072ACDE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 072AC TL072ACDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 072AC TL072ACDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 072AC TL072ACDRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 072AC Addendum-Page 3 Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 Device Marking (4/5) TL072ACDRG4 ACTIVE SOIC D 8 072AC TL072ACJG OBSOLETE CDIP JG 8 TBD Call TI Call TI 0 to 70 TL072ACP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL072ACP TL072ACPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL072ACP T072A TL072ACPSR OBSOLETE SO PS 8 TBD Call TI Call TI 0 to 70 TL072ACPSRE4 OBSOLETE SO PS 8 TBD Call TI Call TI 0 to 70 TL072ACPSRG4 OBSOLETE SO PS 8 TBD Call TI Call TI 0 to 70 TL072BCD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 072BC TL072BCDE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 072BC TL072BCDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 072BC TL072BCDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 072BC TL072BCDRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 072BC TL072BCDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 072BC TL072BCP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL072BCP TL072BCPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL072BCP TL072CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL072C TL072CDE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL072C TL072CDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL072C TL072CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL072C TL072CDRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL072C Addendum-Page 4 Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) TL072CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL072C TL072CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL072CP TL072CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL072CP TL072CPSLE OBSOLETE SO PS 8 TBD Call TI Call TI 0 to 70 TL072CPSR ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T072 TL072CPSRE4 ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T072 TL072CPSRG4 ACTIVE SO PS 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T072 TL072CPWR ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T072 TL072CPWRE4 ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T072 TL072CPWRG4 ACTIVE TSSOP PW 8 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T072 TL072ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL072I TL072IDE4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL072I TL072IDG4 ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL072I TL072IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL072I TL072IDRE4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL072I TL072IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL072I TL072IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 TL072IP TL072IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 TL072IP Addendum-Page 5 Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) TL072MFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 81023052A TL072MFKB TL072MJG ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 TL072MJG TL072MJGB ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type -55 to 125 8102305PA TL072M TL072MUB ACTIVE CFP U 10 1 TBD A42 N / A for Pkg Type -55 to 125 8102305HA TL072M TL074ACD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074AC TL074ACDE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074AC TL074ACDG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074AC TL074ACDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074AC TL074ACDRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074AC TL074ACDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074AC TL074ACJ OBSOLETE CDIP J 14 TBD Call TI Call TI 0 to 70 TL074ACN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL074ACN TL074ACNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL074ACN TL074ACNSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074A TL074ACNSRE4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074A TL074ACNSRG4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074A TL074BCD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074BC TL074BCDE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074BC Addendum-Page 6 Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) TL074BCDG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074BC TL074BCDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074BC TL074BCDRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074BC TL074BCDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074BC TL074BCN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL074BCN TL074BCNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL074BCN TL074CD ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074C TL074CDE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074C TL074CDG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074C TL074CDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU | CU SN Level-1-260C-UNLIM 0 to 70 TL074C TL074CDRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074C TL074CDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074C TL074CN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL074CN TL074CNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 TL074CN TL074CNSR ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074 TL074CNSRE4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074 TL074CNSRG4 ACTIVE SO NS 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 TL074 TL074CPW ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T074 Addendum-Page 7 Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) TL074CPWE4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T074 TL074CPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T074 TL074CPWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI 0 to 70 TL074CPWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T074 TL074CPWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T074 TL074CPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 T074 TL074ID ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL074I TL074IDE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL074I TL074IDG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL074I TL074IDR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL074I TL074IDRE4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL074I TL074IDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TL074I TL074IJ OBSOLETE CDIP J 14 TBD Call TI Call TI -40 to 85 TL074IN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 TL074IN TL074INE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -40 to 85 TL074IN TL074MFK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 TL074MFK TL074MFKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 81023062A TL074MFKB TL074MJ ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 TL074MJ TL074MJB ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 8102306CA TL074MJB Addendum-Page 8 Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty TL074MWB ACTIVE CFP W 14 TL081-W ACTIVE WAFERSALE YS 0 1 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) TBD A42 N / A for Pkg Type TBD Call TI Call TI Op Temp (C) Device Marking (4/5) -55 to 125 8102306DA TL074MWB (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 9 Samples PACKAGE OPTION ADDENDUM www.ti.com 18-Oct-2013 OTHER QUALIFIED VERSIONS OF TL072, TL072M, TL074, TL074M : * Catalog: TL072, TL074 * Enhanced Product: TL072-EP, TL072-EP, TL074-EP, TL074-EP * Military: TL072M, TL074M NOTE: Qualified Version Definitions: * Catalog - TI's standard catalog product * Enhanced Product - Supports Defense, Aerospace and Medical Applications * Military - QML certified for Military and Defense Applications Addendum-Page 10 PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant TL071ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL071BCDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL071CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL071CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL071CPSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1 TL071IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL072ACDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL072BCDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL072CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL072CPWR TSSOP PW 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 Q1 TL072IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1 TL074ACDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TL074ACNSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1 TL074BCDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TL074CDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TL074CDRG4 SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 TL074CPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TL074IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 24-Apr-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TL071ACDR SOIC D 8 2500 340.5 338.1 20.6 TL071BCDR SOIC D 8 2500 340.5 338.1 20.6 TL071CDR SOIC D 8 2500 340.5 338.1 20.6 TL071CDR SOIC D 8 2500 367.0 367.0 35.0 TL071CPSR SO PS 8 2000 367.0 367.0 38.0 TL071IDR SOIC D 8 2500 340.5 338.1 20.6 TL072ACDR SOIC D 8 2500 340.5 338.1 20.6 TL072BCDR SOIC D 8 2500 340.5 338.1 20.6 TL072CDR SOIC D 8 2500 367.0 367.0 35.0 TL072CPWR TSSOP PW 8 2000 367.0 367.0 35.0 TL072IDR SOIC D 8 2500 340.5 338.1 20.6 TL074ACDR SOIC D 14 2500 333.2 345.9 28.6 TL074ACNSR SO NS 14 2000 367.0 367.0 38.0 TL074BCDR SOIC D 14 2500 333.2 345.9 28.6 TL074CDR SOIC D 14 2500 333.2 345.9 28.6 TL074CDRG4 SOIC D 14 2500 333.2 345.9 28.6 TL074CPWR TSSOP PW 14 2000 367.0 367.0 35.0 TL074IDR SOIC D 14 2500 333.2 345.9 28.6 Pack Materials-Page 2 MECHANICAL DATA MCER001A - JANUARY 1995 - REVISED JANUARY 1997 JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE 0.400 (10,16) 0.355 (9,00) 8 5 0.280 (7,11) 0.245 (6,22) 1 0.063 (1,60) 0.015 (0,38) 4 0.065 (1,65) 0.045 (1,14) 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.130 (3,30) MIN 0.023 (0,58) 0.015 (0,38) 0-15 0.100 (2,54) 0.014 (0,36) 0.008 (0,20) 4040107/C 08/96 NOTES: A. B. C. D. E. All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. This package can be hermetically sealed with a ceramic lid using glass frit. Index point is provided on cap for terminal identification. Falls within MIL STD 1835 GDIP1-T8 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as "components") are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. 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