DRC-10520 HIGH POWER 16-BIT D/R CONVERTER FEATURES DESCRIPTION The DRC-10520 is a 16 bit, 32 pin triple DIP D/R converter with 2 VA drive capability. It features a power amplifier that may be driven by a standard 15 VDC power supply or by the reference source (when used with the optional power transformer DDC/PN 29306). The DRC-10520 provides compatibility with microprocessors through its 8-bit 2-byte transparent input latch. Data input is natural binary angles in TTL compatible parallel positive logic format. The DRC-10520 is comprised of a high accuracy D/R converter and a dual power amplifier stage that has high accuracy and low scale factor variation. In addition, a standard BIT circuit provides a digital overcurrent +15 V DC signal output. A logic "0" BIT output indicates an overcurrent condition in the sine or cosine outputs. Reference inputs are scalable with external resistors. Loss of the reference signal will not damage the converter. * 2 VA Drive Capacity * 8-Bit/2-Byte Double Buffered Transparent Latch APPLICATION * Resolution: 16 Bits The DRC-10520 can be used where digitized shaft angle data must be converted to an analog format for driving control transformers. With its built-in input latches, the DRC-10520 is especially compatible with a microprocessor-based system including flight simulators, flight instrumentation, fire control systems, radar and navigation systems, and air data computers. +V OR +15 -15 V DC Accuracy: to 1 Minute * Power Amplifier Uses AC Reference or DC Supplies * BIT Output -V OR -15 DRC-10520 D/R CONVERTER HIGH ACCURACY LOW SCALE FACTOR VARIATION RH RL DUAL HI POWER AMPLIFIERS S C SIN COS OPTIONAL SCOTT-T TRANSFORMER BIT BIT 1-16 LOGIC "0" INDICATES OVER CURRENT TRANSPARENT LATCH TRANSPARENT LATCH LM LA BITS 1-8 BITS 9-16 LL DRC-10520 BLOCK DIAGRAM (c) 1985, 1999 Data Device Corporation SYNCHRO OUTPUT TECHNICAL INFORMATION INTRODUCTION TABLE 1. DRC-10520 SPECIFICATIONS Apply over temperature range power supply ranges reference voltage and frequency range and 10% harmonic distortion in the reference. 16 bits The DRC-10520 is a digital-to-resolver (D/R) converter which has an inherently high accuracy and low scale factor variation. The circuit is based on an algorithm whose theoretical math error is only 3.5 arc seconds and whose theoretical scale factor variation with angle is less than 0.015%. Therefore accuracy and scale factor are limited only by the physical components, not by the algorithm. 1 or 4 minutes 10 minutes (1.5 VA min for CT load) 16 minutes (2 VA min for CT load) 1 LSB Less than 40 sec for any digital input step change The digital inputs are CMOS double buffered transparent latches (FIGURE 1). Angular output is determined by adding bits in the logic 1 state. PARAMETER RESOLUTION ACCURACY AND DYNAMICS Output Accuracy Without Scott-T With Scott-T P/N29305 Differential Linearity Output Settling Time DIGITAL INPUT Logic Type Logic Voltage level Load Current Timing REFERENCE INPUT Type Voltage Frequency Input Impedance Single Ended Differential ANALOG OUTPUT Type Output Current Max Output Voltage (tracks reference input voltage) Scale Factor Variation DC Offset (each line to ground) Protection POWER SUPPLIES Voltage Voltage Limits Max Voltage Without Damage Current Peak Current At Power Turn On or Short Circuit (when using Transformer) TEMPERATURE RANGES Operating (-3xx) (-1xx) Storage PHYSICAL CHARACTERISTICS Package Type Size Weight VALUE REFERENCE LEVEL ADJUSTMENT Natural binary angle parallel positive logic CMOS and TTL compatible. Inputs are CMOS transient protected. Logic 0 = 0 to +1.25 V Logic 1 = 2 V to 5 V 20 A max to GND (bit 1-16) 20 A max to VL (LL LM LA) See Timing Diagram (FIGURE 2 ). The input is specified for operation at a reference level of 3.4 V rms; however, reference levels other than 3.4 V rms may be scaied by calculating the value of the scaling resistor with the following equation: RREF = Differential 3.4 V rms Higher voltages are scaled by adding series resistors DC to 1 kHz (VREF - 3.4) x 13k 3.4 eg., if VREF = 26 V rms, then RREF = R REF 13 k 0.5% 26 k 0.5% REF INPUT R REF Resolver 300 mA rms min (2 VA min) 15 mV max varies with input angle. Output is protected from overcurrent short circuits and voltage feedback transients. +18 V 20 mA max RH DRC-10520 R L The output is 6.8 V rms line-to-line resolver format signal which may be converted into a synchro format of 11.8 V Iine-to-line with the companion Scott-T transformer module available as DDC P/N 29305. 6.8 V rms max line-to-line 1% Simultaneous amplitude variation in all output lines as function of digital angle is 0.1% max. +15 V +5% (26 - 3.4) x 13k 3.4 DRIVING THE POWER AMPLIFIER WITH THE REFERENCE The high power amplifier stage can be driven by a standard 15 V DC supply or with a high efficiency pulsating power supply derived from the reference voltage source. A companion power transformer DDC P/N 29306, designed to implement the pulsating power source for the DRC-10520, is also available (FIGURE 3). The DRC-10520 will not be damaged by sequencing order in the 15 V, VL supplies or the reference input. -15 V +5% +V -V 20 V peak max 3 V above output voltage min. -18 V +25 V -25 V 20 mA load dependent max 700 mA max 200 ns min. TRANSPARENT 0C to +70C case -55C to +125C case -55C to +135C LATCHED ,,,,,,,,, DATA 1-16 BITS 32 pin triple DIP 1.14 x 1.74 x 0.18 inch (29 x 44 x 4 mm) 1.15 oz (33 g) 50 ns min. 100 ns min. FIGURE 2. LL, LM, LA TIMING DIAGRAM 2 OUTPUT PROTECTION AND BIT THERMAL CONSIDERATIONS The output is protected from overcurrent, short circuits and voltage feedback transients. The BIT circuit detects overcurrent conditions in the sine or cosine resolver output. A logic "0" is used for overcurrent detection. Normal operation is logic "1." The BIT line is normally at logic "1." An overload or short circuit will cause the BIT line to drop after 1 sec when the output current exceeds a peak level of approximately 450 mA. The power stage consists of two power amplifiers: one for the sine output and one for the cosine output. Maximum power stage junction temperature rise occurs at 0 and 180 for the sine output and 90 and 270 for the cosine output. Maximum power dissipation for the hybrid occurs at the interquadrant points: 45, 135, 225, and 315. At these points the total power dissipation of each amplifier is 0.707 max. Therefore, the total power dissipation is 1.41 times the max for any one amplifier. OUTPUT PHASING AND OUTPUT SCALE FACTOR The analog output signals have the following phasing: The thermal resistance junction to the outside of the case is 10.6C/W. For a 2 VA purely inductive load and 15 VDC power supplies, the junction temperature rise is 42C. For a real inductive load (one that has some power dissipation) and using pulsating supplies, the power dissipated is cut in half. The temperature rise is also halved to 21C. sin = (RH-RL) AO [1 + A ()] sin cos = (RH-RL) AO [1 + A ()] cos The output amplifiers simultaneously track reference voltage fluctuations because they are proportional to (RH-RL). The amplitude factor AO is 2 for 6.8 V rms L-L output. The maximum variation in AO from all causes is 0.3%. The term A () represents the variation of the amplitude with the digital input angle. A (), which is called the scale factor variation, is a smooth function of without discontinuities and is less than 0.1% for all values of . The total maximum variation in AO [1 + A ()] is therefore 0.4%. TABLE 2. PIN CONNECTIONS Because the amplitude factor (RH-RL) AO [1 + A ()] varies simultaneously on all output lines, it will not be a source of error when the DRC-10520 is to drive a ratiometric system such as a resolver or synchro. However, if the outputs are used independently, as in x-y plotters, the amplitude variations must be taken into account. PIN FUNCTION PIN FUNCTION PIN FUNCTION 1 2 3 4 5 6 7 8 9 10 11 N.C. N.C. 16 (LSB) COS DIN +V -V 1 (MSB) 2 3 4 12 13 14 15 16 17 18 19 20 21 22 5 6 7 8 LM LL 9 10 11 12 13 23 24 25 26 27 28 29 30 31 32 14 RL RH 15 -15 V GND LA +15 V BIT N.C. R R H 6 3.4 Vrms 7 1 3 REFERENCE SOURCE 400 Hz 21.6 Vrms C.T. 4 2 C-1 + L +SIN 5 D1 D2 D4 D3 29306 33920 S1 +V DRC-10520 35 V DC T-1 6 1 (SYNCHRO ONLY) 6.8 Vrms 2 GND + 5 +COS 4 S 8 C-2 S3 S4 (RESOLVER ONLY) -V R 7 3 T-2 PARTS LIST FOR 400 Hz For T1 and T2 see Ordering Information D1, D2, D3, and D4 = 1N4245 C-1 and C-2 = 22 F, 35 V DC capacitor 29305 32976 *29947 RESOLVER 15 V DIGITAL INPUT FIGURE 3. TYPICAL CONNECTION DIAGRAM UTILIZING PULSATING POWER SOURCE FOR SYNCHRO OUTPUT 3 S2 1.00 MAX (25.4) 0.800 0.005 (20.32 0.13) 3 TYP 32 0.700 0.010 (17.78 0.25) 0.050 TYP (1.27) 1.90 MAX (48.26) 1.700 0.010 (43.18 0.25) 0.100 TYP (2.54) TOL NON-CUM 5 TYP 32 0.02 TYP (0.51) 1.600 0.010 (40.64 0.25) 0.050 TYP (1.27) (3) 0.300 (7.62) 0.90 MAX (22.86) (6) (5) (1) BOTTOM VIEW (6) (2) (7) (3) 0.20 (5.08) 0.40 (10.16) (7) (1) 0.600 0.010 (15.24 0.25) 5 TYP 32 (5) (4) 0.90 MAX (22.86) BOTTOM VIEW 0.600 0.010 (15.24 0.25) (8) (4) (2) PIN 8, 29947 ONLY TERMINALS 0.020 0.002 (0.51 0.05) x 0.187 MIN LG. BRASS SOLDER PLATED 0.100 TYP (2.54) TOL NON-CUM 4-40 INSERT 6 INTERNAL THREADS TERMINALS 0.020 0.002 (0.51 0.05) x 0.187 MIN LG. BRASS SOLDER PLATED 0.52 MAX (13.21) SIDE VIEW SIDE VIEW 0.52 MAX (13.21) FIGURE 4. POWER TRANSFORMER (29306, 33920) MECHANICAL OUTLINE FIGURE 5. OUTPUT SCOTT-T TRANSFORMERS (29305, 29947, 32976) MECHANICAL OUTLINE TABLE 3. TRANSFORMER INFORMATION Freq. Range Drive Input (1-2) Output Phase Shift Rated Load (over -55 to +125C) 4-40 INSERT 6 INTERNAL THREADS POWER TRANSFORMER SCOTT-T TRANSFORMER 29306 33920 29305 29947 32976 400 Hz 10% for all transformers 2 VA for all transformers 6.8 V 6.8 V 26 V 115 V see note 1 see note 1 Synchro 11.8 V L-L Resolver 11.8 V L-L Synchro 90 V L-L note 2 -- note 2 -- -- 1.1 VA 6 min; 2.0 VA 12 min -- 2.0 VA 2 min -- 1.1 VA 4 min Dielectric 250 Vrms 500 Vrms 500 Vrms 500 Vrms withstanding volt. @ 60 Hz @ 60 Hz @ 60 Hz @ 60 Hz (between windings) Weight 1 oz. 1 oz. 2.0 oz. 2.0 oz. Notes: 1. (3-4-5) 20.68 volts Centertapped, 7.5% Regualtion over temperature range. (6-7) 3.4 volts, 5% Regulation over temperature range. 2. Max from winding 1-2 to 6-7 is 5 for ambient temperature -55 to +125C. 4 6.8 V 500 Vrms @ 60 Hz 2.0 oz. 1.140 (28.96) 0.900 (22.86) 16 0.175 MAX (4.45) 0.250 MIN (6.35) 17 15 EQ. SP. 0.100 = 1.500 TOL NUN-CUM (2.54 = 38.1) 1.740 (44.20) 1 32 0.120 0.002 0.120 0.002 (3.05 0.05) (3.05 0.05) BOTTOM VIEW 0.018 0.002 DIA (TYP) (0.46 0.05) SIDE VIEW NOTES: 1. Dimensions shown are in inches (millimeters) 2. Lead identification numbers are for reference only. 3. Lead cluster shall be centered within 0.010 (2.54) of outline dimensions. Lead spacing dimensions apply only at seating plane. 4. Pin material meets solderability requirements of MIL-PRF-38534, Method 2003. 5. Tol 0.005 (0.13) unless otherwise noted. FIGURE 6. DRC-10520 MECHANICAL OUTLINE (32 PIN TRIPLE DIP) 5 ORDERING INFORMATION DRC-10520-XXXX Supplemental Process Requirements: S = Pre-Cap Source Inspection L = Pull Test Q = Pull Test and Pre-Cap Inspection Blank = None of the Above Accuracy: 3 = 4 Minutes 4 = 2 Minutes 5 = 1 Minute Process Requirements: 0 = Standard DDC Processing, no Burn-In (See table below.) 1 = MIL-PRF-38534 Compliant 2 = B* 3 = MIL-PRF-38534 Compliant with PIND Testing 4 = MIL-PRF-38534 Compliant with Solder Dip 5 = MIL-PRF-38534 Compliant with PIND Testing and Solder Dip 6 = B* with PIND Testing 7 = B* with Solder Dip 8 = B* with PIND Testing and Solder Dip 9 = Standard DDC Processing with Solder Dip, no Burn-In (See table below.) Temperature Grade/Data Requirements: 1 = -55C to +125C (Case) 2 = -40C to +85C (Case) 3 = 0C to +70C (Case) 4 = -55C to +125C (Case) with Variables Test Data 5 = -40C to +85C (Case) with Variables Test Data 8 = 0C to +70C (Case) with Variables Test Data *Standard DDC Processing with burn-in and full temperature test -- see table below. STANDARD DDC PROCESSING MIL-STD-883 TEST METHOD(S) CONDITION(S) INSPECTION 2009, 2010, 2017, and 2032 -- SEAL 1014 A and C TEMPERATURE CYCLE 1010 C CONSTANT ACCELERATION 2001 A BURN-IN 1015, Table 1 -- The information in this data sheet is believed to be accurate; however, no responsibility is assumed by Data Device Corporation for its use, and no license or rights are granted by implication or otherwise in connection therewith. Specifications are subject to change without notice. 105 Wilbur Place, Bohemia, New York 11716-2482 For Technical Support - 1-800-DDC-5757 ext. 7389 or 7413 Headquarters - Tel: (631) 567-5600 ext. 7389 or 7413, Fax: (631) 567-7358 Southeast - Tel: (703) 450-7900, Fax: (703) 450-6610 West Coast - Tel: (714) 895-9777, Fax: (714) 895-4988 Europe - Tel: +44-(0)1635-811140, Fax: +44-(0)1635-32264 Asia/Pacific - Tel: +81-(0)3-3814-7688, Fax: +81-(0)3-3814-7689 World Wide Web - http://www.ddc-web.com PRINTED IN THE U.S.A. J-01/97-500 6