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FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2
December 2012
FOD8318
2.5 A Output Current, IGBT Drive Optocoupler
with Active Miller Clamp, Desaturation Detection, and
Isolated Fault Sensing
Features
High noise immunity characterized by common mode
rejection
– 35 kV / µs Minimum Common Mode Rejection
(Vcm = 1500 Vpeak)
2.5 A peak output current driving capability for most
1200 V / 150 A IGBT
Optically isolated fault sensing feedback
Active Miller clamp to shut off the IGBT during high
dv/dt without needing a negative supply voltage
“Soft” IGBT turn-off
Built-in IGBT protection
– Desaturation detection
– Under-voltage lock out (UVLO) protection
Wide supply voltage range from 15 V to 30 V
– Use of P-Channel MOSFETs at output stage
enables output voltage swing close to the supply
rail (rail-to-rail output)
3.3 V / 5 V, CMOS/TTL-compatible inputs
High Speed
– 500 ns max. propagation delay over full operating
temperature ran ge
Extended industrial temperate range, -40°C to 100°C
temperature range
Safety and regulato ry approvals
– UL1577, 4,243 VRMS for 1 min.
– DIN EN/IEC 60747-5-5,1,414 Vpeak working
insulation voltage, 8000 V peak transient isol ation
voltage ratings
RDS(ON) of 1 (typ.) offers lower power dissipation
User configurable: inverting, non-inverting, auto-reset,
auto-shutdown
8 mm creepage and clearance distances
Applications
Industrial inverter
Induction heating
Isolated IGBT drive
Description
The FOD8318 is an advanced 2.5 A output current
IGBT drive optocoupler capable of driving most
1200 V / 150 A IGBTs. It is ideally suited for fast-switch-
ing driving of power IGBTs and MOSFETs used in motor
control inverter applications and high-performance
power systems. It consists of an integrated gate drive
optocoupler featuring low RDS(ON) CMOS transistors to
drive the IGBT from rail to rail and an integrated high-
speed isolated feedback for fau lt sensing. The FOD8318
has an active Miller clamp fuction to shut off the IGBT
during a high dv/dt situation wi thout the need of a nega-
tive supply voltage. It offers critical protection features
necessary for preventing fault conditions that lead to
destructive thermal runaway of IGBTs.
It utilizes Fairchild’s proprietary Optoplanar® coplanar
packaging technology and optimized IC design to
achieve high noise immunity, characterized by high
common mode rejection and power supply rejection
specifications.
The device is housed in a compact 16-pin small outline
plastic package that meets the 8 mm creepage and
clearance requirements.
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 2
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Truth Table
*VOUT is always LOW with ‘clamp’ being active (gate voltage < 2 V above VSS).
Pin Definitions
VIN+ VIN–
UVLO
(VDD2 – VE)DESAT
Detected? FAULT VOUT*
XXActiveXXLOW
XXXYesLOWLOW
LOWXXXXLOW
X HIGH X X X LOW
HIGH LOW Not Active No HIGH HIGH
Pin # Name Description
1V
IN+ Non-inverting gate drive control input
2V
IN– Inverting gate drive control input
3V
DD1 Positive input supply voltage (3 V to 5.5 V)
4 GND1 Input ground
5 RESET Fault reset input
6FAULT
Fault output
7V
LED1+ LED 1 anode (must be left unconnected)
8V
LED1- LED 1 cathode (must be connected to ground)
9V
SS Output supply voltage (negative)
10 VCLAMP Active Miller clamp supply voltage
11 VOGate drive output voltage
12 VSSource of pull-up PMOS transistor
13 VDD2 Positive output supply voltage
14 DESAT Desaturation voltage input
15 VLED2+ LED 2 anode (must be left unconnected)
16 VEOutput supply voltage / IGBT emitter
1
2
3
4
5
6
7
8
VIN+
VIN–
VDD1
GND1
RESET
FAULT
VLED1+
VLED1-
VE
VLED2+
DESAT
VDD2
VS
VO
VCLAMP
VSS
16
15
14
13
12
11
10
9
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 3
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Block Diagram
Driver
V
DD1
V
DD2
V
LED1+
3
13
7
V
S
12
V
O
11
V
SS
9
DESAT
14
V
E
16
V
IN+ 1
V
IN– 2
RESET Fault
UVLO
DESAT
LED1
LED2
Fault Sense
Optocoupler
Gate Drive
Optocoupler
Shield
Shield
5
FAULT
Input IC
Output IC
V
LED2+
6
15
GND1 4
V
LED1–
8
V
SS
V
CLAMP
10
Miller
Clamp
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 4
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Safety and Insulation Ratings
As per DIN EN/IEC 60747-5-5. This optocoupler is suitable for “safe electrical insulation” only within the safety limit
data. Compliance with the safety ratings shall be ensured by means of protective circuits.
Symbol Parameter Min. Typ. Max. Unit
Installation Classifications per DIN VDE 0110/1.89 Table 1
For Rated Mains Voltage < 150 Vrms I–IV
For Rated Mains Voltage < 300 Vrms I–IV
For Rated Mains Voltage < 450 Vrms I–IV
For Rated Mains Voltage < 600 Vrms I–IV
For Rated Mains Voltage < 1000 Vrms I–III
Climatic Classification 40/100/21
Pollution Degree (DIN VDE 0110/1.89) 2
CTI Comparative Tracking Index 175
VPR Input to Output Test Voltage, Method b,
VIORM x 1.875 = VPR, 100 % Production Test with
tm = 1 s, Partial Discharge < 5 pC
2,651 Vpeak
Input to Output Test Voltage, Method a,
VIORM x 1.5 = VPR, Type and Sample Test with
tm = 60 s, Partial Discharge < 5 pC
2,121 Vpeak
VIORM Maximum W o rking Insulation Voltag e 1,414 Vpeak
VIOTM Highest Allowable Over Voltage 8,000 Vpeak
External Creepage 8 mm
External Clearance 8 mm
Insulation Thickness 0.5 mm
Safety Limit Values – Maximum Values Allowed in th e
Event of a Failure
TCase Case Temperature 150 °C
PS,INPUT Input Power 100 mW
PS,OUTPUT Output Power 600 mW
RIO Insulation Resistance at TS, VIO = 500 V 109 ¾
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 5
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Absolute Maximum Ratings (TA = 25 ºC unless otherwise specified)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exp osure to stresses above the reco mmended op erating conditions may affe ct device reliabil ity.
The absolute maximum ratings are stress ratings only.
Notes:
1. Maximum pulse width = 10 µs, maximum duty cycle = 0.2 %.
2. This negative output supply voltage is optional. It’s only needed when negative gate drive is implemented. A schottky
diode is recommended to be connected between VE and VSS to protect against a reverse voltage greater than 0.5 V.
Refer to application information, “6. Active Miller Clamp Function” on page 25.
3. No derating required across temperature range.
4. Derate linearly above 64 °C, free air temperature at a rate of 10.2 mW/°C
5. Functional operation under these conditions is not implied. Permanent damage may occur if the device is subjected
to conditions outside these ratings.
Symbol Parameter Value Units
TSTG Storage Temperature -40 to +125 ºC
TOPR Operating Temperature -40 to +100 ºC
TJJunction Temperature -40 to +125 ºC
TSOL Lead Wave Solde r Temperature
(no solder immersion)
Refer to page 28 for reflow temperature profile.
260 for 10 s ºC
IFAULT Fault Output Current 15 mA
IO(PEAK) Peak Output Current(1) 3A
VE – VSS Negative Output Supply Voltage(2) 0 to 15 V
VDD2 – VEPositive Output Supply V oltage -0.5 to 35 – (VE – VSS)V
VO(peak) Gate Drive Output Voltage -0.5 to 35 V
VDD2 – VSS Output Supply Voltage -0.5 to 35 V
VDD1 Positive Input Supply Voltage -0.5 to 6 V
VIN+, VIN- and VRESET Input Voltages -0.5 to VDD1 V
VFAULT Fault Pin Voltage -0.5 to VDD1 V
VSSource of Pull-up PMOS Transistor Voltage VSS + 6.5 to VDD2 V
VDESAT DESAT Voltage VE to VE + 11 V
ICLAMP Peaking Clampi ng Sinking Current 1.7 A
VCLAMP Miller Clamping Voltage -0.5 to VDD2 V
PDIInput Power Dissipation(3)(5) 100 mW
PDOOutput Power Dissipation(4)(5) 600 mW
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 6
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Note:
6. During power up or down, it is important to ensure that VIN+ remains LOW until both the input and output supply
voltages reach the proper recommended operating voltage to avoid any momentary instability at the output state.
Refer to “Time to Good Power” section on page 25.
Isolation Characteristics
Apply over all recommended conditions, typical value is measured at TA = 25 ºC
Notes:
7. Device is considered a two terminal device: pins 1 to 8 are shorted together and pins 9 to 16 are shorted together.
8. 4,243 VRMS for 1-minute duration is equivalent to 5,091 VRMS for 1-second duration.
9. The Input-Output Isolation Voltage is a dielectric voltage rating as per UL1577. It should not be regarded as an
input-output continuous voltage rating. For the continuous working voltage rating, refer to the equipment level safety
specification or DIN EN/IEC 60747-5 -5 Safety and Insulation Ratings Table on page 4.
Electrical Characteristics
Apply over all recommended conditions; typical value is measured at VDD1 = 5 V, VDD2 – VSS = 30 V, VE – VSS = 0 V,
TA = 25 °C unless otherwise specified.
Symbol Parameter Min. Max. Unit
TAAmbient Operating Temperature -40 +100 ºC
VDD1 Input Supply Voltage(6) 35.5V
VDD2 – VSS Total Output Supply Voltage 15 30 V
VE – VSS Negative Output Supply Voltage 0 15 V
VDD2 – VEPositive Output Supply Voltage(6) 15 30 – (VE – VSS)V
VSSource of Pull-up PMOS Transistor Voltage VSS + 7.5 VDD2 V
Symbol Parameter Conditions Min. Typ. Max. Units
VISO Input-Output Isolation
Voltage TA = 25 ºC , R.H.< 50 %, t = 1.0 min,
II-O ð 10 µA, 50 Hz(7)(8)(9) 4,243 VRMS
RISO Isolation Resistance VI-O = 500 V(7) 1011 ¾
CISO Isolation Capacitance VI-O = 0 V, freq = 1.0 MHz(7) 1pF
Symbol Parameter Conditions Min. Typ. Max. Units Figure
VIN+L, VIN-L,
VRESETL
Logic Low Input Voltages 0.8 V
VIN+H, VIN-H,
VRESETH
Logic High Input Voltages 2.0 V
IIN+L, IIN-L,
IRESETL
Logic Low Input Currents VIN = 0.4 V -0.5 -0.001 mA
IFAULTL FAULT Logic Low Ou tput
Current VFAULT = 0.4 V 5.0 12.0 mA 1, 35
IFAULTH FAULT Logic High Output
Current VFAULT = VDD1 -40 0.002 µA 35
IOH High Level Output Current VO = VDD2 – 3 V -1 -3 A 2, 7, 36
VO = VDD2 – 6 V(10) -2.5 A
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 7
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Notes:
10. Maximum pulse width = 10 µs, maximum duty cycle = 0.2 %.
11. Maximum pulse width = 4.99 ms, maximum duty cycle = 99.8 %.
12.
V
OH
is measured with the DC load current in this testing (maximum pulse width = 1 ms, maximum duty cycle = 20 %).
When driving capacitive loads, VOH approaches VDD as IOH approaches zero units.
13. Positive output supply voltage (VDD2 – VE) should be at least 15 V. This ensures adequate margin in excess of the
maximum under-voltage lockout threshold VUVLO+ of 13.5 V.
14. When VDD2 – VE > VUVLO and output state VO of the FOD8318 is allowed to go HIGH, the DESAT detection feature
is active and provides the primary source of IGBT protection. UVLO is ne eded to ensure DESAT detection is
functional.
15. The blanking time, tBLANK, is adjustable by an external capacitor (CBLANK) where tBLANK = CBLANK * (VDESAT / ICHG).
IOL Low Level Output Current VO = VSS + 3 V 1 3 A 3, 37
VO = VSS + 6 V(11) 2.5 A
IOLF Low Level Output Current
During Fault Condition VO – VSS = 14 V 90 185 230 mA 4, 41
VOH High Level Output Voltage IO = –100 mA
(12)(13)(14) VS –
1.0 V VS –
0.5 V V 5, 7, 38
VOL Low Level Output Volt age IO = 100 mA 0.1 0.5 V 6, 8, 38
IDD1H High Level Supply Current VIN+ = VDD1 = 5.5 V,
VIN– = 0 V 14 17 mA 9, 39
IDD1L Low Level Supply Current VIN+ = VIN- = 0 V,
VDD1 = 5.5 V 23mA
IDD2H High Level Output Supply
Current VO = Open(14) 1 3 mA 10, 1 1,
40
IDD2L Low Level Output Supply
Current VO = Open 0.8 2.8 mA
ISH High Level Source Current IO = 0 mA 0.65 1.5 mA 40
ISL Low Level Source Current IO = 0 mA 0.6 1.4 mA 40
IEL VE Low Level Supply Current -0.5 -0.2 mA 13, 40
IEH VE High Level Supply Current -0.5 -0.25 mA
ICHG Blanking Capacitor Charge
Current VDESAT = 2 V(14)(15) -0.13 - 0.25 -0.37 mA 12, 41
IDSCHG Blanking Capacitor
Discharge Current VDESAT = 7 V 10 36 mA 41
VUVLO+ Under-Vo ltage Lockout
Threshold(14) VO > 5 V at 25 °C 11.5 13.5 V 15, 29,
42
VUVLO- VO < 5 V at 25 °C 9 10 V
UVLOHYS Under-Voltage Lockout
Threshold Hysteresis At 25 °C 0.4 1.5 V
VDESAT DESAT Threshold(14) VDD2 – VE > VUVLO-,
VO < 5 V 6 7 9 V 16, 41
VCLAMP_
THRES
Clamping Threshold Voltage 2.2 V 33, 52
ICLAMPL Clamp Low Level Sinking
Current VO = VSS + 2.5 V 0.35 1.2 A 32, 51
Symbol Parameter Conditions Min. Typ. Max. Units Figure
Electrical Characteristics (Continued)
Apply over all recommended conditions; typical value is measured at VDD1 = 5 V, VDD2 – VSS = 30 V, VE – VSS = 0 V,
TA = 25 °C unless otherwise specified.
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 8
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Switching Characteristics
Apply over all recommended conditions; typical value is measured at VDD1 = 5 V, VDD2 – VSS = 30 V, VE – VSS = 0 V,
TA = 25 °C unless otherwise specified.
Notes:
16. This load condition approximates the gate load of a 1200 V / 150 A IGBT .
17. tPHL propagation delay is measured from the 50 % level on the falling edge of the input pulse (VIN+, VIN-) to the 50 %
level of the falling edge of the VO signal. Refer to Figure 53.
18. tPHL propagation delay is measured from the 50 % level on the rising edge of the input pulse (VIN+, VIN-) to the 50 %
level of the rising edge of the VO signal. Refer to Figure 53.
19. PWD is defined as | tPHL – tPLH | for any given device.
20. The difference between tPHL and tPLH between any two FOD8318 parts under same operating conditions, with equal
loads.
21. This is the amount of time the DESAT threshold must be exceeded before VO begins to go LOW. This is su pply
voltage dependent. Refer to Figure 54.
Symbol Parameter Conditions Min. Typ. Max. Units Figure
tPHL Propagation Delay Time to
Logic Low Output(17) Rg = 10 ¾, Cg =
10 nF,
f = 10 kHz,
Duty Cycle = 50 % (16)
300 500 ns 17, 18,
19, 20,
21, 22,
43, 51
tPLH Propagation Delay Time to
Logic High Output(18) 250 500 ns
PWD Pulse Width Distortion,
| tPHL – tPLH|(19) 50 300 ns
PDD Skew Propagation Delay Difference
Between Any Two Parts or
Channels, ( tPHL – tPLH)(20)
–350 350 ns
tROutput Rise Time (10 % – 90 %) 34 ns 43, 53
tFOutput Fall Time (90 % – 10 %) 34 ns
tDESAT(90 %) DESAT Sense to 90 % VO
Delay(21) Rg = 10 ¾, Cg =
10 nF,
VDD2 – VSS = 30 V
850 ns 23, 44
tDESAT(10 %) DESAT Sense to 10 % VO
Delay(21) 2 3 µs 24, 26,
27, 44
tDESAT(FAULT)DESA T Sense to Low Level F AUL T
Signal Delay(22) 1.8 5 µs 25, 44,
54
tDESAT(LOW) DESAT Sense to DESAT Low
Propagation Delay(23) 850 ns 44
tRESET(FAULT)RESET to High Level FAULT
Signal Delay(24) 3 6 20 µs 28, 45,
54
PWRESET RESET Signal Pulse Width 1.2 µs
tUVLO ON UVLO Turn On Delay(25) VDD2 = 20 V in
1.0ms Ramp 4 µs 29, 46
tUVLO OFF UVLO Turn Off Delay(26) 3µs
tGP Time to Good Power(27) VDD2 = 0 to 30 V in
10 µs Ramp 30 µs 30, 31,
46
| CMH | Common Mode Transient
Immunity at Output High TA = 25 ºC, VDD1 = 5 V ,
VDD2 = 25 V,
VSS = Ground,
VCM = 1500 Vpeak(28)
35 50 kV/µs 48, 49
| CML | Common Mode Tra nsient
Immunity at Output Low TA = 25 ºC, VDD1 = 5 V ,
VDD2 = 25 V,
VSS = Ground,
VCM = 1500 Vpeak(29)
35 50 kV/µs 47, 50
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 9
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
22. This is the amount of time from when the DESAT threshold is exceeded, until the FAULT output goes LOW.
Refer to Figure 54.
23. This is the amount of time the DESAT threshold must be exceeded before VO begins to go LOW and the FAULT
output to go LOW. Refer to Figure 54.
24. This is the amount of time from when RESET is asserted LOW, until FAULT output goes HIGH. Refer to Figure 54.
25. tUVLO ON UVLO turn-on delay is measured from VUVLO+ threshold voltage of the output supply voltage (VDD2) to the
5 V level of the rising edge of the VO signal.
26. tUVLO OFF UVLO turn-off delay is measured from VUVLO– threshold voltage of the output supply voltage (VDD2) to
the 5 V level of the falling edge of the VO signal.
27. tGP time to good power is measured from 13.5 V level of the rising edge of the output supply voltage (VDD2) to the
5 V level of the rising edge of the VO signal.
28. Common mode transient immunity at output HIGH state is the maximum tolerable negative dVcm / dt on the trailing
edge of the common mode pulse, VCM, to assure that the output remains in HIGH state (i.e., VO > 15 V or FAULT
> 2 V).
29.Common mode transient immunity at output LOW state is the maximum positive tolerable dVcm / dt on the leading
edge of the common mode pulse, VCM, to assure that the output remains in a LOW state (i.e., VO < 1.0 V or FAULT
< 0.8 V).
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 10
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Typical Performance Characteristics
I
OH
– OUTPUT HIGH CURRENT (A)
Figure 2. Output High Current (IOH) vs. Temperature
Figure 4. Low Level Output Current (IOLF) vs.
Output Voltage (VO)
Figure 5. Output High Voltage (VOH–VDD2) vs. Temperature
Figure 3. Output Low Current (IOL) vs. Temperature
7
6
5
4
3
2
1
0
-40 -20 0 20 40 60 80 100
T
A
– TEMPERATURE (°C)
V
O
= V
DD2
– 6 V
V
O
= V
DD2
– 3 V
I
OL
– OUTPUT LOW CURRENT (A)
7
6
5
4
3
2
1
0
(V
OH
–V
DD2
) – HIGH OUTPUT VOLTAGE DROP (V)
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
-40 -20 0 20 40 60 80 100
T
A
– TEMPERATURE (°C)
V
O
= V
SS
+ 6 V
V
O
= V
SS
+ 3 V
V
DD2
– V
SS
= 30 V
V
DD1
= 5 V
I
OLF
– LOW LEVEL OUTPUT CURRENT
DURING FAULT CONDITIONS (mA)
225
200
175
150
125
100
75
50
250 5 10 15 20 25 30
V
O
– OUTPUT VOLTAGE (V)
-40 -20 0 20 40 60 80 100
T
A
– TEMPERATURE (°C)
V
DD2
– V
SS
= 30 V
V
DD1
= 5 V
V
DD2
– V
SS
= 30 V
V
DD1
= 5 V
I
FAULTL
– FAULT CURRENT (mA)
Figure 1. Fault Logic Low Output Current (IFAULTL) vs.
Fault Logic Low Output Voltage (VFAULTL)
50
40
30
20
10
001234 5
V
FAULTL
– FAULT VOLTAGE (V)
V
DD1
= 5 V
VIN+ = 5 V
I
LED2+
= 10 mA
T
A
= 25 °C
T
A
= -40 °C
I
O
= -650 μA
I
O
= -100 mA
T
A
= 25 °C
T
A
= 100 °C
V
DD2
– V
SS
= 30 V
V
DD1
= 5 V
V
IN+
= 5 V
V
OL
– OUTPUT LOW VOLTAGE (V)
0.25
0.20
0.15
0.10
0.05
0
-40 -20 0 20 40 60 80 100
T
A
– TEMPERATURE (°C)
V
DD2
– V
SS
= 30 V
V
DD1
= 5 V
V
IN+
= 0 V
I
O
= 100 mA
Figure 6. Output Low Voltage (VOL) vs. Temperature
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 11
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Typical Performance Characteristics (Continued)
Figure 7. Output High Voltage (VOH) vs.
Output High Current (IOH)
Figure 9. Supply Current (IDD1) vs. Temperature Figure 10. Output Supply Current (IDD2) vs. Temperature
Figure 12. Blanking Capacitor Charging Current (ICHG)
vs. Temperature
Figure 11. Output Supply Current (IDD2) vs.
Output Supply Voltage (VDD2)
Figure 8. Output Low Voltage (VOL) vs.
Output Low Current (IOL)
V
OH
– OUTPUT HIGH VOLTAGE (V)
30
29
28
27
26
25 0 0.5 1.0 1.5 2.0 2.5
I
OH
– OUTPUT HIGH CURRENT (A)
V
DD2
– V
SS
= 30 V
V
DD1
= 5 V
V
IN+
= 5 V
I
DD1
– SUPPLY CURRENT (mA)
20
15
10
5
0
-40 -20 0 20 40 60 80 100
T
A
– TEMPERATURE (°C)
V
DD1
= 5.5 V
V
IN+
= 5 V (I
DD1H
) or 0 V (I
DD1L
)
I
DD1H
I
DD1L
T
A
= -40 °C
25 °C
100 °C
I
DD2
– OUTPUT SUPPLY CURRENT (mA)
1.2
1.0
0.8
0.6
0.4
15 20 25 30
V
DD2
– OUTPUT SUPPLY VOLTAGE (V)
V
OL
– OUTPUT LOW VOLTAGE (V)
5
4
3
2
1
0
0 0.5 1.0 1.5 2.0 2.5
I
OL
– OUTPUT LOW CURRENT (A)
V
DD2
– V
SS
= 30 V
V
DD1
= 5 V
V
IN+
= 0 V
-40 °C
25 °C
T
A
= 100 °C
I
DD2
– OUTPUT SUPPLY CURRENT (mA)
1.4
1.2
1.0
0.8
0.6
0.4
-40 -20 0 20 40 60 80 100
T
A
– TEMPERATURE (°C)
V
DD2
– V
SS
= 30 V
V
DD1
= 5 V
V
IN+
= 5 V (I
DD2H
) or 0 V (I
DD2L
)
I
DD2H
I
DD2L
I
DD2H
I
DD2L
V
DD1
= 5 V
V
IN+
= 5 V (I
DD2H
) or 0 V (I
DD2L
)
I
CHG
– BLANKING CAPACITOR CHARGING
CURRENT (mA)
-0.15
-0.20
-0.25
-0.30
-40 -20 0 20 40 60 80 100
T
A
– TEMPERATURE (°C)
V
DD2
– V
SS
= 30 V
V
DD1
= 5 V
V
IN+
= 5 V
V
DESAT
= 0 V to 6 V
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 12
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Typical Performance Characteristics (Continued)
I
S
– SOURCE CURRENT (mA)
3.0
2.5
2.0
1.5
1.0
0.5
00 0.5 1.0 1.5 2.0
I
O
– OUTPUT CURRENT (mA)
V
DESAT
– DESAT THRESHOLD (V)
8.0
7.5
7.0
6.5
6.0
-40 -20 0 20 40 60 80 100
T
A
– TEMPERATURE (°C)
VDD2 – VSS = 30 V
VDD1 = 5 V
VIN+ = 5 V
VDD2 – VSS = 30 V
VDD1 = 5 V
VIN+ = 5 V
-40 °C
25 °C
100 °C
t
P
– PROPAGATION DELAY (μs)
0.5
0.4
0.3
0.2
0.1
Figure 17. Propagation Delay (tP) vs. Temperature
-40 -20 0 20 40 60 80 100
T
A
– TEMPERATURE (°C)
VDD2 – VSS = 30 V
VDD1 = 5 V
f = 10 kHz 50 % Duty Cycle
RL = 10 Ω, CL = 10 nF
tPLH
tPHL
t
P
– PROPAGATION DELAY (μs)
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
Figure 18. Propagation Delay (tP) vs.
Supply Voltage (VDD2)
15 20 25 30
V
DD2
– SUPPLY VOLTAGE (V)
VDD1 = 5 V
f = 10 kHz 50 % Duty Cycle
RL = 10 Ω, CL = 10 nF
tPLH
tPHL
Figure 13. Supply Current (IE) vs. Temperature
Figure 16. DESAT Threshold (VDESAT) vs. Temperature
Figure 14. Source Current (IS) vs. Output Current (IO)
I
E
– SUPPLY CURRENT (mA)
-0.10
-0.15
-0.20
-0.25
-0.30
-0.35
-0.40
-40 -20 0 20 40 60 80 100
T
A
– TEMPERATURE (°C)
VDD2 – VSS = 30 V
VDD1 = 5 V
VIN+ = 5 V (IEH) / 0 V (IEL)
IEL
IEH
Figure 15. Under-Voltage Lockout Threshold (VUVLO)
vs. Temperature
V
UVLO
– UNDER VOLTAGE LOCKOUT THRESHOLD (V)
15
10
5
0
-40 -20 0 20 40 60 80 100
T
A
– TEMPERATURE (°C)
VDD1 = 5 V
VIN+ = 5 V
VUVLO–
VUVLO+
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 13
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Typical Performance Characteristics (Continued)
tP – PROPAGATION DELAY (μs)tDESAT(90 %) – DESAT SENSE TO 90 % VO DELAY (μs)
0.40
0.35
0.30
0.25
0.20
Figure 21. Propagation Delay (tP) vs. Load Capacitance (CL)
0 20406080100
CL – LOAD CAPACITANCE (nF)
VDD2 – VSS = 30 V
VDD1 = 5 V
f = 10 kHz 50 % Duty Cycle
RL = 10 Ω
tPLH
tPHL
tP – PROPAGATION DELAY (μs)
0.40
0.35
0.30
0.25
0.20
Figure 22. Propagation Delay (tP) vs. Load Resistance (RL)
0 1020304050
RL – LOAD RESISTANCE (Ω)
VDD2 – VSS = 30 V
VDD1 = 5 V
f = 10 kHz 50 % Duty Cycle
CL = 10 nF
tPLH
tPHL
tPLH – PROPAGATION DELAY (μs)
0.45
0.40
0.35
0.30
0.25
Figure 19. Propagation Delay to
Logic High Output (tPLH) vs. Temperature
Figure 20. Propagation Delay to
Logic Low Output (tPHL) vs. Temperature
-40 -20 0 20 40 60 80 100
TA – TEMPERATURE (°C)
VDD2 – VSS = 30 V
f = 10 kHz 50 % Duty Cycle
RL = 10 Ω, CL = 10 nF
VDD1 = 4.5 V
VDD1 = 5.0 V
VDD1 = 5.5 V
tPHL – PROPAGATION DELAY (μs)
0.35
0.30
0.25
0.20
0.15
-40 -20 0 20 40 60 80 100
TA – TEMPERATURE (°C)
VDD2 – VSS = 30 V
f = 10 kHz 50 % Duty Cycle
RL = 10 Ω, CL = 10 nF
VDD1 = 4.5 V
VDD1 = 5.0 V
VDD1 = 5.5 V
1.2
1.1
1.0
0.9
0.8
Figure 23. DESAT Sense to 90 % VO (tDESAT(90 %))
vs. Temperature
Figure 24. DESAT Sense to 10 % VO Delay (tDESAT(10 %))
vs. Temperature
-40 -20 0 20 40 60 80 100
TA – TEMPERATURE (°C)
VDD2 – VSS = 30 V
VDD1 = 5 V
VIN+ = 5 V
RL = 10 Ω, CL = 10 nF
tDESAT(10 %) – DESAT SENSE TO 10 % VO DELAY (μs)
3.0
2.5
2.0
1.5
1.0
-40 -20 0 20 40 60 80 100
TA – TEMPERATURE (°C)
VDD2 – VSS = 15 or 30 V
VDD1 = 5 V
VIN+ = 5 V
RL = 10 Ω, CL = 10 nF
VDD2 – VSS = 30 V
VDD2 – VSS = 15 V
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 14
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Typical Performance Characteristics (Continued)
0.0030
0.0250
0.0020
0.0015
0.0010
10 20 30 40 50
R
L
– LOAD RESISTANCE (Ω)
V
DD2
– V
SS
= 15 V or 30 V
V
DD1
= 5 V
V
IN+
= 5 V
C
L
= 10 nF
t
DESAT(10 %)
– DESAT SENSE TO 10 % V
O
DELAY (μs)
V
DD2
– V
SS
= 30 V
V
DD2
– V
SS
= 15 V
t
RESET(FAULT)
– RESET TO HIGH LEVEL FAULT
SIGNAL DELAY (μs)
10
9
8
7
6
5
4
-40 -20 0 20 40 60 80 100
T
A
– TEMPERATURE (°C)
V
DD2
– V
SS
= 30 V
V
IN+
= 5 V
R
L
= 10 Ω, C
L
= 10 nF
V
DD1
= 5.5 V
V
DD1
= 5.0 V
V
DD1
= 4.5 V
Figure 25. DESAT Sense to Low Fault Signal Delay (t
DESAT(FAULT)
)
vs. Temperature
Figure 26. DESAT Sense to 10 % V
O
Delay (t
DESAT(10 %)
)
vs. Load Capacitance (C
L
)
Figure 27. DESAT Sense to 10 % V
O
Delay (t
DESAT(10 %)
)
vs. Load Resistance (R
L
)
Figure 28. RESET to High Level FAULT Signal
Delay (t
RESET(FAULT)
) vs. Temperature
t
DESAT(FAULT)
– DESAT SENSE TO LOW FAULT
SIGNAL DELAY (μs)
2.6
2.4
2.2
2.0
1.8
1.6
-40 -20 0 20 40 60 80 100
T
A
– TEMPERATURE (°C)
V
DD2
– V
SS
= 30 V
V
DD1
= 5 V
V
IN+
= 5 V
R
L
= 10 Ω, C
L
= 10 nF
V
E
– V
SS
= 0 V V
E
– V
SS
= 15 V
0.008
0.006
0.004
0.002
00 5 10 15 20 25 30
C
L
– LOAD CAPACITANCE (nF)
V
DD2
– V
SS
= 15 V or 30 V
V
DD1
= 5 V
V
IN+
= 5 V
R
L
= 10 Ω
t
DESAT(10 %)
– DESAT SENSE TO 10% V
O
V
DD2
– V
SS
= 30 V
V
DD2
– V
SS
= 15 V
Figure 29. Under Voltage Lockout Threshold Delay (t
UVLO
)
vs. Temperature
t
UVLO
– UNDER VOLTAGE LOCKOUT
THRESHOLD DELAY (μs)
10
8
6
4
2
0
-40 -20 0 20 40 60 80 100
T
A
– TEMPERATURE (°C)
V
DD2
= 20 V
V
DD1
= 5 V
V
IN+
= 5 V
f = 50 Hz, 50 % Duty Cycle
t
R
= 1 ms
t
UVLO ON
t
UVLO OFF
Figure 30. Time to Good Power (t
GP
)
vs. Supply Voltage (V
DD2
)
t
GP
– TIME TO GOOD POWER (μs)
100
80
60
40
20
0
15 25
20 30
V
DD2
– SUPPLY VOLTAGE (V)
V
DD1
= 5 V
V
IN+
= 5 V
f = 50Hz, 50 % Duty Cycle
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 15
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Typical Performance Characteristics (Continued)
Figure 31. Time to Good Power (t
GP
)
vs. Temperature
t
GP
– TIME TO GOOD POWER (μs)
120
100
80
60
40
20
0
-40 -20 0 20 40 60 80 100
T
A
– TEMPERATURE (°C)
V
DD2
= 15 V to 30 V
V
DD1
= 5 V
V
IN+
= 5 V
f = 50 Hz 50 % Duty Cycle
Figure 32. Clamp Low Level Sinking Current (I
CLAMPL
)
vs. Temperature
I
CLAMP
– CLAMP LOW LEVEL SINKING
CURRENT (A)
3
2.5
2.0
1.5
1.0
0.5
0
-40 -20 0 20 40 60 80 100
T
A
– TEMPERATURE (°C)
V
DD2
– V
SS
= 30 V
V
DD1
= 5 V
V
IN+
= 5 V
V
CLAMP
= 2.5 V
Figure 33. Clamping Threshold Voltage (V
CLAMP
)
vs. Temperature
VCLAMP – CLAMP PIN THRESHOLD VOLTAGE (V)
2.6
2.4
2.2
2.0
1.8
1.6
1.4
-40 -20 0 20 40 60 80 100
TA – TEMPERATURE (°C)
VDD2 – VSS = 30 V
VDD1 = 5 V
VIN+ = 0 V
Figure 34. Clamp Low Level Sinking Current (I
CLAMPL
)
vs. Clamp Voltage (V
CLAMP
)
ICLAMP – CLAMP LOW LEVEL SINKING
CURRENT (A)
3.0
2.5
2.0
1.5
1.0
0.5
00 0.5 1.0 1.5 2.0 2.5 3.0
VCLAMP – CLAMP VOLTAGE (V)
VDD2 – VSS = 30 V
VDD1 = 5 V
VIN+ = 0 V
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 16
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Test Circuits
Figure 35. Fault Outp ut Current (IFAULTL) and (IFAULTH) Test Circuit
Figure 36. High Level Output Current (IOH) Test Circuit
Figure 37. Low Level Output Current (IOL) Test Circuit
1
2
3
4
5
6
7
8
V
IN+
V
IN–
V
DD1
GND1
RESET
FAULT
V
LED1+
V
LED1-
*
V
E
V
LED2+
DESAT
V
DD2
V
S
V
O
V
CLAMP
V
SS
16
15
14
13
12
11
10
9
FOD8318
Pulse Gen
PW = 10 μs
Period = 5 ms 5 V
–
+
0.1 μF
0.1 μF
47 μF
47 μF 0.1 μF
0.1 μF
+
–
30 V
+
–
V
E
+
–
3 kΩ
V
O
+
–
*Pin 8 (V
LED1-
) is internally connected to pin 4 (GND1).
Pulse Gen
PW = 4.99 ms
Period = 5 ms
1
2
3
4
5
6
7
8
VIN+
VIN–
VDD1
GND1
RESET
FAULT
VLED1+
VLED1-*
VE
VLED2+
DESAT
VDD2
VS
VO
VCLAMP
VSS
16
15
14
13
12
11
10
9
FOD8318
5 V
–
+
0.1 μF
0.1 μF
47 μF
0.1 μF
+
–
30 V
+
–
VE
+
–
3 kΩ
47 μF
0.1 μF
VO
+
–
*Pin 8 (VLED1-) is internally connected to pin 4 (GND1).
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 17
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Test Circuits (Continued)
Figure 38. High Leve l (V OH) an d Lo w Le ve l (V OL) Output Voltage Test Circuit
Figure 39. High Lev e l (IDD1H) and Lo w Level (IDD1L) Supply Current Test Circuit
Figure 40. High Level (IDD2H), Low Level (IDD2L) Output Supply Current,
High Level (ISH), Low Level (ISL) Source Current,
VE High Level (IEH), and VE Low Level (IEL) Supply Current Te st Circuit
1
2
3
4
5
6
7
8
V
IN+
V
IN–
V
DD1
GND1
RESET
FAULT
V
LED1+
V
LED1-
*
V
E
V
LED2+
DESAT
V
DD2
V
S
V
O
V
CLAMP
V
SS
16
15
14
13
12
11
10
9
FOD8318
V
E
V
O
Switch A for V
OH
test
Switch B for V
OL
test
0.1 μF
A
A
B
B
0.1 μF
0.1 μF
100 mA
pulsed
100 mA
pulsed
3 kΩ
5 V
30 V
+
–
+
–
+
–
*Pin 8 (V
LED1-
) is internally connected to pin 4 (GND1).
Switch A for I
DD1H
test
Switch B for I
DD1L
test
1
2
3
4
5
6
7
8
V
IN+
V
IN–
V
DD1
GND1
RESET
FAULT
V
LED1+
V
LED1-
*
V
E
V
LED2+
DESAT
V
DD2
V
S
V
O
V
CLAMP
V
SS
16
15
14
13
12
11
10
9
FOD8318
I
DD1
0.1 μF 5 V
+
–
A
B
*Pin 8 (V
LED1-
) is internally connected to pin 4 (GND1).
Switch A for I
DD2H,
I
SH
and I
EH
test
Switch B for I
DD2L,
I
SL
and I
EL
test
I
DD2
I
S
I
E
1
2
3
4
5
6
7
8
V
IN+
V
IN–
V
DD1
GND1
RESET
FAULT
V
LED1+
V
LED1-
*
V
E
V
LED2+
DESAT
V
DD2
V
S
V
O
V
CLAMP
V
SS
16
15
14
13
12
11
10
9
FOD8318
V
E
V
O
0.1 μF
0.1 μF
0.1 μF
5 V
30 V
+
–
+
–
+
–
A
B
*Pin 8 (V
LED1-
) is internally connected to pin 4 (GND1).
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 18
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Test Circuits (Continued)
Figure 41. Low Level Output Current During Fau lt Conditions (IOLF), Blanking Capacitor Charge Current (ICHG),
Blanking Capacitor Discharging Current (IDSCHG), and DESAT Threshold (VDESAT) Test Circuit
Figure 42. Unde r-Voltage Lockout Threshold (V UVLO) Test Circuit
Figure 43. Propagation Delay (tPLH, tPHL), Pulse Wid th Distortion (PWD),
Rise Time (tR), and Fall Time (tF) Test Circuit
1
2
3
4
5
6
7
8
VIN+
VIN–
VDD1
GND1
RESET
FAULT
VLED1+
VLED1-*
VE
VLED2+
DESAT
VDD2
VS
VO
VCLAMP
VSS
16
15
14
13
12
11
10
9
FOD8318
VE
VDESAT
VO
ICHG/DSCHG
IOLF
0.1 μF
RL
0.1 μF
10 nF
0.1 μF
3 k
Ω
5 V
30 V
+
–
+
–
+
–
+
–
VRL
*Pin 8 (VLED1-) is internally connected to pin 4 (GND1).
1
2
3
4
5
6
7
8
VIN+
VIN–
VDD1
GND1
RESET
FAULT
VLED1+
VLED1-*
VE
VLED2+
DESAT
VDD2
VS
VO
VCLAMP
VSS
16
15
14
13
12
11
10
9
FOD8318
VO
0.1 μF
0.1 μF
5 V
DC Sweep
0 to 15 V
(100 steps)
Parameter
Analyzer
+
–
+
–
*Pin 8 (VLED1-) is internally connected to pin 4 (GND1).
1
2
3
4
5
6
7
8
VIN+
VIN–
VDD1
GND1
RESET
FAULT
VLED1+
VLED1-*
VE
VLED2+
DESAT
VDD2
VS
VO
VCLAMP
VSS
16
15
14
13
12
11
10
9
FOD8318
VE
VO
0.1 μF
0.1 μF
10 nF
0.1 μF
3 k
Ω
RL
5 V
30 V
+
–
+
–
+
–
F = 10 kHz
DC = 50 %
+
–
VCL
*Pin 8 (VLED1-) is internally connected to pin 4 (GND1).
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 19
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Test Circuits (Continued)
Figure 44. DESAT Sense (tDESAT(90 %), tDESAT(10 %)), DESAT Fault (tDESAT(FAULT)), and (tDESAT(LOW)) Test Circuit
Figure 45. Reset Delay (tRESET(FAULT)) Test Circuit
Figure 46. Under-Voltag e Lockout Delay (tUVLO) and Time to Good Power (tGP) Test Circuit
1
2
3
4
5
6
7
8
V
IN+
V
IN–
V
DD1
GND1
RESET
FAULT
V
LED1+
V
LED1-
*
V
E
V
LED2+
DESAT
V
DD2
V
S
V
O
V
CLAMP
V
SS
16
15
14
13
12
11
10
9
FOD8318
V
E
V
O
0.1 μF
0.1 μF
100 pF
10 nF
0.1 μF
3 kΩ RL
5 V
30 V
+
–
+
–
+
–
LOW to HIGH
+
–
V
FAULT
*Pin 8 (V
LED1-
) is internally connected to pin 4 (GND1).
1
2
3
4
5
6
7
8
V
IN+
V
IN–
V
DD1
GND1
RESET
FAULT
V
LED1+
V
LED1-
*
V
E
V
LED2+
DESAT
V
DD2
V
S
V
O
V
CLAMP
V
SS
16
15
14
13
12
11
10
9
FOD8318
V
E
V
O
0.1 μF
0.1 μF
10 nF
0.1 μF
3 kΩ RL
5 V
30 V
+
–
+
–
+
–
V
FAULT
Strobe 8 V
+
–
*Pin 8 (V
LED1-
) is internally connected to pin 4 (GND1).
1
2
3
4
5
6
7
8
V
IN+
V
IN–
V
DD1
GND1
RESET
FAULT
V
LED1+
V
LED1-
*
V
E
V
LED2+
DESAT
V
DD2
V
S
V
O
V
CLAMP
V
SS
16
15
14
13
12
11
10
9
FOD8318
V
E
V
O
V
DD2
**
**1.0 ms ramp for t
UVLO
10 μs ramp for t
GP
0.1 μF
0.1 μF
0.1 μF
3 kΩ
5 V +
–
+
–
+
–
*Pin 8 (V
LED1-
) is internally connected to pin 4 (GND1).
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 20
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Test Circuits (Continued)
Figure 47. Common Mode Low (CML) Test Circuit at LED1 Off
Figure 48. Common Mode High (CMH) Test Circuit at LED1 On
1
2
3
4
5
6
7
8
V
IN+
V
IN–
V
DD1
GND1
RESET
FAULT
V
LED1+
V
LED1-
*
V
E
V
LED2+
DESAT
V
DD2
V
S
V
O
V
CLAMP
V
SS
16
15
14
13
12
11
10
9
FOD8318
SCOPE
V
CM
Floating GND
0.1 μF
0.1 μF
25 V
10 nF
1 kΩ
10 Ω
5 V
300 pF
*Pin 8 (V
LED1-
) is internally connected to pin 4 (GND1).
1
2
3
4
5
6
7
8
V
IN+
V
IN–
V
DD1
GND1
RESET
FAULT
V
LED1+
V
LED1-
*
V
E
V
LED2+
DESAT
V
DD2
V
S
V
O
V
CLAMP
V
SS
16
15
14
13
12
11
10
9
FOD8318
SCOPE
V
CM
Floating GND
0.1 μF
0.1 μF
25 V
10 nF
1 kΩ
10 Ω
5 V
300 pF
*Pin 8 (V
LED1-
) is internally connected to pin 4 (GND1).
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 21
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Test Circuits (Continued)
Figure 49. Commo n Mode High (CMH) Test Circuit at LED2 Off
Figure 50. Comm on Mode Low (CML) Test Circuit at LED2 On
1
2
3
4
5
6
7
8
V
IN+
V
IN–
V
DD1
GND1
RESET
FAULT
V
LED1+
V
LED1-
*
V
E
V
LED2+
DESAT
V
DD2
V
S
V
O
V
CLAMP
V
SS
16
15
14
13
12
11
10
9
FOD8318
V
CM
Floating GND
0.1 μF
0.1 μF
25 V
10 nF
1 kΩ
10 Ω
5 V
300 pF
SCOPE
*Pin 8 (V
LED1-
) is internally connected to pin 4 (GND1).
1
2
3
4
5
6
7
8
V
IN+
V
IN–
V
DD1
GND1
RESET
FAULT
V
LED1+
V
LED1-
*
V
E
V
LED2+
DESAT
V
DD2
V
S
V
O
V
CLAMP
V
SS
16
15
14
13
12
11
10
9
FOD8318
V
CM
Floating GND
0.1 μF
0.1 μF
25 V
10 nF
1 kΩ
10 Ω
750 Ω
5 V
300 pF
SCOPE
9 V
+
–
*Pin 8 (V
LED1-
) is internally connected to pin 4 (GND1).
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 22
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Test Circuits (Continued)
Figure 51. Clamp Low Level Sinking Current (ICLAMPL)
Figure 52. Clamp Pin Threshold Voltage (VCLAMP)
1
2
3
4
5
6
7
8
VIN+
VIN–
VDD1
GND1
RESET
FAULT
VLED1+
VLED1-*
VE
VLED2+
DESAT
VDD2
VS
VO
VCLAMP
VSS
16
15
14
13
12
11
10
9
FOD8318
0 V
0.1 μF
0.1 μF
0.1 μF
3 kΩ
5 V
30 V
+
–
+
–
+
–
+
–
*Pin 8 (VLED1-) is internally connected to pin 4 (GND1).
ICLAMPL
Pulsed
VCLAMP
1
2
3
4
5
6
7
8
V
IN+
V
IN–
V
DD1
GND1
RESET
FAULT
V
LED1+
V
LED1-
*
V
E
V
LED2+
DESAT
V
DD2
V
S
V
O
V
CLAMP
V
SS
16
15
14
13
12
11
10
9
FOD8318
0 V
0.1 μF 0.1 μF
3 kΩ
50 Ω
5 V
30 V
+
–
+
–
+
–
+
–
*Pin 8 (V
LED1-
) is internally connected to pin 4 (GND1).
Initially set S1 to A before connecting 3 V to clamp pin. Then switch to B before sweeping down
to get the V
CLAMP_THRES
, clamping threshold voltage.
Sweep from
3 V to V
CLAMP_THRES
AS1
B
0.1 μF
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 23
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Timing Diagrams
Figure 53. Propagation Delay (tPLH, tPHL), Rise Time (tR), and Fall Time (tF) Timing Diagram
Figure 54. Definitio ns for Fault Res et Inpu t (RESET), Desaturation Voltage Input (DESAT), Output Volt age (VO),
and Fault Output (FAULT) Timing Wa veforms
VIN+
VIN–
VO
2.5 V
0 V
t
R
90 %
50 %
10 %
2.5 V
tPLH tPHL
tF
RESET
VDESAT
VO
t
DESAT (LOW)
FAULT
t
DESAT (90 %)
tDESAT (10 %)
tDESAT (FAULT)
tRESET (FAULT)
50 %
90 %
7 V
10 %
50 %
50 % (0.5 x VDD1)
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 24
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Application Information
Figure 55. Recommended Application Circuit
Functional Description
The functional behavioral of FOD8318 is illustrated by
the detailed internal schematic show n in Figu re 56. This
explains the interaction and sequence of internal and
external signals, together with the timing diagrams.
1. Non-Inverting and Inverting Inputs
There are two CMOS/TTL-compatible inputs, VIN+ and
VIN-, to control the IGBT in non-inverting and inverting
configurations, respectively. When VIN- is set to LOW
state, VIN+ controls the driver output, VO, in non-inverting
configuration. When VIN+ is set to HIGH state, VIN- con-
trols the dr ive r ou tp u t in inverti n g con f i g u r at i on .
The relationship between the inputs and output are
illustrated in the Figure 57.
During normal operation, when no fault is detected, the
FAULT output, which is an open-drain configuration, is
latched to HIGH state. This allows the gate driver to be
controlled by the input logic signa l.
When a fault is detected, the FAULT output is latche d to
LOW state. This condition remains until the inpu t logic is
pulled to LOW and the RESET pin is also pulled LOW for
a period longer than PWRESET.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
+
+–
–
+
–
V
IN+
V
IN–
V
DD1
GND1
RESET
FAULT
V
LED1+
V
LED1-
*
V
E
V
LED2+
DESAT
V
DD2
V
S
V
O
V
CLAMP
V
SS
FOD8318
Micro
Controller
3 kΩ
330 pF
+
–
0.1 μF
5 V
3-Phase
Output
+
–
1 μF 10 μF 100 pF
1 kΩ
1 μF
VDD2 = 15 V
DDESAT
CBLANK
Rg
VF
VCE
VCE
Q1
Q2
*Pin 8 (V
LED1-
) is internally connected to pin 4 (GND1).
V
CLAMP
10
+
–
2 V
25x
V
DD2
13
V
S
12
V
O
11
50x
1x
V
SS
9
DESAT
+
–
–
+
14
250 μA
12 V
V
E
16
V
IN+
1
15
7
V
DD1
3
V
IN–
2
V
LED1–
V
LED+
V
LED2+
8
GND1
5 μs Pulse
Generator
Gate Drive
Optocoupler
Fault Sense
Optocoupler
UVLO Comparator
Delay
Q
RS
4
RESET
5
FAULT
6
V
DESAT
Figure 56. Detailed Internal Schematic
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 25
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
2. Gate Driver Output
A pair of PMOS and NMOS comprise the output driver
stage, which facilitates close to rail-to-rail output swing.
This feature allows a tight co ntrol of gate voltage during
on-state and short-circuit condition. The output driver is
typically to sink 2 A and source 2 A at room temperature.
Due to the low RDS(ON) of the MOSFETs, the power dis-
sipation is reduced as compared to those bipolar-type
driver output stages. The absolute maximum rating of
the output peak current, IO(PEAK), is 3 A; therefore the
careful selection of the gate resistor, Rg, is required to
limit the short-circuit current of the IGBT.
As shown in Figure 56, gate driver output is influenced
by signals from the photodetector circuitry, the UVLO
comparator, and the DE SAT signal s. Unde r no-fault
condition, normal operation resumes while the supply
voltage is above the UVLO threshold, the output of the
photodetector drives the MOSFETs of the output stage.
The logic circuitry of the output stage ensures that the
push-pull devices are never “ON” simul taneously. When
the output of the ph otodetector is HIGH, the output, VO,
is pulled to HIGH state by turning on the PMOS. When
the output of the photodetector is LOW, VO is pulled to
LOW state by turning on the NMOS.
When VDD2 supply goes below VUVLO, which is the des-
ignated UVLO thresh old at the comparator, VO is pulled
down to LOW state regardless of photodetector output.
When desaturation is detected, VO turns off slowly as it
is pulled LOW by the NMOS1X device. The input to the
fault sense circuitry is latched to HIGH state and turns on
the LED. When VO goes below 2 V, the NMOS50X device
turns on again, clamping the IGBT gate firmly to VSS.
The Fault Sense signal remains latched in the HIGH
state until the LED of the gate driver circuitry tu rns off.
3. Desaturation Protection, FAUL T Output
Desaturation detection pr otection ensures the prote ction
of the IGBT at short-circuit by monitoring the collector-
emitter voltage of the IGBT in the half bridge . When the
DESAT voltage goes up and reaches above the thresh-
old voltage, a short-circuit condition is detected and the
driver output stage executes a “so ft” IGBT turn-off an d is
eventually driven LOW, as illustrated in Figure 58. The
FAULT open-drain output is triggered active LOW to
report a desaturation error. It is only cleared by activating
active LOW by the external controller to the RESET
input with the input logic is pulled to LOW.
The DESAT fault detector should be disabled for a short
period (blanking ti me) before the IGBT turns on to allow
the collector voltage to fall be low DESAT threshold. This
blanking period protects against false trigger of the
DESAT while the IGBT is turning on.
The blanking time is controlled by the internal DESAT
charge current, the DESAT voltage threshold, and the
external DESAT capacitor (capacitor between DESAT
and VE pin). The nominal blanking time can be calcu-
lated using external capacitance (CBLANK), FAULT
threshold voltage (VDESAT), and DESAT charge current
(ICHG) as:
tBLANK = CBLANK x VDESAT / ICHG
With a recommended 100 pF DESAT capacitor, the
nominal blanking time is:
100 pF x 7 V / 250 µA = 2.8 µs
4. “Soft” Turn-Off
The soft turn-off feature ensures the safe turn off of the
IGBT under fault conditions. This reduces the voltage
spike on the collector of the IGBT. Without this, the IGBT
would see a heavy spike on the collector and result in
permanent damage to the device.
5. Under-Voltage Lockou t
Under-voltage detection prevents the application of
insufficient gate voltage to the IGBT. This could be dan-
gerous, as it would dri ve the IGBT out of saturation and
into the linear operation where the losses are very high
and quickly overhea ted. This feature ensures the proper
operating of the IGBTs. The outpu t voltage, VO, rema ins
LOW regardless of the inp uts as long as the supp ly volt-
age, VDD2 – VE, is less than VUVLO+. When the supply
voltage falls below VUVLO- , VO goes LOW, as illustrated
in Figure 59.
6. Active Miller Clamp Function
An active Miller clamp feature allows the sinking of the
Miller current to the ground or emitter of the IGBT during
a high-dV/dt situation. Instead of driving the IGBT gate to
a negative supply voltage to increase the safe ty margin,
the device has a dedicated VCLAMP pin to control the
Miller current. During turn-off, the gate voltage of the
IGBT is monitored and the VCLAMP output is activated
when the gate voltage goes below 2 V (relative to VSS).
The Miller clamp NMOS transistor is then turned on and
provides a low resistive path for the Miller current.
This helps prevent a self-turn-on due to the parasitic
Miller capacitor in power switch es. The clamp voltage is
VOL + 2.5 V maximum for a Miller current up to 1200 mA.
In this way, the VCLAMP function does not affect the turn-
off characteristic. It helps to clamp the gate to the LOW
level throughout the turn-off time . During turn-on, where
the input of the driver is activated, the VCLAMP function is
disabled or opened.
7. Time to Good Power
At initial power up, the LED is off and the output of the
gate driver should be in the LOW state. Sometimes race
conditions exist that causes the output to follow the VE
(assuming VDD2 and VE are connected externally), until
all of the circuits in the output IC have stabilized. This
condition can result in output transitions or transients
that are coupled to the driven IGBT. These glitches can
cause the high-side and low-side IGBTs to conduct
shoot-through current that may result in destructive
damage to the power semiconductor devices. Fairchild
has introduced a initial turn-on delay, generally called
“time-to-good power”. T his delay, typically 30 µs, is o nly
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 26
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
present during the initial power-up of the device. Once
powered, the “time-to-good power” delay is determined
by the delay of the UVLO circuitry. If the LED is “ON”
during the i nitial turn-on ac tivation, LOW-to-HIGH transi-
tion at the output of the gate driver only occurs 30 µs
after the VDD2 power is applied.
Figure 57. Input/Output Relationship
Figure 58. Timing Relationship Among DESAT, FAULT, and RESET
Figure 59. UVLO for Output Side
V
O
V
IN–
V
IN+
Normal
Operation Fault Condition Reset
RESET
V
O
FAULT
V
DESAT
V
IN–
0 V
5 V
7 V
0 V
V
IN+
Blanking
Time
V
O
V
DD2
– V
E
5 V
0 V
V
UVLO+
V
UVLO–
V
IN–
V
IN+
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 27
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Ordering Information
All packages are lead free per JEDEC: J-STD-020B standard.
Marking Information
Part Number Package Packing Method
FOD8318 SO 16-Pin Tube (50 units per tube)
FOD8318R2 SO 16-Pin Tape and Reel (750 units per reel)
FOD8318V SO 16-Pin, DIN EN/IEC 60747-5-5 Option Tube (50 units per tube)
FOD8318R2V SO 16-Pin, DIN EN/IEC 60747 -5-5 Option Tape and Reel (750 units per reel)
1
2
8
4
3
5
Definitions
1 Fairchild logo
2 Device number, e.g., ‘83 18’ for FOD8318
3 DIN EN/IEC60747-5-5 option (only appears on
component ordered with this option)
4 Plant code, e.g., ‘D’
5 Last-digit year code, e.g., ‘B’ for 2011
6 Two-digit work week ra nging from ‘01’ to ‘53’
7 Lot traceability code
8 Package assembly code, J
8318
D X YY KK J
V
67
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 28
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Reflow Profile
Profile Freature Pb-Free Assembly Profile
Temperature Minimum (Tsmin)150°C
Temperature Maximum (Tsmax)200°C
Time (tS) from (Tsmin to Tsmax) 60–120 seconds
Ramp-up Rate (tL to tP) 3 °C/second max.
Liquidous Temperature (TL)217°C
Time (tL) Maintained Above (TL) 60–150 seconds
Peak Body Package Temperature 260 °C +0 °C / –5 °C
Time (tP) within 5 °C of 260 °C 30 seconds
Ramp-down Rate (TP to TL) 6 °C/second max.
Time 25 °C to Peak Temperature 8 minutes max.
Time (seconds)
Temperature (°C)
Time 25 °C to Peak
260
240
220
200
180
160
140
120
100
80
60
40
20
0
TL
ts
tL
tP
TP
Tsmax
Tsmin
120
Preheat Area
Max. Ramp-up Rate = 3 °C/s
Max. Ramp-down Rate = 6 °C/s
240 360
©2010 Fairchild Semiconductor Corporation www.fairchildsemi.com
FOD8318 Rev. 1.1.2 29
FOD8318 — 2.5 A Output Current, IGBT Drive Optocoupler with Active Miller Clamp, Desaturation Detection, and Isolated Fault Sensing
Carrier Tape Specification (SOIC-16L OPTO R2 & R2V Option)
Symbol Description Dimmension in mm
WTape Width 24.00 ± 0.30
tTape Thickness 0.30 ± 0.05
Po Sprocket Hole Pitch 4.00 ± 0.10
Do Sprocket Hole Diameter 1.50 + 0.10 / -0
D1 Pocket Hole Diameter 1.50 Min
ESprocket Hole Location 1.75 ± 0.10
FPocket Location 11.50 ± 0.10
P2 2.00 ± 0.10
PPocket Pitch 16.00 ± 0.10
Ao Pocket Dimension 11.10 ± 0.10
Bo 11.00 ± 0.10
Ko 3.20 ± 0.10
K1 2.70 ± 0.10
W1 Cover Tape Width 21.30 ± 0.10
dCover Tape Thickness 0.05 ± 0.01
Max Component Rotation or Tilt 10°
t
K1
Ko
dW1 Bo
Ao
Do Po E
W
F
P
P2
D1
User Direction of Feed
LAND PATTERN
RECOMMENDATION
NOTES: UNLESS OTHERWISE SPECIFIED
A) DRAWING REFERS TO JEDEC MS-013,
VARIATION AA.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF
BURRS, MOLD FLASH AND TIE BAR
PROTRUSIONS
D) DRAWING CONFORMS TO ASME
Y14.5M-1994
E) LAND PATTERN STANDARD:
SOIC127P1030X275-16N
F) DRAWING FILE NAME: MKT-M16FREV2
SCALE: 3:1
7.50
10.30
PIN ONE
INDICATOR
A
(1.42)
0.25
0.25
0.19
1.27
0.40
1 8
16 9
11.63
A
B
C
0.20 C A-B
2X
18
16 9
3.75
0.10 C D
2X
1.27
0.51
0.31
(16X)
0.25 C A-B D
10.30
D
0.64 TYP1.27 TYP
3.0 MAX
0.30±0.15
0.10 C
SEATING PLANE
0.10 C
16X
GAUGE
PLANE
SEATING
PLANE
C
(2.16)
(R0.17)
8°
0°
0.51 TYP
0.33 C
2X 8 TIPS
(R0.17)
9.47
7.31
2.35±0.10
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