FEATURES
●FET INPUT: IB = 50pA max
●LOW OFFSET VOLTAGE: 750µV max
●WIDE SUPPLY RANGE: ±4.5V to ±18V
●SLEW RATE: 10V/µs
●WIDE BANDWIDTH: 4MHz
●EXCELLENT CAPACITIVE LOAD DRIVE
●SINGLE, DUAL, QUAD VERSIONS
General-Purpose
FET-INPUT OPERATIONAL AMPLIFIERS
DESCRIPTION
The OPA131 series of FET-input op amps provides high
performance at low cost. Single, dual, and quad versions in
industry-standard pinouts allow cost-effective design op-
tions.
The OPA131 series offers excellent general-purpose perfor-
mance, including low offset voltage, drift, and good dynamic
characteristics.
Single, dual, and quad versions are available in DIP and SO
packages. Performance grades include commercial and in-
dustrial temperature ranges.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Out D
–In D
+In D
V–
+In C
–In C
Out C
Out A
–In A
+In A
V+
+In B
–In B
Out B
OPA4131
DIP-14, SO-14
AD
BC
1
2
3
4
8
7
6
5
NC
V+
Output
Offset Trim
Offset Trim
–In
+In
V–
OPA131
DIP-8, SO-8
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Out D
–In D
+In D
V–
+In C
–In C
Out C
NC
Out A
–In A
+In A
V+
+In B
–In B
Out B
NC
OPA4131
SOL-16
AD
BC
OPA131
OPA2131
OPA131
OPA2131
OPA4131
OPA4131
OPA4131
1
2
3
4
8
7
6
5
V+
Out B
–In B
+In B
Out A
–In A
+In A
V–
OPA2131
DIP-8, SO-8
A
B
OPA131
OPA2131
OPA4131
SBOS040A – NOVEMBER 1994 – REVISED DECEMBER 2002
www.ti.com
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1994, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NC = No Connection
OPA131, 2131, 4131
2SBOS040A
www.ti.com
SPECIFIED
PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT
PRODUCT PACKAGE-LEAD DESIGNATOR(1) RANGE MARKING NUMBER MEDIA, QUANTITY
Single
OPA131 SO-8 D –40°C to +85°C OPA131UJ OPA131UJ Rails, 100
" " " " " OPA131UJ/2K5 Tape and Reel, 2500
OPA131 SO-8 D –40°C to +85°C OPA131UA OPA131UA Rails, 100
" " " " " OPA131UA/2K5 Tape and Reel, 2500
OPA131 SO-8 D –40°C to +85°C OPA131U OPA131U Rails, 100
" " " " " OPA131U/2K5 Tape and Reel, 2500
Dual
OPA2131 SO-8 D –40°C to +85°C OPA2131UJ OPA2131UJ Rails, 100
" " " " " OPA2131UJ/2K5 Tape and Reel, 2500
OPA2131 SO-8 D –40°C to +85°C OPA2131UA OPA2131UA Rails, 100
" " " " " OPA2131UA/2K5 Tape and Reel, 2500
Quad
OPA4131 DIP-14 N –40°C to +85°C OPA4131PJ OPA4131PJ Rails, 25
" " " " OPA4131PA OPA4131PA Rails, 25
OPA4131 SOL-16 DW –40°C to +85°C OPA4131UA OPA4131UA Rails, 48
" " " " " OPA4131UA/1K Tape and Reel, 1000
OPA4131 SOL-14 D –40°C to +85°C OPA4131NJ OPA4131NJ Rails, 58
" " " " OPA4131NA OPA4131NA Rails, 58
ABSOLUTE MAXIMUM RATINGS(1)
Supply Voltage, V+ to V–.................................................................... 36V
Input Voltage .................................................. (V–) – 0.7V to (V+) + 0.7V
Output Short-Circuit(2) .............................................................. Continuous
Operating Temperature ..................................................–55°C to +125°C
Storage Temperature .....................................................–55°C to +125°C
Junction Temperature...................................................................... 150°C
Lead Temperature (soldering, 10s)................................................. 300°C
NOTES: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability. (2) Short-circuit to ground, one amplifier per package.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
PACKAGE/ORDERING INFORMATION
NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com.
OPA131, 2131, 4131 3
SBOS040A www.ti.com
ELECTRICAL CHARACTERISTICS
At TA = +25°C, VS = ±15V, and RL = 2kΩ, unless otherwise noted.
OPA131UA
OPA2131UA
OPA4131PA, UA, NA
OPA131UJ
OPA2131UJ
OPA4131PJ, NJ
PARAMETER CONDITION MIN TYP MAX MIN TYP MAX UNITS
OFFSET VOLTAGE
Input Offset Voltage ±0.2 ±1✻±1.5 mV
OPA131U model only ±0.2 0.75 mV
vs Temperature(1) Operating Temperature Range ±2±10 ✻✻µV/°C
vs Power Supply VS = ±4.5V to ±18V 50 200 ✻✻ µV/V
OPA131U model only 50 100 µV/V
INPUT BIAS CURRENT(2)
Input Bias Current VCM = 0V +5 ±50 ✻✻ pA
vs Temperature See Typical Characteristic ✻
Input Offset Current VCM = 0V ±1±50 ✻✻ pA
NOISE
Input Voltage Noise
Noise Density, f = 10Hz 21 ✻nV/√Hz
f = 100Hz 16 ✻nV/√Hz
f = 1kHz 15 ✻nV/√Hz
f = 10kHz 15 ✻nV/√Hz
Current Noise Density, f = 1kHz 3 ✻fA/√Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range (V–) + 3 (V+) – 1 ✻✻V
Common-Mode Rejection VCM = –12V to +14V 70 80 ✻✻ dB
OPA131U model only 80 86 dB
INPUT IMPEDANCE
Differential 1010 || 1 ✻Ω || pF
Common-Mode VCM = 0V 1012 || 3 ✻Ω || pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain VO = –12V to +12V 94 110 ✻✻ dB
OPA131U model only 100 110 dB
FREQUENCY RESPONSE
Gain-Bandwidth Product 4 ✻MHz
Slew Rate 10 ✻V/µs
Settling Time 0.1% G = –1, 10V Step, CL = 100pF 1.5 ✻µs
0.01% G = –1, 10V Step, CL = 100pF 2 ✻µs
Total Harmonic Distortion + Noise 1kHz, G = 1, VO = 3.5Vrms 0.0008 ✻%
OUTPUT
Voltage Output, Positive (V+) – 3 (V+) – 2.5 ✻✻ V
Negative (V–) + 3 (V–) + 2.5 ✻✻ V
Short-Circuit Current ±25 ✻mA
POWER SUPPLY
Specified Operating Voltage ±15 ✻V
Operating Voltage Range ±4.5 ±18 ✻✻V
Quiescent Current (per amplifier) IO = 0 ±1.5 ±1.75 ✻±2mA
TEMPERATURE RANGE
Operating Range –55 +125 –55 +125 °C
Storage –55 +125 ✻✻°C
Thermal Resistance,
θ
JA
DIP-8 100 ✻°C/W
SO-8 150 ✻°C/W
DIP-14 80 ✻°C/W
SO-14, SOL-16 110 ✻°C/W
✻ Specifications same as OPA131UA.
NOTES: (1) Ensured by wafer test. (2) High-speed test at TJ = 25°C.
OPA131, 2131, 4131
4SBOS040A
www.ti.com
TYPICAL CHARACTERISTICS
At TA = +25°C, V S = ±15V, and RL = 2kΩ, unless otherwise noted.
POWER SUPPLY AND COMMON-MODE REJECTION
vs FREQUENCY
Frequency (Hz)
Power Supply Rejection (dB)
120
100
80
60
40
20
0
Common-Mode Rejection (dB)
120
100
80
60
40
20
0
10 100 1k 10k 100k 1M
CMR
+PSR
–PSR
CHANNEL SEPARATION vs FREQUENCY
Frequency (Hz)
Channel Separation (dB)
160
140
120
100
80 10 100 1k 10k 100k
Dual and quad devices.
G = 1, all channels.
Quad measured channel
A to D or B to C—other
combinations yield improved
rejection.
R
L
= ∞
R
L
= 2kΩ
OPEN-LOOP GAIN/PHASE vs FREQUENCY
1
120
100
80
60
40
20
0
–20
Voltage Gain (dB)
0
–45
–90
–135
–180
Phase Shift (°)
Frequency (Hz)
10 100 1k 10k 100k 1M 10M
∅
G
INPUT BIAS AND INPUT OFFSET CURRENT
vs TEMPERATURE
Ambient Temperature (°C)
Input Bias and Input Offset Current (pA)
10k
1k
100
10
1
0.1
0.01–75 –50 –25 0 25 50 75 100 125
I
B
I
OS
V
CM
= 0V
INPUT BIAS CURRENT
vs INPUT COMMON-MODE VOLTAGE
Common-Mode Voltage (V)
Input Bias Current (pA)
1k
100
10
1–15 –10 –50 51015
Input bias current is a
function of the voltage
between the V– supply
and the inputs.
V
S
= ±15V
V
S
= ±5V
INPUT VOLTAGE AND CURRENT NOISE
SPECTRAL DENSITY vs FREQUENCY
1
1k
100
10
Voltage Noise (nV/√Hz)
Frequency (Hz)
10 100 1k 10k 100k 1M
1
1k
100
10
Current Noise (fA/√Hz)
1
Voltage Noise
Current Noise
OPA131, 2131, 4131 5
SBOS040A www.ti.com
TYPICAL CHARACTERISTICS (Cont.)
At TA = +25°C, V S = ±15V, and RL = 2kΩ, unless otherwise noted.
QUIESCENT CURRENT AND SHORT-CIRCUIT CURRENT
vs TEMPERATURE
Temperature (°C)
Quiescent Current (mA)
1.8
1.6
1.4
1.2
1
Short-Circuit Current (mA)
40
30
20
10
0
–75 –50 –25 0 25 50 75 100 125
I
SC+
I
SC–
I
Q
V
S
= ±5V
I
Q
V
S
= ±15V
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
Units (%)
Offset Voltage Drift (µV/°C)
–7–6–5–4–3–2–101234567
35
30
25
20
15
10
5
0
Typical production distribution
of packaged units. Single,
dual and quad units included.
OPEN-LOOP GAIN vs TEMPERATURE
Ambient Temperature (°C)
Voltage Gain (dB)
120
115
110
105
100–75 –50 –25 0 25 50 75 100 125
OFFSET VOLTAGE
PRODUCTION DISTRIBUTION
Units (%)
Offset Voltage (µV)
–1400
–1200
–1000
–800
–600
–400
–200
0
200
400
600
800
1000
1200
1400
20
15
10
5
0
Typical production distribution
of packaged units. Single,
dual and quad units included.
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
Frequency (Hz)
THD + Noise (%)
1
0.1
0.01
0.001
0.0001 10 100 1k 10k 100k
G = 1V/V
G = 100V/V
V
O
= 3.5Vrms
G = 10V/V
Bandwidth-
Limited
MAXIMUM OUTPUT VOLTAGE
vs FREQUENCY
1M
Frequency (Hz)
10k 100k
V
S
= ±5V
Maximum output voltage
without slew-rate induced
distortion.
10M
30
20
10
0
Output Voltage (Vp-p)
V
S
= ±15V
OPA131, 2131, 4131
6SBOS040A
www.ti.com
SMALL-SIGNAL STEP RESPONSE
G =1, C
L
= 300pF
200ns/div
50mV/div
TYPICAL CHARACTERISTICS (Cont.)
At TCASE = +25°C, VS = ±15V, and RL = 2kΩ, unless otherwise noted.
LARGE-SIGNAL STEP RESPONSE
G = 1, C
L
= 300pF
5V/div
1µs/div
SMALL-SIGNAL OVERSHOOT
vs LOAD CAPACITANCE
Load Capacitance
Overshoot (%)
50
40
30
20
10
0
100pF 1nF 10nF
R
L
= 2kΩ
Higher R
L
value
generally reduces
overshoot. G = +2 G = –1
G = ±10
G = 1
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
15
14
13
12
11
10
–10
–11
–12
–13
–14
–15 0 5 10 15 20 25 30
Output Current (mA)
Output Voltage Swing (V)
–55°C
–55°C
25°C
125°C
125°C25°C
V
IN
= –15V
V
IN
= 15V
SETTLING TIME vs CLOSED-LOOP GAIN
Closed-Loop Gain (V/V)
Settling Time (µs)
100
10
1–1–10 –100 –1000
VO = 10V Step
RL = 2kΩ
CL = 100pF
0.1%
0.01%
OPA131, 2131, 4131 7
SBOS040A www.ti.com
APPLICATIONS INFORMATION
The OPA131 series op amps are unity-gain stable and
suitable for a wide range of general-purpose applications.
Power-supply pins should be bypassed with 10nF ceramic
capacitors or larger.
The OPA131 series op amps are free from unexpected
output phase-reversal common with FET op amps. Many
FET-input op amps exhibit phase-reversal of the output when
the input common-mode voltage range is exceeded. This can
occur in voltage-follower circuits, causing serious problems
in control-loop applications. All circuitry is completely inde-
pendent in dual and quad versions, assuring normal behavior
when one amplifier in a package is overdriven or short-
circuited.
OFFSET VOLTAGE TRIM
The OPA131 (single op amp version) provides offset volt-
age trim connections on pins 1 and 5. Offset voltage can be
adjusted by connecting a potentiometer as shown in Figure
1. This adjustment should be used only to null the offset of
the op amp, not system offset or offset produced by the
signal source.
V+
V–
100kΩ
OPA131
(Single op amp only)
Trim Range: ±20mV typ
OPA131 6
7
5
4
3
2
1
FIGURE 1. OPA131 Offset Voltage Trim Circuit.
INPUT BIAS CURRENT
The input bias current is approximately 5pA at room tem-
perature and increases with temperature as shown in the
typical characteristic “Input Bias Current vs Temperature.”
Input bias current also varies with common-mode voltage
and power supply voltage. This variation is dependent on the
voltage between the negative power supply and the com-
mon-mode input voltage. The effect is shown in the typical
curve “Input Bias Current vs Common-Mode Voltage.”
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
OPA131P OBSOLETE PDIP P 8 TBD Call TI Call TI
OPA131PA OBSOLETE PDIP P 8 TBD Call TI Call TI
OPA131PJ OBSOLETE PDIP P 8 TBD Call TI Call TI
OPA131U ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA131UA ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA131UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA131UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA131UAE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA131UG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA131UJ ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA131UJ/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA131UJ/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA131UJE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA2131PA OBSOLETE PDIP P 8 TBD Call TI Call TI
OPA2131PJ OBSOLETE PDIP P 8 TBD Call TI Call TI
OPA2131UA ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA2131UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA2131UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA2131UA/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA2131UAE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA2131UAG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA2131UJ ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA2131UJ/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA2131UJ/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA2131UJG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA4131NA ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA4131NAG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
PACKAGE OPTION ADDENDUM
www.ti.com 16-Apr-2009
Addendum-Page 1
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
OPA4131NJ ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA4131NJG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA4131PA ACTIVE PDIP N 14 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
OPA4131PAG4 ACTIVE PDIP N 14 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
OPA4131PJ ACTIVE PDIP N 14 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
OPA4131PJG4 ACTIVE PDIP N 14 25 Green (RoHS &
no Sb/Br) CU NIPDAU N / A for Pkg Type
OPA4131UA ACTIVE SOIC DW 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA4131UA/1K ACTIVE SOIC DW 16 1000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA4131UA/1KG4 ACTIVE SOIC DW 16 1000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
OPA4131UAG4 ACTIVE SOIC DW 16 40 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Apr-2009
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
OPA131UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
OPA131UJ/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
OPA2131UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
OPA2131UJ/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
OPA4131UA/1K SOIC DW 16 1000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
OPA131UA/2K5 SOIC D 8 2500 367.0 367.0 35.0
OPA131UJ/2K5 SOIC D 8 2500 367.0 367.0 35.0
OPA2131UA/2K5 SOIC D 8 2500 367.0 367.0 35.0
OPA2131UJ/2K5 SOIC D 8 2500 367.0 367.0 35.0
OPA4131UA/1K SOIC DW 16 1000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All
semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time
of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
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