Product Folder Sample & Buy Support & Community Tools & Software Technical Documents Reference Design LM3671, LM3671-Q1 SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 LM3671/-Q1 2-MHz, 600-mA Step-Down DC-DC Converter 1 Features 3 Description * The LM3671 step-down DC-DC converter is optimized for powering low voltage circuits from a single Li-Ion cell battery and input voltage rails from 2.7 V to 5.5 V. It provides up to 600-mA load current, over the entire input voltage range. There are several different fixed voltage output options available as well as an adjustable output voltage version range from 1.1 V to 3.3 V. 1 * * * * * * * * * * * * LM3671-Q1 is Qualified for Automotive Applications AEC Q100-Qualified With the Following Results - Device Temperature Grade 1: -40C to +125C Ambient Operating Temperature Range 16-A Typical Quiescent Current 600-mA Maximum Load Capability 2-MHz PWM Fixed Switching Frequency (Typical) Automatic PFM-PWM Mode Switching Internal Synchronous Rectification for High Efficiency Internal Soft Start 0.01-A Typical Shutdown Current Operates from a Single Li-Ion Cell Battery Only Three Tiny Surface-Mount External Components Required (One Inductor, Two Ceramic Capacitors) Current Overload and Thermal Shutdown Protection Available in Fixed Output Voltages and Adjustable Version A high-switching frequency of 2 MHz (typical) allows use of tiny surface-mount components. Only three external surface-mount components, an inductor, and two ceramic capacitors, are required. Device Information(1) 2 Applications * * * * * * * * * * * The device offers superior features and performance for mobile phones and similar portable systems. Automatic intelligent switching between PWM lownoise and PFM low-current mode offers improved system control. During PWM mode, the device operates at a fixed-frequency of 2 MHz (typical). Hysteretic PFM mode extends the battery life by reducing the quiescent current to 16 A (typical) during light load and standby operation. Internal synchronous rectification provides high efficiency during PWM mode operation. In shutdown mode, the device turns off and reduces battery consumption to 0.01 A (typical). PART NUMBER Mobile Phones PDAs MP3 Players W-LAN Portable Instruments Digital Still Cameras Portable Hard Disk Drives Automotive Portable Medical Equipment Handheld Transaction Terminals Wireless Home-Automation Equipment L1: 2.2 PH VIN SW 1 CIN 4.7 PF 2.00 mm x 2.00 mm (NOM) LM3671 LM3671-Q1 SOT-23 (5) 2.90 mm x 1.60 mm (NOM) DSBGA (5) 1.413 mm x 1.083 mm (MAX) (1) For all available packages, see the orderable addendum at the end of the datasheet. Typical Application Circuit: ADJ VIN VOUT 2.7V to 5.5V COUT 10 PF GND CIN 4.7 PF 5 COUT LM3671ADJ GND C1 R1 C2 R2 10 PF 2 FB 3 VOUT SW 1 2 EN L1: 2.2 PH VIN 5 LM3671 BODY SIZE USON (6) Typical Application Circuit: Fixed-Voltage VIN 2.7V to 5.5V PACKAGE LM3671 4 EN FB 3 4 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LM3671, LM3671-Q1 SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 4 4 4 5 5 5 6 7 Absolute Maximum Ratings ...................................... ESD Ratings: LM3671 .............................................. ESD Ratings: LM3671-Q1 ........................................ Recommended Operating Conditions....................... Thermal Information .................................................. Dissipation Ratings ................................................... Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description ............................................ 12 7.1 Overview ................................................................. 12 7.2 Functional Block Diagram ....................................... 12 7.3 Feature Description................................................. 13 7.4 Device Functional Modes........................................ 13 8 Application and Implementation ........................ 16 8.1 Application Information............................................ 16 8.2 Typical Application .................................................. 16 9 Power Supply Recommendations...................... 20 10 Layout................................................................... 21 10.1 Layout Guidelines ................................................. 21 10.2 Layout Example .................................................... 22 10.3 DSBGA Package Assembly and Use ................... 22 11 Device and Documentation Support ................. 23 11.1 11.2 11.3 11.4 11.5 11.6 11.7 Device Support...................................................... Documentation Support ........................................ Related Links ........................................................ Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 23 23 23 23 23 23 23 12 Mechanical, Packaging, and Orderable Information ........................................................... 24 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision R (November 2014) to Revision S Page * Added top nav icon for TI Design .......................................................................................................................................... 1 * Added several new "Applications" ......................................................................................................................................... 1 * moved storage temperature to Abs Max table ...................................................................................................................... 4 * Changed Handling Ratings to ESD Ratings .......................................................................................................................... 4 * Changed RJA for USON from 165C/W to 174.7C/W; for SOT-23 from 130C/W to 165.7C/W, and for DSBGA from 85C/W to 181.0C/W; added additional thermal values ............................................................................................... 5 * Changed RJA values in Dissipation Ratings table ................................................................................................................. 5 Changes from Revision Q (November 2013) to Revision R * Page Added Device Information and Handling Rating tables, Feature Description, Device Functional Modes, Application and Implementation, Power Supply Recommendations, Layout, Device and Documentation Support, and Mechanical, Packaging, and Orderable Information sections; moved some curves to Application Curves section ............. 1 Changes from Revision O (April 2013) to Revision P * 2 Page Changed layout of National Semiconductor Data Sheet to TI format .................................................................................. 22 Submit Documentation Feedback Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 LM3671, LM3671-Q1 www.ti.com SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 5 Pin Configuration and Functions DBV Package 5 Pin SOT-23 Top View SW 5 NKH Package 6-Pin USON FB 4 6 Fb En 1 Pgnd 2 5 Sgnd Vin 3 4 Sw TOP VIEW GND 2 VIN 1 EN 3 YZR Package 5-Pin DSBGA VIN A1 A3 SW EN GND GND B2 B2 C3 C1 A1 A3 FB FB Top View SW C1 C3 VIN EN Bottom View Pin Functions PIN LM3671, LM3671Q1 SOT-23 LM3671 NAME TYPE DESCRIPTION DSBGA USON A1 3 VIN Power Power supply input. Connect to the input filter capacitor (see Input Capacitor Selection). 2 A3 2 GND Ground Ground pin. 3 C1 1 EN Digital Enable pin. The device is in shutdown mode when voltage to this pin is < 0.4 V and enabled when > 1 V. Do not leave this pin floating. 4 C3 6 FB Analog Feedback analog input. Connect directly to the output filter capacitor for fixed voltage versions. For adjustable version external resistor dividers are required (see Typical Application: ADJ Version). The internal resistor dividers are disabled for the adjustable version. 5 B2 4 SW Analog Switching node connection to the internal PFET switch and NFET synchronous rectifier. -- -- 5 SGND Ground Signal ground (feedback ground). 1 Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 Submit Documentation Feedback 3 LM3671, LM3671-Q1 SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) VIN pin: voltage to GND FB, SW, EN pins MIN MAX UNIT -0.2 6 V GND - 0.2 VIN + 0.2 V Continuous power dissipation (3) Internally Limited Junction temperature, TJ-MAX Maximum lead temperature (soldering, 10 sec.) Storage temperature, Tstg (1) (2) (3) -65 125 C 260 C 150 C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office / Distributors for availability and specifications. Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ= 150C (typical) and disengages at TJ= 130C (typical). 6.2 ESD Ratings: LM3671 VALUE V(ESD) (1) (2) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) 2000 Charged-device model (CDM), per JEDEC specification JESD22-C101 (2) 500 Machine model 200 UNIT V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 ESD Ratings: LM3671-Q1 VALUE Human-body model (HBM), per AEC Q100-002 (1) V(ESD) Electrostatic discharge Charged-device model (CDM), per AEC Q100-011 All pins except corner pins 500 Corner pins (1, 3, 4, and 5): SOT-23 750 Corner pins (A1, A3, C1, and C3): DSBGA 750 Machine model (1) 4 UNIT 2000 V 200 AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. Submit Documentation Feedback Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 LM3671, LM3671-Q1 www.ti.com SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 6.4 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) (1) (2) MIN Input voltage (3) MAX UNIT 2.7 5.5 V 0 600 mA Junction temperature, TJ -40 125 C Ambient temperature, TA (4) -40 85 C Recommended load current (1) (2) (3) (4) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to the potential at the GND pin. The input voltage range recommended for ideal applications performance for the specified output voltages are given below: VIN = 2.7 V to 4.5 V for 1.1 V VOUT < 1.5 VIN = 2.7 V to 5.5 V for 1.5 V VOUT < 1.8 VIN = (VOUT + VDROPOUT) to 5.5 V for 1.8 V VOUT 3.3 V where VDROPOUT = ILOAD x (RDSON, PFET + RINDUCTOR). In applications where high power dissipation and/or poor package resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX), the maximum power dissipation of the device in the application (PD-MAX) and the junction to ambient thermal resistance of the package (RJA) in the application, as given by the following equation: TA-MAX = TJ-MAX - (RJA x PD-MAX). Refer to Dissipation Ratings for PD-MAX values at different ambient temperatures. 6.5 Thermal Information LM3671 THERMAL METRIC (1) LM3671 and LM3671-Q1 NKH (USON) DBV (SOT-23 ) YZR (DSBGA) 6 PINS 5 PINS 5 PINS UNIT 174.7 165.7 181.0 C/W RJA Junction-to-ambient thermal resistance RJC(top) Junction-to-case (top) thermal resistance 87.1 116.6 0.9 C/W RJB Junction-to-board thermal resistance 109.0 26.8 110.3 C/W JT Junction-to-top characterization parameter 6.4 13.3 7.4 C/W JB Junction-to-board characterization parameter 109.0 26.3 110.3 C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 6.6 Dissipation Ratings RJA TA 25C POWER RATING TA= 60C POWER RATING TA= 85C POWER RATING 165.7C/W (4 layer board) SOT-23 770 mW 500 mW 310 mW 181C/W (4 layer board) 5-bump DSBGA 1179 mW 765 mW 470 mW 174.7C/W (4 layer board) 6-pin USON 606 mW 394 mW 242 mW Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 Submit Documentation Feedback 5 LM3671, LM3671-Q1 SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 www.ti.com 6.7 Electrical Characteristics Unless otherwise noted, limits apply for for TJ = 25C, and specifications apply to the LM3671MF/TL/LC with VIN = EN = 3.6 V (1) (2) (3) PARAMETER VIN Input voltage TEST CONDITION MIN -40C to 125C, see (4) 4% 2.5% Feedback voltage (fixed) LC -4% 4% Feedback voltage (ADJ) MF (6) -4% 4% Feedback voltage (ADJ) TL PWM mode (5), -40C to 125C PWM mode (5), -40C to 125C -2.5 Line regulation 2.7 V VIN 5.5 V, IO = 10 mA Load regulation 100 mA IO 600 mA, VIN = 3.6 V Internal reference voltage ISHDN Shutdown supply current IQ 5.5 -4% Feedback voltage (fixed) TL VREF MAX -2.5% Feedback voltage (fixed) MF VFB TYP 2.7 DC bias current into VIN 2.5 %/V 0.0013 %/mA V 0.01 EN = 0 V, -40C to 125C 1 No load, device is not switching (FB forced higher than programmed output voltage) V 0.031 0.5 EN = 0 V UNIT A 16 A No load, device is not switching (FB forced higher than programmed output voltage), -40C to 125C 35 RDSON (P) Pin-pin resistance for PFET VIN = VGS = 3.6 V 380 500 m RDSON (N) Pin-pin resistance for NFET VIN = VGS= 3.6 V 250 400 m Open loop (7) ILIM Switch peak current limit VIH Logic high input -40C to 125C VIL Logic low input -40C to 125C IEN Enable (EN) input current OSC Internal oscillator frequency (1) (2) (3) (4) (5) (6) (7) 6 1020 Open loop (7), -40C to 125C 830 1150 1 V 0.4 0.01 -40C to 125C 1 PWM Mode (5) 2 PWM Mode (5), -40C to 125C 1.6 mA 2.6 V A MHz Minimum (MIN) and maximum (MAX) limits are specified by design, test or statistical analysis. Typical (TYP) numbers are not specified, but do represent the most likely norm. The parameters in the electrical characteristic table are tested at VIN = 3.6 V unless otherwise specified. For performance over the input voltage range refer to datasheet curves. Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ= 150C (typical) and disengages at TJ= 130C (typical). The input voltage range recommended for ideal applications performance for the specified output voltages are given below: VIN = 2.7 V to 4.5 V for 1.1 V VOUT < 1.5 VIN = 2.7 V to 5.5 V for 1.5 V VOUT < 1.8 VIN = (VOUT + VDROPOUT) to 5.5 V for 1.8 V VOUT 3.3 V where VDROPOUT = ILOAD x (RDSON, PFET + RINDUCTOR). Test condition: for VOUT less than 2.5 V, VIN = 3.6 V; for VOUT greater than or equal to 2.5 V, VIN = VOUT + 1 V. ADJ version is configured to 1.5 V output. For ADJ output version: VIN = 2.7 V to 4.5 V for 0.9 V VOUT < 1.1 VIN = 2.7 V to 5.5 V for 1.1 V VOUT < 3.3 V Refer to Typical Characteristics for closed-loop data and its variation with regards to supply voltage and temperature. Electrical Characteristics reflects open-loop data (FB = 0 V and current drawn from SW pin ramped up until cycle by cycle current limit is activated). Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current until output voltage drops by 10%. Submit Documentation Feedback Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 LM3671, LM3671-Q1 www.ti.com SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 6.8 Typical Characteristics LM3671MF/TL/LC, circuit of Figure 32, VIN = 3.6 V, VOUT = 1.5 V, TA = 25C, unless otherwise noted. 0.40 EN = VIN EN = GND IOUT = 0 mA TA = 85C 0.35 SHUTDOWN CURRENT (PA) QUIESCENT CURRENT (PA) 20 18 TA = 25C 16 TA = -30C 14 12 0.30 0.25 0.20 VIN = 5.5V 0.15 VIN = 3.6V 0.10 VIN = 2.7V 0.05 10 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0.00 -30 -10 10 30 50 70 90 TEMPERATURE (C) SUPPLY VOLTAGE (V) Figure 1. Quiescent Supply Current vs Supply Voltage Figure 2. Shutdown Current vs Temp Figure 3. Feedback Bias Current vs Temperature Figure 4. Switching Frequency vs Temperature 600 VIN = 2.7V 550 VIN = 4.5V 500 VIN = 3.6V RDS(ON) (m:) 450 PFET 400 VIN = 2.7V 350 300 VIN = 4.5V 250 NFET 200 VIN = 3.6V 150 100 -30 -10 10 30 50 70 90 110 TEMPERATURE (oC) Figure 5. RDS(ON) vs. Temperature Figure 6. Open/Closed Loop Current Limit vs Temperature Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 Submit Documentation Feedback 7 LM3671, LM3671-Q1 SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 www.ti.com Typical Characteristics (continued) LM3671MF/TL/LC, circuit of Figure 32, VIN = 3.6 V, VOUT = 1.5 V, TA = 25C, unless otherwise noted. 1.5300 V OUT = 1.5 V OUTPUT VOLTAGE (V) I OUT = 10 mA 1.5200 1.5100 I OUT = 300 mA 1.5000 I OUT = 500 mA 1.4900 I OUT = 600 mA 1.4800 2.5 3 3.5 4 4.5 5 5.5 SUPPLY VOLTAGE(V) Figure 7. Output Voltage vs. Supply Voltage Figure 8. Output Voltage vs Supply Voltage 1.5300 1.5250 OUTPUT VOLTAGE (V) PFM Mode 1.5200 IOUT = 10 mA 1.5150 1.5100 1.5050 IOUT = 300 mA 1.5000 1.4950 PWM Mode 1.4900 VIN = 3.6V 1.4850 IOUT = 600 mA 1.4800 -30 -10 10 30 VOUT = 1.5V 50 70 90 TEMPERATURE (oC) Figure 9. Output Voltage vs Temperature Figure 10. Output Voltage vs Temperature 1.54 VIN = 3.6V OUTPUT VOLTAGE (V) VOUT = 1.5V PFM Mode 1.52 PWM Mode 1.5 1.48 0 100 200 300 400 500 600 OUTPUT CURRENT (mA) Figure 11. Output Voltage vs Output Current 8 Submit Documentation Feedback Figure 12. Output Voltage vs Output Current Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 LM3671, LM3671-Q1 www.ti.com SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 Typical Characteristics (continued) LM3671MF/TL/LC, circuit of Figure 32, VIN = 3.6 V, VOUT = 1.5 V, TA = 25C, unless otherwise noted. 100 100 VOUT = 1.5V VIN = 2.7V 90 80 VIN = 2.7V 70 VIN = 4.5V 60 VIN = 3.6V 50 EFFICIENCY (%) EFFICIENCY (%) 80 30 10.00 100.00 1000.00 VIN = 3.6V 50 30 1.00 VIN = 4.5V 60 40 0.10 VIN = 3.0V 70 40 20 0.01 VOUT = 1.8V VIN = 3.0V 90 20 0.01 OUTPUT CURRENT (mA) 0.10 1.00 10.00 100.00 1000.00 OUTPUT CURRENT (mA) L = 2.2 H L = 2.2 H Figure 13. Efficiency vs Output Current Figure 14. Efficiency vs Output Current L = 2.2 H L = 2.2 H Figure 15. Efficiency vs Output Current Figure 16. Efficiency vs Output Current 20 mV/DIV AC Coupled VOUT 3.6V VIN 3.0V VOUT = 1.5V IOUT = 400 mA 40 Ps/DIV Figure 17. Line Transient Response (PWM Mode) Figure 18. Line Transient Response (PWM Mode) Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 Submit Documentation Feedback 9 LM3671, LM3671-Q1 SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 www.ti.com Typical Characteristics (continued) LM3671MF/TL/LC, circuit of Figure 32, VIN = 3.6 V, VOUT = 1.5 V, TA = 25C, unless otherwise noted. Figure 19. Load Transient Response (PWM Mode) PFM Mode 0.5 mA to 50 mA PFM Mode 0.5 mA to 50 mA Figure 21. Load Transient Response PFM Mode 0.5 mA to 50 mA Submit Documentation Feedback Figure 22. Load Transient Response PFM Mode 50 mA to 0.5 mA Figure 23. Load Transient Response 10 Figure 20. Load Transient Response (PWM Mode) Figure 24. Load Transient Response Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 LM3671, LM3671-Q1 www.ti.com SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 Typical Characteristics (continued) LM3671MF/TL/LC, circuit of Figure 32, VIN = 3.6 V, VOUT = 1.5 V, TA = 25C, unless otherwise noted. Figure 25. PFM-to-PWM Mode Change by Load Transients Figure 26. PWM-to-PFM Mode Change by Load Transients Figure 27. Start-Up into PWM Mode Figure 28. Start-Up into PFM Mode Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 Submit Documentation Feedback 11 LM3671, LM3671-Q1 SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 www.ti.com 7 Detailed Description 7.1 Overview The LM3671, a high-efficiency step-down DC-DC switching buck converter, delivers a constant voltage from a single Li-Ion battery and input voltage rails from 2.7 V to 5.5 V to portable devices such as cell phones and PDAs. Using a voltage mode architecture with synchronous rectification, the LM3671 has the ability to deliver up to 600 mA depending on the input voltage, output voltage, ambient temperature and the inductor chosen. There are three modes of operation depending on the current required: pulse width modulation (PWM), pulse frequency modulation (PFM), and shutdown. The device operates in PWM mode at load current of approximately 80 mA or higher. Lighter load current cause the device to automatically switch into PFM for reduced current consumption (IQ = 16 A typical) and a longer battery life. Shutdown mode turns off the device, offering the lowest current consumption (ISHUTDOWN = 0.01 A typical). Additional features include soft-start, undervoltage protection, current overload protection, and thermal shutdown protection. As shown in the Figure 35, only three external power components are required for implementation. The device uses an internal reference voltage of 0.5 V. TI recommends keeping the device in shutdown until the input voltage is 2.7 V or higher. 7.2 Functional Block Diagram VIN EN SW Current Limit Comparator Undervoltage Lockout Ramp Generator + - Soft Start Ref1 PFM Current Comparator Thermal Shutdown + - 2 MHz Oscillator Bandgap Ref2 PWM Comparator Error Amp + Control Logic Driver - pfm_low VREF 0.5V + - pfm_hi Vcomp 1.0V + - + Zero Crossing Comparator Frequency Compensation Adj Ver Fixed Ver FB 12 Submit Documentation Feedback GND Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 LM3671, LM3671-Q1 www.ti.com SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 7.3 Feature Description 7.3.1 Circuit Operation During the first portion of each switching cycle, the control block in the LM3671 turns on the internal PFET switch. This allows current to flow from the input through the inductor to the output filter capacitor and load. The inductor limits the current to a ramp with a slope of (VIN - VOUT)/L, by storing energy in a magnetic field. During the second portion of each cycle, the controller turns the PFET switch off, blocking current flow from the input, and then turns the NFET synchronous rectifier on. The inductor draws current from ground through the NFET to the output filter capacitor and load, which ramps the inductor current down with a slope of -VOUT/L. The output filter stores charge when the inductor current is high, and releases it when inductor current is low, smoothing the voltage across the load. The output voltage is regulated by modulating the PFET switch on time to control the average current sent to the load. The effect is identical to sending a duty-cycle modulated rectangular wave formed by the switch and synchronous rectifier at the SW pin to a low-pass filter formed by the inductor and output filter capacitor. The output voltage is equal to the average voltage at the SW pin. 7.3.2 Soft Start The LM3671 has a soft-start circuit that limits in-rush current during start-up. During start-up the switch current limit is increased in steps. Soft start is activated only if EN goes from logic low to logic high after Vin reaches 2.7 V. Soft start is implemented by increasing switch current limit in steps of 70 mA, 140 mA, 280 mA and 1020 mA (typical switch current limit). The start-up time thereby depends on the output capacitor and load current demanded at startup. Typical start-up times with a 10-F output capacitor and 300-mA load is 400 s and with 1mA load is 275 s. 7.4 Device Functional Modes 7.4.1 PWM Operation During PWM operation the converter operates as a voltage-mode controller with input voltage feed forward. This allows the converter to achieve good load and line regulation. The DC gain of the power stage is proportional to the input voltage. To eliminate this dependence, feed forward inversely proportional to the input voltage is introduced. While in PWM mode, the output voltage is regulated by switching at a constant frequency and then modulating the energy per cycle to control power to the load. At the beginning of each clock cycle the PFET switch is turned on and the inductor current ramps up until the comparator trips and the control logic turns off the switch. The current limit comparator can also turn off the switch in case the current limit of the PFET is exceeded. Then the NFET switch is turned on and the inductor current ramps down. The next cycle is initiated by the clock turning off the NFET and turning on the PFET. VSW 2V/DIV IL 200 mA/DIV VIN = 3.6V VOUT = 1.5V IOUT = 400 mA VOUT 10 mV/DIV AC Coupled TIME (200 ns/DIV) Figure 29. Typical PWM Operation Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 Submit Documentation Feedback 13 LM3671, LM3671-Q1 SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 www.ti.com Device Functional Modes (continued) 7.4.1.1 Internal Synchronous Rectification While in PWM mode, the LM3671 uses an internal NFET as a synchronous rectifier to reduce rectifier forward voltage drop and associated power loss. Synchronous rectification provides a significant improvement in efficiency whenever the output voltage is relatively low compared to the voltage drop across an ordinary rectifier diode. 7.4.1.2 Current Limiting A current limit feature allows the LM3671 to protect itself and external components during overload conditions. PWM mode implements current limiting using an internal comparator that trips at 1020 mA (typical). If the output is shorted to ground the device enters a timed current limit mode where the NFET is turned on for a longer duration until the inductor current falls below a low threshold. This allows the inductor current more time to decay, thereby preventing runaway. 7.4.2 PFM Operation At very light load, the converter enters PFM mode and operates with reduced switching frequency and supply current to maintain high efficiency. The device automatically transitions into PFM mode when either of two conditions occurs for a duration of 32 or more clock cycles: 1. The NFET current reaches zero. 2. The peak PMOS switch current drops below the IMODE level, (Typically IMODE < 30 mA + VIN/42 ). 2V/DIV VSW IL 200 mA/DIV VIN = 3.6V VOUT = 1.5V IOUT = 20 mA VOUT 20 mV/DIV AC Coupled TIME (4 Ps/DIV) Figure 30. Typical PFM Operation During PFM operation, the converter positions the output voltage slightly higher than the nominal output voltage during PWM operation, allowing additional headroom for voltage drop during a load transient from light to heavy load. The PFM comparators sense the output voltage via the feedback pin and control the switching of the output FETs such that the output voltage ramps between approximately 0.6% and 1.7% above the nominal PWM output voltage. If the output voltage is below the high PFM comparator threshold, the PMOS power switch is turned on. It remains on until the output voltage reaches the high PFM threshold or the peak current exceeds the IPFM level set for PFM mode. The typical peak current in PFM mode is: IPFM = 112 mA + VIN/27 . Once the PMOS power switch is turned off, the NMOS power switch is turned on until the inductor current ramps to zero. When the NMOS zero-current condition is detected, the NMOS power switch is turned off. If the output voltage is below the `high' PFM comparator threshold (see Figure 31), the PMOS switch is again turned on and the cycle is repeated until the output reaches the desired level. Once the output reaches the `high' PFM threshold, the NMOS switch is turned on briefly to ramp the inductor current to zero and then both output switches are turned off, and the device enters an extremely low power mode. Quiescent supply current during this `sleep' mode is 16 A (typ.), which allows the device to achieve high efficiency under extremely light load conditions. 14 Submit Documentation Feedback Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 LM3671, LM3671-Q1 www.ti.com SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 Device Functional Modes (continued) If the load current should increase during PFM mode (see Figure 31) causing the output voltage to fall below the low2 PFM threshold, the device will automatically transition into fixed-frequency PWM mode. When VIN = 2.7 V the device transitions from PWM to PFM mode at approximately 35 mA output current and from PFM to PWM mode at approximately 85 mA , when VIN = 3.6 V, PWM to PFM transition happens at approximately 50 mA and PFM to PWM transition happens at approximately 100 mA, when VIN = 4.5 V, PWM to PFM transition happens at approximately 65 mA and PFM to PWM transition happens at approximately 115 mA. High PFM Threshold ~1.017*Vout PFM Mode at Light Load Load current increases Low1 PFM Threshold ~1.006*Vout ZA xi s High PFM Voltage Threshold reached, go into sleep mode Current load increases, draws Vout towards Low2 PFM Threshold Low PFM Threshold, turn on PFET Low2 PFM Threshold, switch back to PWMmode Zs Axi Pfet on until Ipfm limit reached Nfet on drains inductor current until I inductor = 0 Low2 PFM Threshold Vout PWM Mode at Moderate to Heavy Loads Figure 31. Operation in PFM Mode and Transfer to PWM Mode 7.4.3 Shutdown Setting the EN input pin low (< 0.4 V) places the LM3671 in shutdown mode. During shutdown the PFET switch, NFET switch, reference, control and bias circuitry of the LM3671 are turned off. Setting EN high (> 1 V) enables normal operation. It is recommended to set EN pin low to turn off the LM3671 during system power up and undervoltage conditions when the supply is less than 2.7 V. Do not leave the EN pin floating. 7.4.4 Low Dropout Operation (LDO) The LM3671-ADJ can operate at 100% duty cycle (no switching; PMOS switch completely on) for low dropout support of the output voltage. In this way the output voltage will be controlled down to the lowest possible input voltage. When the device operates near 100% duty cycle, output voltage ripple is approximately 25 mV. The minimum input voltage needed to support the output voltage is VIN, MIN = ILOAD x (RDSON, PFET + RINDUCTOR) + VOUT where * * * ILOAD: Load current RDSON, PFET: Drain to source resistance of PFET switch in the triode region RINDUCTOR: Inductor resistance Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 (1) Submit Documentation Feedback 15 LM3671, LM3671-Q1 SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 www.ti.com 8 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 8.1 Application Information The external control of this device is very easy. First make sure the correct voltage been applied at VIN pin, then simply apply the voltage at EN pin according to the Electrical Characteristics to enable or disable the output voltage. 8.2 Typical Application 8.2.1 Typical Application: Fixed-Voltage Version VIN 2.7V to 5.5V L1: 2.2 PH VIN SW 1 CIN 4.7 PF VOUT 5 COUT 10 PF LM3671 GND 2 EN FB 3 4 Figure 32. LM3671 Fixed-Voltage Typical Application Circuit 8.2.1.1 Design Requirements Two ceramic capacitors and one inductor required for this application. These three external components need to be selected very carefully for property operation. Please read Detailed Design Procedure. 8.2.1.2 Detailed Design Procedure 8.2.1.2.1 Inductor Selection There are two main considerations when choosing an inductor; the inductor should not saturate, and the inductor current ripple should be small enough to achieve the desired output voltage ripple. Different saturation current rating specifications are followed by different manufacturers so attention must be given to details. Saturation current ratings are typically specified at 25C. However, ratings at the maximum ambient temperature of application should be requested from the manufacturer. The minimum value of inductance to specify good performance is 1.76 H at ILIM (typical) DC current over the ambient temperature range. Shielded inductors radiate less noise and should be preferred. There are two methods to choose the inductor saturation current rating. 8.2.1.2.1.1 Method 1 The saturation current should be greater than the sum of the maximum load current and the worst case average to peak inductor current. This can be written as ISAT ! IOUTMAX + IRIPPLE where IRIPPLE = VIN - VOUT * VOUT * 1 * 2 L VIN f (c) (c) (c) where * 16 IRIPPLE: average to peak inductor current Submit Documentation Feedback Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 LM3671, LM3671-Q1 www.ti.com SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 Typical Application (continued) * * * * * IOUTMAX: maximum load current (600 mA) VIN: maximum input voltage in application L : min inductor value including worst case tolerances (30% drop can be considered for method 1) f : minimum switching frequency (1.6 MHz) VOUT: output voltage (2) 8.2.1.2.1.2 Method 2 A more conservative and recommended approach is to choose an inductor that has a saturation current rating greater than the maximum current limit of 1150 mA. A 2.2-H inductor with a saturation current rating of at least 1150 mA is recommended for most applications. Inductor resistance should be less than 0.3 for good efficiency. Table 1 lists suggested inductors and suppliers. For low-cost applications, an unshielded bobbin inductor could be considered. For noise critical applications, a toroidal or shielded-bobbin inductor should be used. A good practice is to lay out the board with overlapping footprints of both types for design flexibility. This allows substitution of a low-noise shielded inductor, in the event that noise from low-cost bobbin models is unacceptable. 8.2.1.2.2 Input Capacitor Selection A ceramic input capacitor of 4.7 F, 6.3 V is sufficient for most applications. Place the input capacitor as close as possible to the VIN pin of the device. A larger value may be used for improved input voltage filtering. Use X7R or X5R types; do not use Y5V. DC bias characteristics of ceramic capacitors must be considered when selecting case sizes like 0805 and 0603. The minimum input capacitance to specify good performance is 2.2 F at 3-V DC bias; 1.5 F at 5-V DC bias including tolerances and over ambient temperature range. The input filter capacitor supplies current to the PFET switch of the LM3671 in the first half of each cycle and reduces voltage ripple imposed on the input power source. A ceramic capacitor's low ESR provides the best noise filtering of the input voltage spikes due to this rapidly changing current. Select a capacitor with sufficient ripple current rating. The input current ripple can be calculated as: VOUT IRMS = IOUTMAX VIN 1 (c) VOUT VIN + r 2 12 * (VIN - VOUT) VOUT r= L f IOUTMAX VIN The worst case is when VIN = 2 VOUT (3) Table 1. Suggested Inductors and Their Suppliers MODEL VENDOR DIMENSIONS L x W x H (mm) D.C.R (maximum)(m) DO3314-222MX Coilcraft 3.3 x 3.3 x 1.4 200 LPO3310-222MX Coilcraft 3.3 x 3.3 x 1 150 ELL5GM2R2N Panasonic 5.2 x 5.2 x 1.5 53 CDRH2D14NP-2R2NC Sumida 3.2 x 3.2 x 1.55 94 8.2.1.2.3 Output Capacitor Selection A ceramic output capacitor of 10 F, 6.3 V is sufficient for most applications. Use X7R or X5R types; do not use Y5V. DC bias characteristics of ceramic capacitors must be considered when selecting case sizes like 0805 and 0603. DC bias characteristics vary from manufacturer to manufacturer and dc bias curves should be requested from them as part of the capacitor selection process. The minimum output capacitance to specify good performance is 5.75 F at 1.8-V DC bias including tolerances and over ambient temperature range. The output filter capacitor smoothes out current flow from the inductor to the load, helps maintain a steady output voltage during transient load changes and reduces output voltage ripple. These capacitors must be selected with sufficient capacitance and sufficiently low ESR to perform these functions. Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 Submit Documentation Feedback 17 LM3671, LM3671-Q1 SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 www.ti.com The output voltage ripple is caused by the charging and discharging of the output capacitor and by the RESR and can be calculated as: Voltage peak-to-peak ripple due to capacitance can be expressed by Equation 4: VPP-C = IRIPPLE 4*f*C (4) Voltage peak-to-peak ripple due to ESR can be expressed by Equation 5: VPP-ESR = (2 x IRIPPLE) x RESR (5) Because these two components are out of phase the rms (root mean squared) value can be used to get an approximate value of peak-to-peak ripple. The peak-to-peak ripple voltage, rms value can be expressed by Equation 6: VPP-RMS = VPP-C2 + VPP-ESR2 (6) Note that the output voltage ripple is dependent on the inductor current ripple and the equivalent series resistance of the output capacitor (RESR). The RESR is frequency dependent (as well as temperature dependent); make sure the value used for calculations is at the switching frequency of the part. Table 2. Suggested Capacitors and Their Suppliers MODEL TYPE VENDOR VOLTAGE RATING (V) CASE SIZE INCH (mm) 4.7 F for CIN C2012X5R0J475K Ceramic, X5R TDK 6.3 0805 (2012) JMK212BJ475K Ceramic, X5R Taiyo-Yuden 6.3 0805 (2012) GRM21BR60J475K Ceramic, X5R Murata 6.3 0805 (2012) C1608X5R0J475K Ceramic, X5R TDK 6.3 0603 (1608) 10 F for COUT GRM21BR60J106K Ceramic, X5R Murata 6.3 0805 (2012) JMK212BJ106K Ceramic, X5R Taiyo-Yuden 6.3 0805 (2012) C2012X5R0J106K Ceramic, X5R TDK 6.3 0805 (2012) C1608X5R0J106K Ceramic, X5R TDK 6.3 0603 (1608) 8.2.1.3 Application Curves Figure 33. PFM-to-PWM Mode Change by Load Transients 18 Submit Documentation Feedback Figure 34. PWM-to-PFM Mode Change by Load Transients Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 LM3671, LM3671-Q1 www.ti.com SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 8.2.2 Typical Application: ADJ Version VIN 2.7V to 5.5V L1: 2.2 PH VIN CIN 4.7 PF VOUT SW 1 5 COUT LM3671ADJ GND C1 R1 C2 R2 10 PF 2 EN FB 3 4 Figure 35. Typical Application Circuit for ADJ Version 8.2.2.1 Design Requirements DESIGN PARAMETER EXAMPLE VALUE Input voltage range 2.7 V to 5.5 V Input capacitor 4.7 F Output capacitor 10 F Inductor 2.2 H ADJ programmable output voltage 1.1 V to 3.3 V 8.2.2.2 Detailed Design Procedure 8.2.2.2.1 Output Voltage Selection for LM3671-ADJ The output voltage of the adjustable parts can be programmed through the resistor network connected from VOUT to FB, then to GND. VOUT is adjusted to make the voltage at FB equal to 0.5 V. The resistor from FB to GND (R2) should be 200 k to keep the current drawn through this network well below the 16-A quiescent current level (PFM mode) but large enough that it is not susceptible to noise. If R2 is 200 k, and VFB is 0.5 V, the current through the resistor feedback network will be 2.5 A. The output voltage of the adjustable parts ranges from 1.1 V to 3.3 V. The formula for output voltage selection is: VOUT = VFB 1 + R1 * (c) R2 where * * * * VOUT: output voltage (volts) VFB : feedback voltage = 0.5 V R1: feedback resistor from VOUT to FB R2: feedback resistor from FB to GND (7) For any output voltage greater than or equal to 1.1 V, a zero must be added around 45 kHz for stability. The formula for calculation of C1 is: C1 = 1 (2 * S * R1 * 45 kHz) (8) For output voltages higher than 2.5 V, a pole must be placed at 45 kHz as well. If the pole and zero are at the same frequency the formula for calculation of C2 is: C2 = 1 (2 * S * R2 * 45 kHz) (9) The formula for location of zero and pole frequency created by adding C1 and C2 is given below. By adding C1, a zero as well as a higher frequency pole is introduced. Fz = 1 (2 * S * R1 * C1) (10) 1 Fp = 2 * S * (R1 R2) * (C1+C2) (11) See the Table 3 table. Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 Submit Documentation Feedback 19 LM3671, LM3671-Q1 SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 www.ti.com Table 3. LM3671-ADJ Configurations for Various VOUT (Circuit of Figure 35) VOUT (V) R1 (k) R2 (k) C1 (pF) C2 (pF) L (H) CIN (F) COUT (F) 0.9 160 200 22 none 2.2 4.7 10 1.1 240 200 15 none 2.2 4.7 10 1.2 280 200 12 none 2.2 4.7 10 1.3 320 200 12 none 2.2 4.7 10 1.5 357 178 10 none 2.2 4.7 10 1.6 442 200 8.2 none 2.2 4.7 10 1.7 432 178 8.2 none 2.2 4.7 10 1.8 464 178 8.2 none 2.2 4.7 10 1.875 523 191 6.8 none 2.2 4.7 10 2.5 402 100 8.2 none 2.2 4.7 10 2.8 464 100 8.2 33 2.2 4.7 10 3.3 562 100 6.8 33 2.2 4.7 10 8.2.2.3 Application Curves 2V/DIV VSW 2V/DIV VSW IOUT = 300 mA 500 mA/DIV IL VOUT VIN = 3.6V 500 mV/DIV VOUT VIN = 3.6V VOUT = 1.5V 1V/DIV IOUT = 1 mA VOUT = 1.5V 2V/DIV EN 2V/DIV EN TIME (100 Ps/DIV) TIME (100 Ps/DIV) Figure 36. Start-Up into PWM Mode Figure 37. Start-Up into PFM Mode 9 Power Supply Recommendations The LM3671 is designed to operate from a stable input supply range of 2.7 V to 5.5 V. 20 Submit Documentation Feedback Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 LM3671, LM3671-Q1 www.ti.com SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 10 Layout 10.1 Layout Guidelines PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss in the traces. These can send erroneous signals to the DC-DC converter device, resulting in poor regulation or instability. Good layout for the LM3671 can be implemented by following a few simple design rules below. Refer to Figure 38 for top layer board layout. 1. Place the LM3671, inductor and filter capacitors close together and make the traces short. The traces between these components carry relatively high switching currents and act as antennas. Following this rule reduces radiated noise. Special care must be given to place the input filter capacitor very close to the VIN and GND pin. 2. Arrange the components so that the switching current loops curl in the same direction. During the first half of each cycle, current flows from the input filter capacitor through the LM3671 and inductor to the output filter capacitor and back through ground, forming a current loop. In the second half of each cycle, current is pulled up from ground through the LM3671 by the inductor to the output filter capacitor and then back through ground forming a second current loop. Routing these loops so the current curls in the same direction prevents magnetic field reversal between the two half-cycles and reduces radiated noise. 3. Connect the ground pins of the LM3671 and filter capacitors together using generous component-side copper fill as a pseudo-ground plane. Then, connect this to the ground-plane (if one is used) with several vias. This reduces ground-plane noise by preventing the switching currents from circulating through the ground plane. It also reduces ground bounce at the LM3671 by giving it a low-impedance ground connection. 4. Use wide traces between the power components and for power connections to the DC-DC converter circuit. This reduces voltage errors caused by resistive losses across the traces. 5. Route noise sensitive traces, such as the voltage feedback path, away from noisy traces between the power components. The voltage feedback trace must remain close to the LM3671 circuit and should be direct but must be routed opposite to noisy components. This reduces EMI-radiated onto the voltage feedback trace of the DC-DC converter. A good approach is to route the feedback trace on another layer and to have a ground plane between the top layer and layer on which the feedback trace is routed. In the same manner, for the adjustable part, the feedback dividers should be on the bottom layer. 6. Place noise sensitive circuitry, such as radio IF blocks, away from the DC-DC converter, CMOS digital blocks and other noisy circuitry. Interference with noise-sensitive circuitry in the system can be reduced through distance. In mobile phones, for example, a common practice is to place the DC-DC converter on one corner of the board, arrange the CMOS digital circuitry around it (because this also generates noise), and then place sensitive preamplifiers and IF stages on the diagonally opposing corner. Often, the sensitive circuitry is shielded with a metal pan and power to the circuitry is post-regulated to reduce conducted noise, using LDOs. Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 Submit Documentation Feedback 21 LM3671, LM3671-Q1 SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 www.ti.com 10.2 Layout Example Figure 38. Top Layer Board Layout for SOT-23 10.3 DSBGA Package Assembly and Use Use of the DSBGA package requires specialized board layout, precision mounting, and careful re-flow techniques, as detailed in AN-1112 DSBGA Wafer Level Chip Scale Package (SNVA009). Refer to the section Surface Mount Technology (DSBGA) Assembly Considerations. For best results in assembly, alignment ordinals on the PC board must be used to facilitate placement of the device. The pad style used with DSBGA package must be the NSMD (non-solder mask defined) type. This means that the solder-mask opening is larger than the pad size. This prevents a lip that otherwise forms if the solder-mask and pad overlap, from holding the device off the surface of the board and interfering with mounting. See AN-1112 DSBGA Wafer Level Chip Scale Package (SNVA009) for specific instructions how to do this. The 5-pin package used for LM3671 has 300-micron solder balls and requires 10.82 mils pads for mounting on the circuit board. The trace to each pad must enter the pad with a 90 entry angle to prevent debris from being caught in deep corners. Initially, the trace to each pad should be 7 mil wide, for a section approximately 7 mil long or longer, as a thermal relief. Then each trace must neck up or down to its optimal width. The important criteria is symmetry. This ensures the solder bumps on the LM3671 re-flow evenly and that the device solders level to the board. In particular, special attention must be paid to the pads for bumps A1 and A3, because VIN and GND are typically connected to large copper planes, inadequate thermal relief can result in late or inadequate re-flow of these bumps. The DSBGA package is optimized for the smallest possible size in applications with red or infrared opaque cases. Because the DSBGA package lacks the plastic encapsulation characteristic of larger devices, it is vulnerable to light. Backside metallization and/or epoxy coating, along with front-side shading by the printed circuit board, reduce this sensitivity. However, the package has exposed die edges. In particular, DSBGA devices are sensitive to light, in the red and infrared range, shining on the package's exposed die edges. 22 Submit Documentation Feedback Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 LM3671, LM3671-Q1 www.ti.com SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 11 Device and Documentation Support 11.1 Device Support 11.1.1 Third-Party Products Disclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE. 11.2 Documentation Support 11.2.1 Related Documentation For additional information, see the following: AN-1112 DSBGA Wafer Level Chip Scale Package (SNVA009). 11.3 Related Links Table 4 lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 4. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY LM3671 Click here Click here Click here Click here Click here LM3671-Q1 Click here Click here Click here Click here Click here 11.4 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2ETM Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 11.5 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 11.6 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 11.7 Glossary SLYZ022 -- TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 Submit Documentation Feedback 23 LM3671, LM3671-Q1 SNVS294S - NOVEMBER 2004 - REVISED MAY 2016 www.ti.com 12 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 24 Submit Documentation Feedback Copyright (c) 2004-2016, Texas Instruments Incorporated Product Folder Links: LM3671 LM3671-Q1 PACKAGE OPTION ADDENDUM www.ti.com 11-Jan-2021 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) (6) LM3671LC-1.2/NOPB ACTIVE USON NKH 6 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM S39 LM3671LC-1.3/NOPB ACTIVE USON NKH 6 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM S40 LM3671LC-1.6/NOPB ACTIVE USON NKH 6 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM S41 LM3671LC-1.8/NOPB ACTIVE USON NKH 6 1000 RoHS & Green NIPDAU Level-1-260C-UNLIM S42 LM3671MF-1.2 NRND SOT-23 DBV 5 1000 Non-RoHS & Green Call TI Call TI -40 to 85 SBPB LM3671MF-1.2/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SBPB LM3671MF-1.25/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SDRB LM3671MF-1.375/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SEDB LM3671MF-1.5/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SBRB LM3671MF-1.6/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SDUB LM3671MF-1.8/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SBSB LM3671MF-1.875/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SDVB LM3671MF-2.5/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SJRB LM3671MF-2.8/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SJSB LM3671MF-3.3/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SJEB LM3671MF-ADJ/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SBTB LM3671MFX-1.2/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SBPB LM3671MFX-1.25/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SDRB LM3671MFX-1.8/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SBSB LM3671MFX-1.875/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SDVB Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 11-Jan-2021 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) (6) LM3671MFX-2.5/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SJRB LM3671MFX-2.8/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SJSB LM3671MFX-3.3/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SJEB LM3671MFX-ADJ/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 85 SBTB LM3671QMF-1.2/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 SH4B LM3671QMFX-1.2/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 SH4B LM3671QTL-1.8/NOPB ACTIVE DSBGA YZR 5 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 9 LM3671QTLX-1.8/NOPB ACTIVE DSBGA YZR 5 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 125 9 LM3671TL-1.2/NOPB ACTIVE DSBGA YZR 5 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 C LM3671TL-1.5/NOPB ACTIVE DSBGA YZR 5 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 D LM3671TL-1.8/NOPB ACTIVE DSBGA YZR 5 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 B LM3671TL-2.5/NOPB ACTIVE DSBGA YZR 5 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 L LM3671TL-2.8/NOPB ACTIVE DSBGA YZR 5 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 K LM3671TL-3.3/NOPB ACTIVE DSBGA YZR 5 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 J LM3671TL-ADJ/NOPB ACTIVE DSBGA YZR 5 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 E LM3671TLX-1.2/NOPB ACTIVE DSBGA YZR 5 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 C LM3671TLX-1.5/NOPB ACTIVE DSBGA YZR 5 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 D LM3671TLX-1.8/NOPB ACTIVE DSBGA YZR 5 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 B LM3671TLX-2.5/NOPB ACTIVE DSBGA YZR 5 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 L LM3671TLX-2.8/NOPB ACTIVE DSBGA YZR 5 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 K LM3671TLX-3.3/NOPB ACTIVE DSBGA YZR 5 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 J Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 11-Jan-2021 Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material RoHS & Green SNAGCU MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) (6) LM3671TLX-ADJ/NOPB ACTIVE DSBGA YZR 5 3000 Level-1-260C-UNLIM -40 to 85 E (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF LM3671, LM3671-Q1 : * Catalog: LM3671 Addendum-Page 3 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Jan-2021 * Automotive: LM3671-Q1 NOTE: Qualified Version Definitions: * Catalog - TI's standard catalog product * Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 4 PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM3671LC-1.2/NOPB USON NKH 6 1000 178.0 12.4 2.2 2.2 1.0 8.0 12.0 Q1 LM3671LC-1.3/NOPB USON NKH 6 1000 178.0 12.4 2.2 2.2 1.0 8.0 12.0 Q1 LM3671LC-1.6/NOPB USON NKH 6 1000 178.0 12.4 2.2 2.2 1.0 8.0 12.0 Q1 LM3671LC-1.8/NOPB USON NKH 6 1000 178.0 12.4 2.2 2.2 1.0 8.0 12.0 Q1 LM3671MF-1.2 SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-1.2/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-1.25/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-1.375/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-1.5/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-1.6/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-1.8/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-1.875/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-2.5/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-2.8/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-3.3/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MF-ADJ/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MFX-1.2/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MFX-1.25/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 Device Package Package Pins Type Drawing SPQ SOT-23 DBV 5 3000 178.0 8.4 LM3671MFX-1.875/NOPB SOT-23 DBV 5 3000 178.0 8.4 LM3671MFX-1.8/NOPB Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3.2 3.2 1.4 4.0 8.0 Q3 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MFX-2.5/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MFX-2.8/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MFX-3.3/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671MFX-ADJ/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671QMF-1.2/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671QMFX-1.2/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LM3671QTL-1.8/NOPB DSBGA YZR 5 250 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671QTLX-1.8/NOPB DSBGA YZR 5 3000 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TL-1.2/NOPB DSBGA YZR 5 250 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TL-1.5/NOPB DSBGA YZR 5 250 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TL-1.8/NOPB DSBGA YZR 5 250 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TL-2.5/NOPB DSBGA YZR 5 250 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TL-2.8/NOPB DSBGA YZR 5 250 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TL-3.3/NOPB DSBGA YZR 5 250 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TL-ADJ/NOPB DSBGA YZR 5 250 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TLX-1.2/NOPB DSBGA YZR 5 3000 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TLX-1.5/NOPB DSBGA YZR 5 3000 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TLX-1.8/NOPB DSBGA YZR 5 3000 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TLX-2.5/NOPB DSBGA YZR 5 3000 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TLX-2.8/NOPB DSBGA YZR 5 3000 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TLX-3.3/NOPB DSBGA YZR 5 3000 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 LM3671TLX-ADJ/NOPB DSBGA YZR 5 3000 178.0 8.4 1.14 1.47 0.76 4.0 8.0 Q1 Pack Materials-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM3671LC-1.2/NOPB USON NKH 6 1000 210.0 185.0 35.0 LM3671LC-1.3/NOPB USON NKH 6 1000 210.0 185.0 35.0 LM3671LC-1.6/NOPB USON NKH 6 1000 210.0 185.0 35.0 LM3671LC-1.8/NOPB USON NKH 6 1000 210.0 185.0 35.0 LM3671MF-1.2 SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-1.2/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-1.25/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-1.375/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-1.5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-1.6/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-1.8/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-1.875/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-2.5/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-2.8/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-3.3/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MF-ADJ/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671MFX-1.2/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671MFX-1.25/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671MFX-1.8/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671MFX-1.875/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 Pack Materials-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM3671MFX-2.5/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671MFX-2.8/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671MFX-3.3/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671MFX-ADJ/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671QMF-1.2/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LM3671QMFX-1.2/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LM3671QTL-1.8/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LM3671QTLX-1.8/NOPB DSBGA YZR 5 3000 210.0 185.0 35.0 LM3671TL-1.2/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LM3671TL-1.5/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LM3671TL-1.8/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LM3671TL-2.5/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LM3671TL-2.8/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LM3671TL-3.3/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LM3671TL-ADJ/NOPB DSBGA YZR 5 250 210.0 185.0 35.0 LM3671TLX-1.2/NOPB DSBGA YZR 5 3000 210.0 185.0 35.0 LM3671TLX-1.5/NOPB DSBGA YZR 5 3000 210.0 185.0 35.0 LM3671TLX-1.8/NOPB DSBGA YZR 5 3000 210.0 185.0 35.0 LM3671TLX-2.5/NOPB DSBGA YZR 5 3000 210.0 185.0 35.0 LM3671TLX-2.8/NOPB DSBGA YZR 5 3000 210.0 185.0 35.0 LM3671TLX-3.3/NOPB DSBGA YZR 5 3000 210.0 185.0 35.0 LM3671TLX-ADJ/NOPB DSBGA YZR 5 3000 210.0 185.0 35.0 Pack Materials-Page 4 MECHANICAL DATA YZR0005xxx D 0.6000.075 E TLA05XXX (Rev C) D: Max = 1.413 mm, Min =1.352 mm E: Max = 1.083 mm, Min =1.022 mm 4215043/A NOTES: A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994. B. This drawing is subject to change without notice. www.ti.com 12/12 PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 1.75 1.45 PIN 1 INDEX AREA 1 0.1 C B A 5 2X 0.95 1.9 1.45 0.90 3.05 2.75 1.9 2 4 0.5 5X 0.3 0.2 3 (1.1) C A B 0.15 TYP 0.00 0.25 GAGE PLANE 8 TYP 0 0.22 TYP 0.08 0.6 TYP 0.3 SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MIN ARROUND 0.07 MAX ARROUND NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X(0.95) 4 3 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. Board assembly site may have different recommendations for stencil design. www.ti.com MECHANICAL DATA NKH0006B LCA06B (Rev A) www.ti.com IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES "AS IS" AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. 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