MAX21003 Ultra-Accurate, Low Power,
Dual-Axis Digital Output Gyroscope
www.maximintegrated.com Maxim Integrated
│
14
Writing to the SPI Slave Interface (SDI)
The SPI master writes data to the IC slave interface
throughthefollowingsteps:
1) The SPI master sets the clock to its inactive state.
When CS is high, the master can drive the MOSI input.
2) The SPI master selects the IC by driving CS low.
3) The SPI master simultaneously clocks the command
byte into the IC. The SPI write command is performed
with 16 clock pulses. Multiple byte write command is
performed adding blocks of 8 clock pulses at the previ-
ous one.
Bit 0:WRITEbit.Thevalueis0.
Bit 1: MS bit. When 1, do not increment address,
when 0, increment address in multiple writing.
Bits 2–7:addressAD[5:0].Thisistheaddressfieldof
the indexed register.
Bits 8–15:dataDI[7:0](writemode).Thisisthedata
that is written inside the device (MSb first).
Bits 16–... :dataDI[...–8].Furtherdatainmultiplebyte
writing.
4) By keeping CS low, the master clocks data bytes into
theICbycontinuingtosupplySCL_CLKpulses(burst
mode). The master terminates the transfer by driving
CS high. The master must ensure that SCL_CLK is
inactive at the beginning of the next access (when it
drives CS low). In full-duplex mode, the IC outputs
data bits on MISO during the first 8 bits (the command
byte), and subsequently outputs zeros on MISO as the
SPI master clocks bytes into MOSI.
Half-Duplex Operation
WhentheSPImastersetsSPI_3_WIRE=1,theICisput
into half-duplex mode. In half-duplex mode, the IC three-
states its MISO pin and makes the MOSI pin bidirectional,
saving a pin in the SPI interface. The MISO pin can be
left unconnected in half-duplex operation. The SPI master
must operate the MOSI pin as bidirectional. It accesses a
ICregisterasfollows:theMOSImastersetstheclockto
its inactive state. While CS is high, the master can drive
the SDI pin to any value.
1) The SPI master selects the IC by driving CS low and
placing the first data bit (MSB) to write on the SDI
input.
2) The SPI master turns on its output driver and clocks the
command byte into the IC. The SPI read command is
performedwith16clockpulses:
Bit 0:READbit.Thevalueis1.
Bit 1: MS bit. When 1, do not increment address.
When 0, increment address in multiple readings.
Bit 2–7:AddressAD[5:0].Thisistheaddressfieldof
the indexed register.
Bit 8–15:dataDO[7:0](readmode).Thisisthedata
that is read from the device (MSb first). Multiple read
command is also available in 3-wire mode.
Sensor Data Registers
The sensor data registers contain the latest gyroscope
and temperature measurement data.
They are read-only registers and are accessed through
the serial interface. Data from these registers can be read
anytime.However,theinterruptfunctioncanbeusedto
determine when new data is available.
FIFO
The IC embeds a 256-slot of a 16-bit data FIFO for each
ofthethreeoutputchannels:yawandpitch.Thisallowsa
consistent power saving for the system since the host pro-
cessor does not need to continuously poll data from the
sensor, but it can wake up only when needed and burst
the significant data out from the FIFO. When configured in
Snapshot mode, it offers the ideal mechanism to capture
the data following a Rate Interrupt event.
Thisbuffercanworkaccordingtofourmainmodes:off,
normal, interrupt, and snapshot.
Both Normal and Interrupt modes can be optionally
configured to operate in overrun mode, depending on
whether, in case of buffer under-run, newer or older data
are lost.
Various FIFO status flags can be enabled to generate
interrupteventsonINT1/INT2pin.
FIFO Off Mode
Inthismode,theFIFOisturnedoff;dataarestoredonly
in the data registers and no data are available from the
FIFO if read.
When the FIFO is turned off, there are essentially two
options to use the device: synchronous and asynchro-
nous reading.
Synchronous Reading
In this mode, the processor reads the data set (e.g., 4
bytes for a 2 axes configuration) generated by the IC
everytimethatDATA_READYisset.Theprocessormust
read once and only once the data set in order to avoid
data inconsistencies.