BSS84AKS,115 - NXP Semiconductors

1. Product profile

1.1 General description

Dual P-channel enha ncement mode Fi eld-Effect Transistor (FET) in a very small SOT363

(SC-88) package using Trench MOSFET technology.

1.2 Features and benefits

Logic-level compatible

Very fast switching

Trench MOSFET technology

ESD protection up to 1 kV

AEC-Q101 qualified

1.3 Applications

Relay driver

High-speed line driver

High-side loadswitch

Switching circuits

1.4 Quick reference data

[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for

drain 1 cm2.

BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

Rev. 1 — 23 May 2011 Product data sheet

TSSOP6

Table 1. Quick reference data

Symbol Parameter Conditions Min Typ Max Unit

Per transis tor

VDS drain-source voltage Tj=25°C ---50V

VGS gate-source voltage -20 - 20 V

IDdrain current VGS =-10V; T

amb =25°C [1] ---160mA

Static characteristics (per transistor)

RDSon drain -so urce on-state

resistance VGS =-10V; I

D= -100 mA;

Tj=25°C -4.57.5Ω

Product data sheet Rev. 1 — 23 May 2011 2 of 17

NXP Semiconductors BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

2. Pinning information

3. Ordering information

4. Marking

[1] % = placeholder for manufacturing site code

Tabl e 2. Pinning information

Pin Symbol Description Simplified outline Graphi c sy mbol

1S1source 1

SOT363 (TSSOP6)

2 G1 gate 1

3D2drain 2

4S2source 2

5 G2 gate 2

6D1drain 1

132

sym147

G1 G2

Table 3. Ordering information

Type number Package

Name Description Version

BSS84AKS TSSOP6 plastic surface-mounted package; 6 leads SOT363

Table 4. Marking codes

Type number Marking code[1]

BSS84AKS %VY

Product data sheet Rev. 1 — 23 May 2011 3 of 17

NXP Semiconductors BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

5. Limiting values

[1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for drain 1 cm2.

[2] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint.

[3] Measured between all pins.

Table 5. Limiting values

In accordance with the Absolute Maxi mum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

Per transistor

VDS drain-source voltage Tj=25°C - -50 V

VGS gate-source voltage -20 20 V

IDdrain current VGS =-10V; T

amb =25°C [1] - -160 mA

VGS =-10V; T

amb = 100 °C [1] - -100 mA

IDM peak drain current Tamb = 25 °C; single pulse; tp≤10 µs - -640 mA

Ptot total power dissipation Tamb =25°C [2] - 280 mW

[1] - 320 mW

Tsp = 25 °C - 990 mW

Per device

Ptot total power dissipation Tamb =25°C [2] - 445 mW

Tjjunction temperature -55 150 °C

Tamb ambient temperature -55 150 °C

Tstg storage temperature -65 150 °C

Source-drain diode

ISsource current Tamb =25°C [1] - -160 mA

ESD maximum rating

VESD electrostatic discharge voltage HBM [3] - 1000 V

Product data sheet Rev. 1 — 23 May 2011 4 of 17

NXP Semiconductors BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

Fig 1. Normalized total power dissipation as a

function of junctio n temp erat u re Fig 2. Normalized continuous drain current as a

function of junction temp erat ure

IDM is single pulse

(1) tp = 100 μs

(2) tp = 1 ms

(3) tp = 10 ms

(4) DC; Tsp = 25 °C

(5) tp = 100 ms

(6) DC; Tamb = 25 °C; drain mounting pad 1 cm2

Fig 3. Safe operating area; junction to ambient; continuous and peak drain currents as a function of drain-source

voltage

Tj (°C)

-75 17512525 75-25

001aao121

120

Pder

(%)

Tj (°C)

-75 17512525 75-25

001aao122

120

Ider

(%)

001aao139

VDS (V)

-10-1 -102

-10-1

-10-2

-1

(A)

-10-3

(1)

(2)

(3)

(4)

(5)

(6)

Product data sheet Rev. 1 — 23 May 2011 5 of 17

NXP Semiconductors BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

6. Thermal characteristics

[1] Device mounted on an FR4 PCB, single-sided copper, tin-plate d and standard footprint.

[2] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated, mounting pad for drain 1 cm2.

Table 6. Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

Per device

Rth(j-a) thermal resistance from junction to ambient in free air [1] - - 300 K/W

Per transistor

Rth(j-a) thermal resistance from junction to ambient in free air [1] - 390 445 K/W

[2] - 340 390 K/W

Rth(j-sp) thermal resistance from junction to solder point - - 130 K/W

FR4 PCB, standard footprint

Fig 4. Per transistor: Transient thermal impedance from junction to ambient as a function of puls e duration;

typical values

017aaa034

(s)

−3

10110

−2

−1

th(j-a)

(K/W)

duty cycle = 1

0.75

0.5

0.33

0.25 0.2

0.1 0.05

0.02

0.01

Product data sheet Rev. 1 — 23 May 2011 6 of 17

NXP Semiconductors BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

FR4 PCB, mounting pad for drain 1 cm2

Fig 5. Per transistor: Transient thermal impedance from junction to ambient as a function of puls e duration;

typical values

017aaa035

(s)

−3

10110

−2

−1

th(j-a)

(K/W)

duty cycle = 1

0.75

0.5 0.33

0.25 0.2

0.1 0.05

0.02

0.01

Product data sheet Rev. 1 — 23 May 2011 7 of 17

NXP Semiconductors BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

7. Characteristics

Table 7. Characteristics

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics (per transistor)

V(BR)DSS drain-source breakdown

voltage ID= -10 µA; VGS =0V; T

j=25°C -50--V

VGSth gate-source threshold

voltage ID= -250 µA; VDS =V

GS; Tj= 25 °C -1.1 -1.6 -2.1 V

IDSS drain leakage current VDS =-50V; V

GS =0V; T

j=25°C ---1µA

VDS =-50V; V

GS =0V; T

j= 150 °C - - -2 µA

IGSS gate leakage current VGS =-20V; V

DS =0V; T

j= 25 °C - - -10 µA

VGS =20V; V

DS =0V; T

j= 25 °C - - -10 µA

RDSon drain-source on-state

resistance VGS =-10V; I

D= -100 mA; Tj=25°C - 4.5 7.5 Ω

VGS =-10V; I

D= -100 mA; Tj= 150 °C - 8 13.5 Ω

VGS =-5V; I

D=-100mA; T

j=25°C - 5.7 8.5 Ω

gfs forward transconductance VDS =-10V; I

D=-100mA; T

j= 25 °C - 150 - mS

Dynamic characteristics (per transistor)

QG(tot) total gate charge VDS =-25V; I

D=-200mA; V

GS =-5V;

Tj=25°C - 0.26 0.35 nC

QGS gate-source charge - 0.12 - nC

QGD gate-drain charge - 0.09 - nC

Ciss input capacitance VDS = -25 V; f = 1 MHz; VGS =0V;

Tj=25°C - 2436pF

Coss output capacitance - 4.5 - pF

Crss reverse transfer

capacitance -1.3-pF

td(on) turn-on delay time VDS =-30V; R

L=250Ω; VGS =-10V;

RG(ext) =6Ω; Tj=25°C - 1326ns

trrise time - 11 - ns

td(off) turn-off delay time - 48 96 ns

tffall time - 25 - ns

Source-drain diode (per transistor )

VSD source-drain voltage IS=-115mA; V

GS =0V; T

j= 25 °C -0.48 -0.85 -1.2 V

Product data sheet Rev. 1 — 23 May 2011 8 of 17

NXP Semiconductors BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

Tj = 25 °C Tj = 25 °C; VDS = -5 V

(1) minimum values

(2) typical values

(3) maximum values

Fig 6. Outp ut characteristics; drain current as a

function of drain-source volta ge; typ ical values Fig 7. Sub-threshold drain current as a function of

gate-source voltage

Tj = 25 °C

(1) VGS = -3.0 V

(2) VGS = -3.5 V

(3) VGS = -4.0 V

(4) VGS = -5.0 V

(5) VGS = -10.0 V

ID = -200 mA

(1) Tj = 150 °C

(2) Tj = 25 °C

Fig 8. Drain-source on-state resistance as a function

of drain current; typical values Fig 9. Dr ain-source on-state resistance as a function

of gate-source voltage; typical value s

VDS (V)

0-4-3-1 -2

001aao124

-0.10

-0.05

-0.15

-0.20

(A)

-3.5 V

-3.0 V

-2.5 V

VGS = -10 V -4.0 V

001aao125

-10-4

-10-5

-10-3

(A)

-10-6

VGS (V)

0 -2.5-2.0-1.0 -1.5-0.5

(1) (2) (3)

ID (A)

0 -0.4-0.3-0.1 -0.2

001aao126

RDSon

(Ω)

(1) (2) (3)

(4)

(5)

VGS (V)

0 -10-8-4 -6-2

001aao127

RDSon

(Ω)

(1)

(2)

Product data sheet Rev. 1 — 23 May 2011 9 of 17

NXP Semiconductors BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

VDS > ID x RDSon

(1) Tj = 25 °C

(2) Tj = 150 °C

Fig 10. Transfer characteristics: drain curre nt as a

function of gate-source voltage; typical values Fig 11. Normalized drain-source on-state resistance as

a function of junctio n temperature; typical

values

ID = -0.25 mA; VDS = VGS

(1) maximum values

(2) typical values

(3) minimum values

f = 1 MHz, VGS = 0 V

(1) Ciss

(2) Coss

(3) Crss

Fig 12. Gate-source threshold voltage as a function of

junction temperature Fig 13. Input, output and reverse transfer capacitances

as a function of drain-source voltage; typical

values

VGS (V)

0-4-3-1 -2

001aao128

-0.10

-0.05

-0.15

-0.20

(A)

(1)

(2)

Tj (°C)

-60 180120060

001aao129

1.0

0.5

1.5

2.0

Tj (°C)

-60 180120060

001aao130

-1

-2

-3

VGS(th)

(V)

(1)

(2)

(3)

001aao131

VDS (V)

-10-1 -102

-10-1

102

(pF)

(1)

(2)

(3)

Product data sheet Rev. 1 — 23 May 2011 10 of 17

NXP Semiconductors BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

ID = -0.2 A; VDS = -25 V; Tamb = 25 °C

Fig 14. Gate-source voltag e as a function of gate

charge; typical values Fig 15. Gate charge waveform definitions

VGS = 0 V

(1) Tj = 150 °C

(2) Tj = 25 °C

Fig 16. Source current as a functio n of so urce-drain voltage; typical valu es

001aao132

QG (nC)

0 0.60.40.2

-4

-6

-2

-8

-10

VGS

(V)

003aaa508

VGS

VGS(th)

QGS1 QGS2

QGD

VDS

QG(tot)

QGS

VGS(pl)

VSD (V)

0 -1.2-0.8-0.4

001aao133

-0.1

-0.2

-0.3

(A)

(1) (2)

Product data sheet Rev. 1 — 23 May 2011 11 of 17

NXP Semiconductors BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

8. Test information

8.1 Quality information

This product has been qualified in accordance with the Automotive Electronics Council

(AEC) standard Q101 - Stress test qu alif ication for discrete semiconductors, and is

suitable for use in auto motive applications.

Fig 17. Duty cycle definition

006aaa812

duty cycle δ =

Product data sheet Rev. 1 — 23 May 2011 12 of 17

NXP Semiconductors BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

9. Package outline

Fig 18. Package outline SOT363 (TSSOP6)

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

SOT363 SC-88

wBM

pin 1

index A

detail X

vMA

0 1 2 mm

scale

132

456

lastic surface-mounted package; 6 leads SOT36

UNIT A1

max bpcDEe1HELpQywv

mm 0.1 0.30

0.20

2.2

1.8

0.25

0.10

1.35

1.15 0.65

1.3 2.2

2.0 0.2 0.10.2

DIMENSIONS (mm are the original dimensions)

0.45

0.15

0.25

0.15

1.1

0.8

04-11-08

06-03-16

Product data sheet Rev. 1 — 23 May 2011 13 of 17

NXP Semiconductors BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

10. Soldering

Fig 19. Reflow soldering footprint for SOT363 (TSSOP6)

Fig 20. Wave soldering footprint for SOT363 (TSSOP6)

solder lands

solder resist

occupied area

solder paste

sot363_

2.65

2.35 0.4 (2×)

0.6

(2×)

0.5

(4×)

0.5

(4×)

0.6

(4×)

0.6

(4×)

1.5

1.8

Dimensions in mm

sot363_fw

solder lands

solder resist

occupied area

preferred transport

direction during soldering

5.3

1.3 1.3

1.5

0.3

1.5

4.5

2.45

2.5

Dimensions in mm

Product data sheet Rev. 1 — 23 May 2011 14 of 17

NXP Semiconductors BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

11. Revision history

Table 8. Revision history

Document ID Release date Data sheet status Change notice Supersedes

BSS84AKS v.2 20110523 Product data sheet - -

Product data sheet Rev. 1 — 23 May 2011 15 of 17

NXP Semiconductors BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

12. Legal information

12.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term 'short data sheet' is explained in section "Definitions".

[3] The p r oduct status of device(s) described in this do cument may have changed since this document was published and may differ in case of multiple devices. The latest product

status information is available on the Internet at URL http://www.nxp.com.

12.2 Definitions

Preview — The document is a preview version only. The document is still

subject to formal approval, which may result in modificat ions or additions.

NXP Semiconductors does not give any representations or warranties as to

the accuracy or completeness of informati on included herein and shall have

no liability for the consequences of use of such info rmation.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liab ility for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and tit le. A short data sh eet is intended

for quick reference only and shou ld not b e relied u pon to cont ain det ailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semicond uctors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall pre va il.

Product specificat io n — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to off er functions and qualities beyond those described in the

Product data sheet.

12.3 Disclaimers

Limited warranty and liability — Information in this d ocument is be lieved to

be accurate and reliable. However, NXP Semicondu ctors does not give any

representations or warrant ies, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

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Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semi conductors’ aggreg ate and cumulative liabil ity towards

customer for the products described herein shall be limited in accordance

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Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersed es an d r eplaces all inf ormation supplied pri or

to the publication hereof.

Suitability for use — NXP Semiconductors product s are not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applicat ions where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

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damage. NXP Semiconductors accepts no liab ility for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and ope ration of their applications

and products using NXP Semiconductors product s, and NXP Semiconductors

accepts no liability for any assistance with applications or cust omer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suit able and fit for the custome r’s applications and

products planned, as well as fo r the planned application and use of

customer’s third party customer(s). Custo mers should provide appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party custo m er(s). Customer is responsible for doing all necessary

testing for the customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

Document status [1] [2] Product status [3] Definition

Objective [short] data sheet Development This document contai ns data from the objective specification for product development.

Preliminary [shor t] data sheet Qualification This document contains data from the preliminary specification.

Product [short] data sheet Production This document contains the product specification.

Product data sheet Rev. 1 — 23 May 2011 16 of 17

NXP Semiconductors BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by cu stomer.

No offer to sell or license — Nothing in this document ma y be interpret ed or

construed as an of fer to se ll product s that is op en for accept ance or the grant ,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Export control — This document as well as the item(s) d escribed herein may

be subject to export control regulat i ons. Export might require a prior

authorization from national authorities.

12.4 Trademarks

Notice: All referenced b rands, produc t names, service names and trademarks

are the property of their respective ow ners.

Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV,

FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE,

ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse,

QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET,

TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V.

HD Radio and HD Radio logo — are trademarks of iBiquity Digital

Corporation.

13. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors BSS84AKS

50 V, 160 mA dual P-channel Trench MOSFET

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 23 May 2011

Document identifier: BSS84AKS

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

14. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.1 General description . . . . . . . . . . . . . . . . . . . . . .1

1.2 F eatures and benefits. . . . . . . . . . . . . . . . . . . . .1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.4 Q uick reference data . . . . . . . . . . . . . . . . . . . . .1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . .2

3 Ordering information. . . . . . . . . . . . . . . . . . . . . .2

4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2

5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3

6 Thermal characteristics . . . . . . . . . . . . . . . . . . .5

7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .7

8 Test information. . . . . . . . . . . . . . . . . . . . . . . . .11

8.1 Quality information . . . . . . . . . . . . . . . . . . . . . .11

9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .12

10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

11 Revision history. . . . . . . . . . . . . . . . . . . . . . . . .14

12 Legal information. . . . . . . . . . . . . . . . . . . . . . . .15

12.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .15

12.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

12.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .15

12.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .16

13 Contact information. . . . . . . . . . . . . . . . . . . . . .16