1. Product profile
1.1 General description
Ultra low capacitance ElectroStatic Discharge (ESD) protection array in a small
SOT323 (SC-70) Surface-Mounted Device (SMD) plastic package designed to
protect one signal line in rail-to-rail configuration from the damage caused by
ESD and other transients.
1.2 Features and benefits
ESD protection of one signal line (rail-to-rail configuration)
Ultra low diode capacitance: Cd=0.6pF
ESD protection up to 30 kV
IEC 61000-4-2; level 4 (ESD)
IEC 61000-4-5 (surge); IPP =11A
AEC-Q101 qualified
1.3 Applications
Telecommunication networks
Video line protection
Microcontroller protection
I2C-bus protection
Antenna power su pp ly
Analog audio
Class-D amplifier
1.4 Quick reference data
NUP1301U
Ultra low capacitance ESD protection array
Rev. 1 — 28 January 2011 Product data sheet
SOT323
Table 1. Quick reference data
Tamb =25
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Per diode
VRRM repetitive peak reverse
voltage --80V
Cddiode capacitance f = 1 MHz;
VR=0V - 0.6 0.75 pF
IRreverse current VR=80V - - 100 nA
NUP1301U All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 28 January 2011 2 of 14
NXP Semiconductors NUP1301U
Ultra low capacitance ESD protection array
2. Pinning information
3. Ordering information
4. Marking
[1] * = placeholder for manufacturing site code
5. Limiting values
Table 2. Pinning
Pin Symbol Description Simplified outline Graphic symbol
1 GND ground
2V
CC supply voltage
3 I/O input/output
12
3
006aaa763
12
3
Tabl e 3. Ordering i nfo rmation
Type number Package
Name Description Version
NUP1301U - plastic surface-mounted package; 3 leads SOT323
Table 4. Marking
Type number Marking code[1]
NUP1301U *VU
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
Per diode
VRRM repetitive peak
reverse voltage -80V
VRreverse voltage - 80 V
IFforward current [1] -215mA
IFRM repetitive peak
forward current tp1 ms; 0.25 - 500 mA
IFSM non-repetitive peak
forward current square wave [2]
tp=1s-4A
tp=1ms - 1 A
tp=1s - 0.5 A
NUP1301U All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 28 January 2011 3 of 14
NXP Semiconductors NUP1301U
Ultra low capacitance ESD protection array
[1] Pulse test: tp300 s; 0.02.
[2] Tj=25C prior to surge.
[3] Non-repetitive current pulse 8/20 s exponential decay waveform according to IEC 61000-4-5.
[4] Measured from pin 3 to pins 1 and 2 (pins 1 and 2 are connected).
[5] Single diode loaded.
[6] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard
footprint.
[1] Device stressed with ten non-repetitive ESD pulses.
[2] Measured from pin 3 to pins 1 and 2 (pins 1 and 2 are connected).
Per device
PPP peak pulse power tp=8/20s[3][4] -220W
IPP peak pulse current tp=8/20s[3][4] -11A
Ptot total power dissipation Tamb 25 C[5][6] -200mW
Tjjunction temperature - 150 C
Tamb ambient temperature 55 +150 C
Tstg storage temperature 65 +150 C
Table 6. ESD maximum ratings
Symbol Parameter Conditions Min Max Unit
VESD electrostatic discharge
voltage IEC 61000-4-2
(contact discharge) [1][2] -30kV
machine model - 400 V
MIL-STD-883
(human body model) -10kV
Table 7. ESD standards compliance
Standard Conditions
IEC 61000-4-2; level 4 (ESD) > 15 kV (air); > 8 kV (contact)
MIL-STD-883; class 3B (human body model) > 8 kV
Table 5. Limiting values …continued
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
NUP1301U All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 28 January 2011 4 of 14
NXP Semiconductors NUP1301U
Ultra low capacitance ESD protection array
6. Thermal characteristics
[1] Single diode loaded.
[2] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint.
Fig 1. 8/20 s pulse waveform accor ding to
IEC 61000-4-5 Fig 2. ESD pulse waveform according to
IEC 61000-4-2
t (μs)
0403010 20
001aaa630
40
80
120
IPP
(%)
0
et
100 % IPP; 8 μs
50 % IPP; 20 μs
001aaa631
I
PP
100 %
90 %
t
30 ns 60 ns
10 %
t
r
= 0.7 ns to 1 ns
Table 8. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
Per device
Rth(j-a) thermal resistance from
junction to ambient in free air [1][2] --625K/W
Rth(j-sp) thermal resistance from
junction to solder point --300K/W
NUP1301U All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 28 January 2011 5 of 14
NXP Semiconductors NUP1301U
Ultra low capacitance ESD protection array
7. Characteristics
[1] Pulse test: tp300 s; 0.02.
[2] Non-repetitive current pulse 8/20 s exponential decay waveform according to IEC 61000-4-5.
[3] Measured from pin 3 to pins 1 and 2 (pins 1 and 2 are connected).
Table 9. Electrical characteristics
Tamb =25
C unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Per diode
VBR breakdown voltage IR= 100 A 100 - - V
VFforward voltage [1]
IF= 1 mA - - 715 mV
IF= 10 mA - - 855 mV
IF=50mA --1V
IF=150mA --1.25V
IRreverse current VR=25V --30nA
VR= 80 V - - 100 nA
VR=25V;
Tj=150C--25A
VR=80V;
Tj=150C--35A
Cddiode capacitance f = 1 MHz; VR=0V - 0.6 0.75 pF
Per device
VCL clamping vo ltage IPP =1A [2][3] --3V
IPP =11A [2][3] --20V
NUP1301U All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 28 January 2011 6 of 14
NXP Semiconductors NUP1301U
Ultra low capacitance ESD protection array
(1) Tamb = 150 C
(2) Tamb =85C
(3) Tamb =25C
(4) Tamb =40 C
Based on square wave currents.
Tj=25C; prior to surge
Fig 3. Forward current as a function of forward
voltage; typical values Fig 4. Non-repetitive peak forward cu rrent as a
function of pul se duration; typical values
(1) Tamb = 150 C
(2) Tamb =85C
(3) Tamb =25C
(4) Tamb =40 C
Tamb =25C; f = 1 MHz
Fig 5. Reverse cur ren t as a function of reverse
voltage; typical values Fig 6. Diode ca pacitance as a function of reverse
voltage; typical values
006aab132
1
10
102
103
IF
(mA)
101
VF (V)
0 1.41.00.4 0.80.2 1.20.6
(1) (2) (3) (4)
mbg704
10
1
102
IFSM
(A)
101
tp (μs)
110
4
103
10 102
006aab133
102
IR
(μA)
VR (V)
0 1008040 6020
10
1
101
102
103
104
105
(1)
(2)
(3)
(4)
0816124
0.8
0.6
0
0.4
0.2
mbg446
V
R
(V)
C
d
(pF)
NUP1301U All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 28 January 2011 7 of 14
NXP Semiconductors NUP1301U
Ultra low capacitance ESD protection array
Fig 7. ESD clamping test setup and waveforms
006aab567
50 Ω
RZ
CZDUT
(DEVICE
UNDER
TEST)
GND
450 Ω
RG 223/U
50 Ω coax
ESD TESTER
acc. to IEC 61000-4-2
CZ = 150 pF; RZ = 330 Ω
4 GHz DIGITAL
OSCILLOSCOPE
10×
ATTENUATOR
unclamped +8 kV ESD pulse waveform
(IEC 61000-4-2 network)
clamped 8 kV ESD pulse waveform
(IEC 61000-4-2 network), pin 3 to 1 and 2
vertical scale = 10 A/div
horizontal scale = 15 ns/div
GND
unclamped 8 kV ESD pulse waveform
(IEC 61000-4-2 network)
vertical scale = 10 A/div
horizontal scale = 15 ns/div
clamped +8 kV ESD pulse waveform
(IEC 61000-4-2 network), pin 3 to 1 and 2
GND
GND
vertical scale = 10 V/div
horizontal scale = 15 ns/div
vertical scale = 10 V/div
horizontal scale = 15 ns/div
NUP1301U All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 28 January 2011 8 of 14
NXP Semiconductors NUP1301U
Ultra low capacitance ESD protection array
8. Application information
Protection of a single (high- speed) data line in rail-to-rail con figuration. The protected dat a
line is connected to pin 3. Pin 1 is connected to ground (GND) and pin 2 is connected to
the supply rail (supply voltage VCC). When the transient voltage exceeds the forward
voltage drop of one diode, the transient is directed either to the supply rail or to GND.
The advantages of these solutions are: low line capacitance (0.6 pF typically), fast
response time , an d low clam pin g vo ltage.
Circuit board layout and protection device placement:
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the NUP1301U as clos e to the input terminal or connector as possible.
2. The path length between the NUP1301U and the protected line shou ld be minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
vias.
9. Test information
9.1 Quality information
This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is
suitable for use in automotive applications.
Fig 8. Typical application for the protection of one signal line
006aac518
Audio
interface
D2
NUP1301U
D1
NUP1301U
VCC
VCC
NUP1301U All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 28 January 2011 9 of 14
NXP Semiconductors NUP1301U
Ultra low capacitance ESD protection array
10. Package outline
11. Packing information
[1] For further information and the availability of packing methods, see Section 15.
Fig 9. Package outline SOT323 (SC-70)
Table 10. Packing methods
The indicated -xxx are the last thre e digits of the 12NC ordering code.[1]
Type number Package Description Packing quantity
3000 10000
NUP1301U SOT323 4 mm pitch, 8 mm tape and reel -115 -135
NUP1301U All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 28 January 2011 10 of 14
NXP Semiconductors NUP1301U
Ultra low capacitance ESD protection array
12. Soldering
Fig 10. Reflow soldering footprint SOT323 (SC-70)
Fig 11. Wave soldering footprint SOT323 (SC-70)
solder lands
solder resist
occupied area
solder paste
sot323_fr
2.65
2.35 0.6
(3×)
0.5
(3×)
0.55
(3×)
1.325
1.85
1.3
3
2
1
Dimensions in mm
sot323_fw
3.65 2.1
1.425
(3×)
4.6
09
(2×)
2.575
1.8
solder lands
solder resist
occupied area
preferred transport
direction during soldering
Dimensions in mm
NUP1301U All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 28 January 2011 11 of 14
NXP Semiconductors NUP1301U
Ultra low capacitance ESD protection array
13. Revision history
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
NUP1301U v.1 20110128 Product data sheet - -
NUP1301U All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 28 January 2011 12 of 14
NXP Semiconductors NUP1301U
Ultra low capacitance ESD protection array
14. Legal information
14.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
14.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information se e the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre vail.
Product specificat ionThe information and data provided in a Product
data sheet shall define the specification of the product as agreed be tween
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
14.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
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representations or warranties, expressed or implied, as to the accuracy or
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Notwithstanding any damages that customer might incur for any reason
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changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
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authorized or warranted to be suit able for use in life support, life-critical or
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malfunction of an NXP Semiconductors product can reasonably be expected
to result in perso nal injury, deat h or severe property or environmental
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NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using NXP Semiconductors product s, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suit able and fit for the custome r’s applications and
products planned, as well as fo r the planned application and use of
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design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for th e customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings onl y and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
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products are sold subject to the general terms and conditions of commercial
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applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
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Export control — This document as well as the item(s) described herein
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Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objecti ve specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] dat a sheet Production This document contains the product specification.
NUP1301U All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 28 January 2011 13 of 14
NXP Semiconductors NUP1301U
Ultra low capacitance ESD protection array
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristi cs sections of this
document, and as such is not complete, exhaustive or legally binding.
14.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
15. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors NUP1301U
Ultra low capacitance ESD protection array
© NXP B.V. 2011. All rights reserved.
For more information, please visit: http://www.nxp.co m
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 28 January 2011
Document identifier: NUP1 301U
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
16. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 General description . . . . . . . . . . . . . . . . . . . . . 1
1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . 1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . 1
2 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
6 Thermal characteristics . . . . . . . . . . . . . . . . . . 4
7 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
8 Application information. . . . . . . . . . . . . . . . . . . 8
9 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 8
9.1 Quality information . . . . . . . . . . . . . . . . . . . . . . 8
10 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9
11 Packing information . . . . . . . . . . . . . . . . . . . . . 9
12 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
13 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11
14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12
14.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12
14.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
14.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
14.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
15 Contact information. . . . . . . . . . . . . . . . . . . . . 13
16 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14