General Description
The MAX5082/MAX5083 are 250kHz PWM step-down
DC-DC converters with an on-chip, 0.3Ω high-side
switch. The input voltage range is 4.5V to 40V for the
MAX5082 and 7.5V to 40V for the MAX5083. The output
is adjustable from 1.23V to 32V and can deliver up to
1.5A of load current.
Both devices utilize a voltage-mode control scheme for
good noise immunity in the high-voltage switching envi-
ronment and offer external compensation allowing for
maximum flexibility with a wide selection of inductor values
and capacitor types. The switching frequency is internally
fixed at 250kHz and can be synchronized to an external
clock signal through the SYNC input. Light load efficiency is
improved by automatically switching to a pulse-skip mode.
All devices include programmable undervoltage lockout and
soft-start. Protection features include cycle-bycycle current
limit, hiccup-mode output short-circuit protection, and ther-
mal shutdown. Both devices are available in a space-saving,
high-power (2.7W), 16-pin TQFN package and are rated for
operation over the -40°C to +125°C temperature range.
Applications
● FireWire® Power Supplies ● Industrial
●Distributed Power
Features
● 4.5V to 40V (MAX5082) or 7.5V to 40V (MAX5083)
Input Voltage Range
● 1.5A Output Current
● VOUT Range From 1.23V to 32V
● Internal High-Side Switch
● Fixed 250kHz Internal Oscillator
● Automatic Switchover to Pulse-Skip Mode at Light
Loads
● External Frequency Synchronization
● Thermal Shutdown and Short-Circuit Protection
● Operates Over the -40°C to +125°C Temperature
Range
● Space-Saving (5mm x 5mm) High-Power 16-Pin
TQFN Package
19-3657; Rev 1; 5/14
Pin Configurations appears at end of data sheet.
*EP = Exposed pad.
FireWire is a registered trademark of Apple Computer, Inc.
Typical Operating Circuits continued at end of data sheet.
PART TEMP RANGE PIN-PACKAGE
MAX5082ATE -40°C to +125°C 16 TQFN-EP*
MAX5083ATE -40°C to +125°C 16 TQFN-EP*
VIN
4.5V TO 40V
ON/OFF
C1
R1
R2
C2
PGND
REG
LX
FB
IN
SYNC SGND PGND SS COMP
DVREG C-
CF
VOUT
PGND
CBST
CSS
D1
D2
L1
C8
C5
R6
R5
C+ BST
C7
C6
R3
R4
MAX5082
MAX5082/MAX5083 1.5A, 40V, MAXPower Step-Down
DC-DC Converters
Typical Application Circuits
Ordering Information
EVALUATION KIT AVAILABLE
IN, ON/OFF to SGND..............................................-0.3V to +45V
LX to SGND.................................................-0.3V to (VIN + 0.3V)
BST to SGND................................................-0.3V to (VIN + 12V)
BST to LX................................................................-0.3V to +12V
PGND to SGND.....................................................-0.3V to +0.3V
REG, DVREG, SYNC to SGND...............................-0.3V to +12V
FB, COMP, SS to SGND..........................-0.3V to (VREG + 0.3V)
C+ to PGND (MAX5082 only)..............(VDVREG - 0.3V) to +12V
C- to PGND (MAX5082 only)..............-0.3V to (VDVREG + 0.3V)
Continuous current through internal power MOSFET (pins 11/12
connected together and pins 13/14 connected together)
TJ = +125°C.........................................................................3A
TJ = +150°C.........................................................................2A
Continuous Power Dissipation* (TA = +70°C)
16-Pin TQFN (derate 33.3mW/°C above +70°C)....2666.7mW
16-Pin TQFN (θJA).......................................................30°C/W
16-Pin TQFN (θJC)......................................................1.7°C/W
Operating Temperature Range...........................-40oC to +125°C
Maximum Junction Temperature.......................................+150°C
Storage Temperature Range..............................-60°C to +150°C
Lead Temperature (soldering, 10s)...................................+300°C
*As per JEDEC 51 Standard.
(VIN = VON/OFF = 12V, VREG = VDVREG, VSYNC = PGND = SGND, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values
are at TA = + 25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Input Voltage Range VIN
MAX5082 4.5 40 V
MAX5083 7.5 40
Undervoltage Lockout Threshold UVLO VIN rising, MAX5082 3.9 4.2 V
VIN rising, MAX5083 6.8 7.3
Undervoltage Lockout Hysteresis UVLOHYST
MAX5082 0.4 V
MAX5083 0.7
Switching Supply Current (PWM
Operation) ISW VFB = 0V, MAX5082 10.5 mA
VFB = 0V, MAX5083 9.5
Efciency
VIN = 12V, VOUT = 3.3V, IOUT = 1.5A 84
%
VIN = 4.5V, VOUT = 3.3V, IOUT = 1.5A
(MAX5082) 88
No-Load Supply Current
(PFM Operation)
MAX5082 1.4 2.5 mA
MAX5083 1.3 2.3
Shutdown Current ISHDN VON/OFF = 0V, VIN = 40V 200 300 µA
ON/OFF CONTROL
Input Voltage Threshold VON/OFF VON/OFF rising 1.20 1.23 1.25 V
Input Voltage Hysteresis 0.12 V
Input Bias Current VON/OFF = 0 to 40V -250 +250 nA
ERROR AMPLIFIER/SOFT-START
Soft-Start Current ISS 815 24 µA
Reference Voltage (Soft-Start) VSS 1.215 1.228 1.240 V
FB Regulation Voltage VFB ICOMP = -500μA to +500μA 1.215 1.228 1.240 V
FB Input Range 01.5 V
FB Input Current -250 +250 nA
COMP Voltage Range ICOMP = -500μA to +500μA 0.25 4.50 V
Open-Loop Gain 80 dB
Unity-Gain Bandwidth 1.8 MHz
FB Offset Voltage ICOMP = -500μA to +500μA -5 +5 mV
MAX5082/MAX5083 1.5A, 40V, MAXPower Step-Down
DC-DC Converters
www.maximintegrated.com Maxim Integrated
│
2
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(VIN = VON/OFF = 12V, VREG = VDVREG, VSYNC = PGND = SGND, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values
are at TA = + 25°C.) (Note 1)
Note 1: 100% production tested at TA = +25°C and TA = +125°C. Limits at -40°C are guaranteed by design.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
OSCILLATOR
Frequency fSW VSYNC = 0V 225 250 275 kHz
Maximum Duty Cycle DMAX
VSYNC = 0V, VIN = 4.5V, MAX5082 87
%VSYNC = 0V, VIN = 7.5V, MAX5083 87
VSYNC = 0V, VIN ≤ 40V 87
SYNC High-Level Voltage 2.2 V
SYNC Low-Level Voltage 0.8 V
SYNC Frequency Range fSYNC 150 350 kHz
PWM Modulator Gain fSYNC = 150kHz to 350kHz 10 V/V
Ramp Level Shift (Valley) 0.3 V
POWER SWITCH
Switch On-Resistance VBST - VLX = 6V 0.3 0.6 Ω
Switch Gate Charge VBST - VLX = 6V 6 nC
Switch Leakage Current VIN = 40V, VLX = VBST = 0V 10 µA
BST Leakage Current VBST = VLX = VIN = 40V 10 µA
CHARGE PUMP
C- Output Voltage Low MAX5082 only, sinking 10mA 0.1 V
C- Output Voltage High MAX5082 only, relative to DVREG,
sourcing 10mA 0.1 V
DVREG to C+ On-Resistance MAX5082 only, sourcing 10mA 10 Ω
LX to PGND On-Resistance Sinking 10mA 12 Ω
CURRENT-LIMIT COMPARATOR
Pulse-Skip Threshold IPFM 100 200 300 mA
Cycle-by-Cycle Current Limit IILIM 1.9 2.7 3.5 A
Number of Consecutive ILIM
Events to Hiccup 4
Hiccup Timeout 512 Clock
periods
INTERNAL VOLTAGE REGULATOR
Output Voltage VREG
MAX5082 4.75 5 5.25 V
MAX5083 7.6 88.4
Line Regulation VIN = 5.5V to 40V, MAX5082 1 mV/V
VIN = 9.0V to 40V, MAX5083 1
Load Regulation IREG = 0 to 20mA 0.25 V
Dropout Voltage VIN = 4.5V, IREG = 20mA, MAX5082 0.5 V
VIN = 4.5V, IREG = 20mA, MAX5083 0.5
THERMAL SHUTDOWN
Thermal Shutdown Temperature Temperature rising +160 °C
Thermal Shutdown Hysteresis 20 °C
MAX5082/MAX5083 1.5A, 40V, MAXPower Step-Down
DC-DC Converters
www.maximintegrated.com Maxim Integrated
│
3
Electrical Characteristics (continued)
(VIN = 12V, see Figure 5 (MAX5082) and Figure 6 (MAX5083), TA = +25°C, unless otherwise noted.)
UNDERVOLTAGE LOCKOUT HYSTERESIS
vs. TEMPERATURE (MAX5083)
MAX5082/3 toc02
TEMPERATURE (°C)
UNDERVOLTAGE LOCKOUT HYSTERESIS (V)
1108535 6010-15
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0
-40 135
ON/OFF THRESHOLD HYSTERESIS
vs. TEMPERATURE
MAX5082/3 toc03
TEMPERATURE (°C)
ON/OFF THRESHOLD HSYSTERESIS (V)
11085603510-15
0.05
0.10
0.15
0.20
0
-40 135
SHUTDOWN SUPPLY CURRENT
vs. INPUT VOLTAGE (MAX5082)
MAX5082/3 toc04
INPUT VOLTAGE (V)
SHUTDOWN SUPPLY CURRENT (µA)
353020 2510 155
25
50
75
100
125
150
175
200
225
250
0
0 40
TA = +135°C
TA = +25°C
TA = +85°C
TA = -40°C
VON/OFF = 0V
SHUTDOWN SUPPLY CURRENT
vs. INPUT VOLTAGE (MAX5083)
MAX5082/3 toc05
INPUT VOLTAGE (V)
SHUTDOWN SYPPLY CURRENT (µA)
353020 2510 155
25
50
75
100
125
150
175
200
225
250
275
300
0
0 40
TA = +135°C
TA = +25°C
TA = +85°C
TA = -40°C
VON/OFF = 0V
NO-LOAD SUPPLY CURRENT
vs. INPUT VOLTAGE (MAX5082)
MAX5082/3 toc06
INPUT VOLTAGE (V)
SUPPLY CURRENT (mA)
35305 10 15 20 25
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0
0 40
TA = +135°C
TA = +25°C
TA = +85°C
TA = -40°C
UNDERVOLTAGE LOCKOUT HYSTERESIS
vs. TEMPERATURE (MAX5082)
MAX5082/3 toc01
TEMPERATURE (°C)
UNDERVOLTAGE LOCKOUT HYSTERESIS (V)
1108535 6010-15
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0
-40 135
MAXIMUM DUTY CYCLE
vs. INPUT VOLTAGE (MAX5082)
MAX5082/3 toc08a
INPUT VOLTAGE (V)
MAXIMUM DUTY CYCLE (%)
353020 2510 155
82
84
86
88
90
92
94
96
98
100
80
0 40
OPERATING FREQUENCY
vs. TEMPERATURE
MAX5082/3 toc07
TEMPERATURE (°C)
OPERATING FREQUENCY (kHz)
1108535 6010-15
242
244
246
248
250
252
254
256
258
260
240
-40 135
VIN = 4.5V
VIN = 40V
MAX5082/MAX5083 1.5A, 40V, MAXPower Step-Down
DC-DC Converters
Maxim Integrated
│
4
www.maximintegrated.com
Typical Operating Characteristics
(VIN = 12V, see Figure 5 (MAX5082) and Figure 6 (MAX5083), TA = +25°C, unless otherwise noted.)
OPEN-LOOP GAIN/PHASE vs. FREQUENCY
MAX5082 toc10
FREQUENCY (kHz)
GAIN (dB)
PHASE (DEGREES)
10001001010.10.010.001
0
20
40
60
80
100
-20
75
100
125
150
175
50
0 10,000
GAIN
PHASE
OUTPUT CURRENT LIMIT
vs. INPUT VOLTAGE
MAX5082/3 toc10
INPUT VOLTAGE (V)
OUTPUT CURRENT LIMIT (A)
353020 2510 155
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
2.0
0 40
MAX5082
TA = +135°C
TA = +25°C
TA = +85°C
TA = -40°C
OUTPUT IS
PULSED WITH 3% DUTY CYCLE
TURN-ON/OFF WAVEFORM
MAX5082/3 toc11a
VOUT
2V/div
2ms/div
ILOAD = 1A
VON/OFF
2V/div
TURN-ON/OFF WAVEFORM
MAX5082/3 toc11b
VON/OFF
2V/div
VOUT
2V/div
2µs/div
ILOAD = 100mA
OUTPUT VOLTAGE vs. TEMPERATURE
MAX5082/3 toc12
TEMPERATURE (°C)
OUTPUT VOLTAGE (V)
1108535 6010-15
3.22
3.24
3.26
3.28
3.30
3.32
3.34
3.36
3.38
3.40
3.20
-40 135
MAX5082
ILOAD = 0A
ILOAD = 1A
MAXIMUM DUTY CYCLE
vs. INPUT VOLTAGE (MAX5083)
MAX5080 toc08b
INPUT VOLTAGE (V)
MAXIMUM DUTY CYCLE (%)
353020 2510 155
82
84
86
88
90
92
94
96
98
100
80
0 40
EFFICIENCY vs. LOAD CURRENT
MAX5082/3 toc13a
LOAD CURRENT (A)
EFFICIENCY (%)
0.10.01
20
30
40
50
60
70
80
90
100
0
0.001 101
VIN = 40V,
VOUT = 3.3V MAX5082
VIN = 24V,
VOUT = 3.3V
VIN = 12V,
VOUT = 3.3V
VIN = 7.5V,
VOUT = 3.3V
VIN = 4.5V,
VOUT = 3.3V
MAX5082/MAX5083 1.5A, 40V, MAXPower Step-Down
DC-DC Converters
Maxim Integrated
│
5
www.maximintegrated.com
Typical Operating Characteristics (continued)
(VIN = 12V, see Figure 5 (MAX5082) and Figure 6 (MAX5083), TA = +25°C, unless otherwise noted.)
EFFICIENCY vs. LOAD CURRENT
MAX5082/3 toc13b
LOAD CURRENT (A)
EFFICIENCY (%)
0.10.01
20
30
40
50
60
70
80
90
100
0
0.001 101
VIN = 40V,
VOUT = 5V MAX5083
VIN = 24V,
VOUT = 5V
VIN = 12V,
VOUT = 5V
VIN = 7.5V,
VOUT = 5V
LOAD-TRANSIENT RESPONSE
MAX5082/3 toc14
VOUT
AC-COUPLED
200m/V/div
ILOAD
1A/div
200µs/div
VIN = 12V, IOUT = 0.5A TO 1.5A
MAX5082
0
LX VOLTAGE AND INDUCTOR CURRENT
MAX5082/3 toc15
ILOAD = 40mA
INDUCTOR
CURRENT
200mA/div
VLX
5V/div
2µs/div
LX VOLTAGE AND INDUCTOR CURRENT
MAX5082/3 toc16
VLX
5V/div
INDUCTOR CURRENT
100mA/div
2µs/div
ILOAD = 140mA
0
LX VOLTAGE AND INDUCTOR CURRENT
MAX5082/3 toc17
VLX
5V/div
INDUCTOR CURRENT
500mA/div
2µs/div
ILOAD = 1A
0
MAX5082/MAX5083 1.5A, 40V, MAXPower Step-Down
DC-DC Converters
Maxim Integrated
│
6
www.maximintegrated.com
Typical Operating Characteristics (continued)
Detailed Description
The MAX5082/MAX5083 are voltage-mode buck con-
verters with internal 0.3Ω power MOSFET switches. The
MAX5082 has a wide input voltage range of 4.5V to 40V.
The MAX5083’s input voltage range is 7.5V to 40V. The
internal low R
DS_ON
switch allows for up to 1.5A of output
current. The 250kHz fixed switching frequency, external
compensation, and voltage feed-forward simplify loop com-
pensation design and allow for a variety of L and C filter
components. Both devices offer an automatic switchover
to pulse-skipping (PFM) mode, providing low quiescent
current and high efficiency at light loads. Under no load, a
PFM mode operation reduces the current consumption to
only 1.4mA. In shutdown, the supply current falls to 200μA.
Additional features include an externally programmable
undervoltage lockout through the ON/OFF pin, a program-
mable soft-start, cycle-by-cycle current limit, hiccup mode
output short-circuit protection, and thermal shutdown.
PIN NAME FUNCTION
MAX5082 MAX5083
1 1 COMP Error Amplier Output. Connect COMP to the compensation feedback network.
2 2 FB
Feedback Regulation Point. Connect to the center tap of a resistive divider from converter
output to SGND to set the output voltage. The FB voltage regulates to the voltage present at
SS (1.23V).
3 3 ON/OFF
ON/OFF and External UVLO Control. The ON/OFF rising threshold is set to approximately
1.23V. Connect to the center tap of a resistive divider from IN to SGND to set the UVLO
(rising) threshold. Pull ON/OFF to SGND to shut down the device. ON/OFF can be used for
power-supply sequencing. Connect to IN for always-on operation.
4 4 SS Soft-Start and Reference Output. Connect a capacitor from SS to SGND to set the soft-start
time. See the Applications Information section to calculate the value of the SS capacitor.
5 5 SYNC
Oscillator Synchronization Input. SYNC can be driven by an external 150kHz to 350kHz
clock to synchronize the MAX5082/MAX5083’s switching frequency. Connect SYNC to
SGND when not used.
6 6 DVREG Gate Drive Supply for High-Side MOSFET Driver. Connect externally to REG for MAX5082.
Connect to REG and the anode of the boost diode for MAX5083.
7 — C+ Charge-Pump Flying Capacitor Positive Connection
8 — C- Charge-Pump Flying Capacitor Negative Connection
— 7, 8 N.C. No Connection. Not internally connected. Can be left oating or connected to SGND.
9 9 PGND
Power Ground Connection. Connect the input lter capacitor’s negative terminal, the
anode of the freewheeling diode, and the output lter capacitor’s return to PGND. Connect
externally to SGND at a single point near the input capacitor’s return terminal.
10 10 BST High-Side Gate Driver Supply. Connect BST to the cathode of the boost diode and to the
positive terminal of the boost capacitor.
11, 12 11, 12 LX Source Connection of Internal High-Side Switch. Connect the inductor and rectier diode’s
anode to LX.
13, 14 13, 14 IN Supply Input Connection. Connect to an external voltage source from 4.5V to 40V
(MAX5082) or a 7.5V to 40V (MAX5083).
15 15 REG Internal Regulator Output. 5V output for the MAX5082 and 8V output for the MAX5083.
Bypass to SGND with at least a 1μF ceramic capacitor.
16 16 SGND Signal Ground Connection. Solder the exposed pad to a large SGND plane. Connect SGND
and PGND together at one point near the input bypass capacitor return terminal.
EP EP — Exposed Pad. Connect exposed pad to SGND.
MAX5082/MAX5083 1.5A, 40V, MAXPower Step-Down
DC-DC Converters
www.maximintegrated.com Maxim Integrated
│
7
Pin Description
Internal Linear Regulator (REG)
REG is the output terminal of a 5V (MAX5082), or 8V
(MAX5083) LDO which is powered from IN and provides
power to the IC. Connect REG externally to DVREG to
provide power for the high-side MOSFET gate driver.
Bypass REG to SGND with a ceramic capacitor of at least
1μF. Place the capacitor physically close to the MAX5082/
MAX5083 to provide good bypassing. During normal
operation, REG is intended for powering up only the inter-
nal circuitry and should not be used to supply power to
external loads.
Internal UVLO/External UVLO
The MAX5082/MAX5083 provides two undervoltage lock-
outs (UVLOs). An internal UVLO looks at the input voltage
(VIN) and is fixed at 4.1V (MAX5082) or 7.1V (MAX5083).
An external UVLO is sensed and programmed at the ON/
OFF pin. The external UVLO overrides the internal UVLO
when the external UVLO is higher than the internal UVLO.
During startup, before any operation begins, the input volt-
age and the voltage at ON/OFF must exceed their respec-
tive UVLOs. The external UVLO has a rising threshold
of 1.23V with 0.12V of hysteresis. Program the external
UVLO by connecting a resistive divider from IN to ON/OFF
to SGND. Connect ON/OFF to IN directly to disable the
external UVLO.
Driving ON/OFF to ground places the MAX5082/MAX5083
in shutdown. When in shutdown, the internal power
MOSFET turns off, all internal circuitry shuts down and
the quiescent supply current reduces to 200μA. Connect
an RC network from ON/OFF to SGND to set a turn-on
delay that can be used to sequence the output voltages of
multiple devices.
Figure 1. MAX5082 Simplified Block Diagram
1.23V
1.23V
ON/OFF
DVREG
PCLK
LDO
EN
IN
REG
SS
FB
THERMAL
SHDN
REF
IN
0.3V
CLK
1.23V
REGOK
EN
VREF
VREF
ISS
>1.23V ON
<1.11V OFF
COMP
SYNC
E/A SSA
CPWM
RAMP
LOGIC
EN
OSC
CHARGE-PUMP
MANAGEMENT
PCLK
BST
IN
SGND
LX
PGND
SCLK
HIGH-SIDE
CURRENT
SENSE
REF_PFM
PFM
REF_ILIM
ILIM
OVERL
CLK
ILIM
OVERLOAD
MANAGEMENT
DVREGC+
DVREG
C-
LEVEL
SHIFT
MAX5082
MAX5082/MAX5083 1.5A, 40V, MAXPower Step-Down
DC-DC Converters
www.maximintegrated.com Maxim Integrated
│
8
Soft-Start and Reference (SS)
SS is the 1.23V reference bypass connection for the
MAX5082/MAX5083 and also controls the soft-start peri-
od. At startup, after VIN is applied and the internal and
external UVLO thresholds are reached, the device enters
soft-start. During soft-start, 15μA is sourced into the
capacitor (CSS) connected from SS to SGND causing the
reference voltage to ramp up slowly. When VSS reaches
1.23V the output becomes fully active. Set the soft-start
time (tSS) using the following equation:
SS
SS
1.23V C
15µA
×
where tSS is in seconds and CSS is in Farads.
Internal Charge Pump (MAX5082)
The MAX5082 features an internal charge pump to
enhance the turn-on of the internal MOSFET, allowing
for operation with input voltages down to 4.5V. Connect
a flying capacitor (CF) between C+ and C-, a boost diode
from C+ to BST, as well as a bootstrap capacitor (CBST)
between BST and LX to provide the gate-drive voltage
for the high-side n-channel DMOS switch. During the on-
time, the flying capacitor is charged to VDVREG. During
the off-time, the positive terminal of the flying capacitor
(C+) is pumped to two times VDVREG and charge is
dumped onto CBST to provide twice the regulator voltage
across the high-side DMOS driver. Use a ceramic capaci-
tor of at least 0.1μF for CBST and CF located as close to
the device as possible.
For applications that do not require a 4.5V minimum input,
use the MAX5083. In this device, the charge pump is
Figure 2. MAX5083 Simplified Block Diagram
1.23V
1.23V
ON/OFF
LDO
EN
IN
REG
SS
FB
THERMAL
SHDN
REF
IN
0.3V
CLK ILIM
1.23V
REGOK
EN
VREF
VREF
ISS
>1.23V ON
<1.11V OFF
COMP
SYNC
E/A SSA
CPWM
RAMP
LOGIC
EN
OSC
BOOTSTRAP
CONTROL
PCLK
BST
IN
SGND
LX
DVREG
PGND
SCLK
HIGH-SIDE
CURRENT
SENSE
REF_PFM
PFM
REF_ILIM
ILIM
OVERL
CLK
ILIM
OVERLOAD
MANAGEMENT
MAX5083
MAX5082/MAX5083 1.5A, 40V, MAXPower Step-Down
DC-DC Converters
www.maximintegrated.com Maxim Integrated
│
9
omitted and the input voltage range is from 7.5V to 40V.
In this situation, the boost diode and the boost capacitor
are still required (see the MAX5083 Typical Operating
Circuit).
Gate Drive Supply (DVREG)
DVREG is the supply input for the internal high-side
MOSFET driver. The power for DVREG is derived from
the output of the internal regulator (REG). Connect
DVREG to REG externally. We recommend the use of an
RC (1Ω and 0.47μF) filter from REG to DVREG to filter
the noise generated by the switching of the charge pump.
In the MAX5082, the high-side drive supply is generated
using the internal charge pump along with the bootstrap
diode and capacitor. In the MAX5083, the high-side
MOSFET driver supply is generated using only the boot-
strap diode and capacitor.
Error Amplier
The output of the internal error amplifier (COMP) is avail-
able for frequency compensation (see the Compensation
Design section). The inverting input is FB, the noninvert-
ing input SS, and the output COMP. The error amplifier
has an 80dB open-loop gain and a 1.8MHz GBW product.
See the Typical Operating Character-istics for the Gain
and Phase vs. Frequency graph.
Oscillator/Synchronization Input (SYNC)
With SYNC tied to SGND, the MAX5082/MAX5083 use
their internal oscillator and switch at a fixed frequency of
250kHz. For external synchronization, drive SYNC with
an external clock from 150kHz to 350kHz. When driven
with an external clock, the device synchronizes to the ris-
ing edge of SYNC.
PWM Comparator/Voltage Feed-Forward
An internal 250kHz ramp generator is compared against
the output of the error amplifier to generate the PWM
signal. The maximum amplitude of the ramp (VRAMP)
automatically adjusts to compensate for input voltage and
oscillator frequency changes. This causes the VIN/VRAMP
to be a constant 10V/V across the input voltage range of
4.5V to 40V (MAX5082) or 7.5V to 40V (MAX5083) and
the SYNC frequency range of 150kHz to 350kHz.
Output Short-Circuit Protection
(Hiccup Mode)
The MAX5082/MAX5083 protects against an output short
circuit by utilizing hiccup-mode protection. In hiccup mode,
a series of sequential cycle-by-cycle current-limit events
will cause the part to shut down and restart with a soft-start
sequence. This allows the device to operate with a continu-
ous output short circuit.
During normal operation, the current is monitored at the
drain of the internal power MOSFET. When the current
limit is exceeded, the internal power MOSFET turns off until
the next on-cycle and a counter increments. If the counter
counts four consecutive current-limit events, the device
discharges the soft-start capacitor and shuts down for 512
clock periods before restarting with a soft-start sequence.
Each time the power MOSFET turns on and the device
does not exceed the current limit, the counter is reset.
Thermal-Overload Protection
The MAX5082/MAX5083 feature an integrated ther-
maloverload protection. Thermal-overload protection lim-
its the total power dissipation in the device and protects
it in the event of an extended thermal fault condition.
When the die temperature exceeds +160°C, an internal
thermal sensor shuts down the part, turning off the power
MOSFET and allowing the IC to cool. After the tempera-
ture falls by 20°C, the part will restart with a soft-start
sequence.
Applications Information
Setting the Undervoltage Lockout
When the voltage at ON/OFF rises above 1.23V, the
MAX5082/MAX5083 turns on. Connect a resistive divider
from IN to ON/OFF to SGND to set the UVLO threshold
(see Figure 5). First select the ON/OFF to the SGND resis-
tor (R2) then calculate the resistor from IN to ON/OFF (R1)
using the following equation:
IN
ON/OFF
V
R1 R2 1
V−
= ×
where VIN is the input voltage at which the converter
turns on, VON/OFF = 1.23V and R2 is chosen to be less
than 600kΩ.
If the external UVLO divider is not used, connect ON/OFF
to IN directly. In this case, an internal undervoltage lock-
out feature monitors the supply voltage at IN and allows
operation to start when IN rises above 4.1V (MAX5082)
and 7.1V (MAX5083).
Setting the Output Voltage
Connect a resistive divider from OUT to FB to SGND
to set the output voltage (see Figure 5). First calculate
the resistor from OUT to FB using the guidelines in the
Compensation Design section. Once R3 is known, calcu-
late R4 using the following equation:
MAX5082/MAX5083 1.5A, 40V, MAXPower Step-Down
DC-DC Converters
www.maximintegrated.com Maxim Integrated
│
10
OUT
FB
R3
R4 V1
V−
=
where VFB = 1.23V.
Inductor Selection
Three key inductor parameters must be specified for oper-
ation with the MAX5082/MAX5083: inductance value (L),
peak inductor current (IPEAK), and inductor saturation cur-
rent (ISAT). The minimum required inductance is a function
of operating frequency, input-to-output voltage differential,
and the peak-to-peak inductor current (ΔIP-P). Higher
ΔIP-P allows for a lower inductor value while a lower ΔIP-P
requires a higher inductor value. A lower inductor value
minimizes size and cost and improves large-signal and
transient response, but reduces efficiency due to higher
peak currents and higher peak-to-peak output voltage
ripple for the same output capacitor. On the other hand,
higher inductance increases efficiency by reducing the
ripple current. Resistive losses due to extra wire turns can
exceed the benefit gained from lower ripple current levels
especially when the inductance is increased without also
allowing for larger inductor dimensions. A good compro-
mise is to choose ΔIP-P equal to 40% of the full load cur-
rent. Calculate the inductor using the following equation:
OUT IN OUT
-
IN SW P P
V (V V )
LVf I
−
=× ×∆
VIN and VOUT are typical values so that efficiency is
optimum for typical conditions. The switching frequency
(fSW) is fixed at 250kHz or can vary between 150kHz
and 350kHz when synchronized to an external clock
(see the Oscillator/Synchronization Input (SYNC) sec-
tion). The peak-to-peak inductor current, which reflects
the peak-topeak output ripple, is worst at the maximum
input voltage. See the Output Capacitor Selection section
to verify that the worst-case output ripple is acceptable.
The inductor saturating current (ISAT) is also important
to avoid runaway current during continuous output short
circuit. Select an inductor with an ISAT specification higher
than the maximum peak current limit of 3.5A.
Input Capacitor Selection
The discontinuous input current of the buck converter
causes large input ripple currents and therefore the input
capacitor must be carefully chosen to keep the input
voltage ripple within design requirements. The input volt-
age ripple is comprised of ΔVQ (caused by the capacitor
discharge) and ΔVESR (caused by the ESR of the input
capacitor). The total voltage ripple is the sum of ΔVQ and
ΔVESR. Calculate the input capacitance and ESR required
for a specified ripple using the following equations:
ESR
-
PP
OUT_MAX
OUT_MAX
IN Q SW
V
ESR I
I2
I D(1 D)
CVf
−
∆
=∆
+
×
=∆×
where
IN OUT OUT
-
PP IN SW
OUT
IN
(V V ) V
I and
Vf L
V
DV
−×
∆= ××
=
IOUT_MAX is the maximum output current, D is the duty
cycle, and fSW is the switching frequency.
The MAX5082/MAX5083 includes internal and external
UVLO hysteresis and soft-start to avoid possible unin-
tentional chattering during turn-on. However, use a bulk
capacitor if the input source impedance is high. Use
enough input capacitance at lower input voltages to avoid
possible undershoot below the undervoltage lockout
threshold during transient loading.
Output Capacitor Selection
The allowable output voltage ripple and the maximum
deviation of the output voltage during load steps deter-
mine the output capacitance and its ESR. The output
ripple is mainly composed of ΔVQ (caused by the capaci-
tor discharge) and ΔVESR (caused by the voltage drop
across the equivalent series resistance of the output
capacitor). The equations for calculating the peak-to-peak
output voltage ripple are:
P-P
QOUT SW
-
ESR P P
I
V16 C f
V ESR I
∆
∆=
××
∆ = ×∆
Normally, a good approximation of the output voltage rip-
ple is ΔVRIPPLE ≈ ΔVESR + ΔVQ. If using ceramic capaci-
tors, assume the contribution to the output voltage ripple
from ESR and the capacitor discharge to be equal to 20%
and 80%, respectively. ΔIP-P is the peak-to-peak inductor
current (see the Input Capacitors Selection section) and
fSW is the converter’s switching frequency.
MAX5082/MAX5083 1.5A, 40V, MAXPower Step-Down
DC-DC Converters
www.maximintegrated.com Maxim Integrated
│
11
The allowable deviation of the output voltage during fast
load transients also determines the output capacitance,
its ESR, and its equivalent series inductance (ESL).
The output capacitor supplies the load current during
a load step until the controller responds with a greater
duty cycle. The response time (tRESPONSE) depends
on the closed-loop bandwidth of the converter (see the
Compensation Design section). The resistive drop across
the output capacitor’s ESR, the drop across the capaci-
tor’s ESL (ΔVESL), and the capacitor discharge causes
a voltage droop during the loadstep. Use a combination
of low-ESR tantalum/aluminum electrolyte and ceramic
capacitors for better transient load and voltage ripple
performance. Nonleaded capacitors and capacitors in
parallel help reduce the ESL. Keep the maximum output
voltage deviation below the tolerable limits of the elec-
tronics being powered. Use the following equations to
calculate the required ESR, ESL, and capacitance value
during a load step:
ESR
STEP
STEP RESPONSE
OUT Q
ESL STEP
STEP
V
ESR I
It
CV
Vt
ESL I
×
×
∆
=
=∆
∆
=
where ISTEP is the load step, tSTEP is the rise time of the
load step, and tRESPONSE is the response time of the
controller.
Compensation Design
The MAX5082/MAX5083 use a voltage-mode control
scheme that regulates the output voltage by comparing
the error amplifier output (COMP) with an internal ramp
to produce the required duty cycle. The output lowpass
LC filter creates a double pole at the resonant frequency,
which has a gain drop of -40dB/decade. The error ampli-
fier must compensate for this gain drop and phase shift to
achieve a stable closed-loop system.
The basic regulator loop consists of a power modulator,
an output feedback divider, and a voltage-error amplifier.
The power modulator has a DC gain set by VIN/VRAMP,
with a double pole and a single zero set by the output
inductance (L), the output capacitance (COUT) (C5 in
the Typical Application Circuit) and its equivalent series
resistance (ESR). The power modulator incorporates a
voltage feed-forward feature, which automatically adjusts
for variations in the input voltage resulting in a DC gain of
10. The following equations define the power modulator:
IN
MOD(DC) RAMP
LC OUT
ZESR OUT
V
G 10
V
1
f2 LC
1
f2 C ESR
= =
=π×
=π× ×
The switching frequency is internally set at 250kHz or can
vary from 150kHz to 350kHz when driven with an external
SYNC signal. The crossover frequency (fC), which is the
frequency when the closed-loop gain is equal to unity,
should be set at 15kHz or below therefore:
fC ≤ 15kHz
The error amplifier must provide a gain and phase bump
to compensate for the rapid gain and phase loss from the
LC double pole. This is accomplished by utilizing a type 3
compensator that introduces two zeroes and 3 poles into
the control loop. The error amplifier has a low-frequency
pole (fP1) near the origin.
The two zeros are at:
Z1 Z2
11
f and f
2 R5 C7 2 (R6 R3) C6
= =
π× × π× + ×
and the higher frequency poles are at:
P2 P3
11
f and f
2 R6 C6 C7 C8
2 R5 C7 C8
= =
π× ×
×
π× ×
+
Compensation When fC < fZESR
Figure 3 shows the error amplifier feedback as well as its
gain response for circuits that use low-ESR output capaci-
tors (ceramic). In this case fZESR occurs after fC.
fZ1 is set to 0.8 x fLC(MOD) and fZ2 is set to fLC to
compensate for the gain and phase loss due to the
double pole. Choose the inductor (L) and output capacitor
(COUT) as described in the Inductor and Output Capacitor
Selection section.
MAX5082/MAX5083 1.5A, 40V, MAXPower Step-Down
DC-DC Converters
www.maximintegrated.com Maxim Integrated
│
12
Pick a value for the feedback resistor R5 in Figure 3
(values between 1kΩ and 10kΩ are adequate).
C7 is then calculated as:
LC
1
C7 2 0.8 f R5
=π× × ×
fC occurs between fZ2 and fP2. The error-amplifier gain
(GEA) at fC is due primarily to C6 and R5. Therefore,
GEA(fC) = 2π x fC x C6 x R5 and the modulator gain at
fC is:
22
MOD(DC)
MOD(fC) OUT C
G
G(2 ) L C f
=π×× ×
Since GEA(fC) x GMOD(fC) = 1, C6 is calculated by:
C OUT
MOD(DC)
f LC 2
C6 R5 G
× × ×π
=×
fP2 is set at one-half the switching frequency (fSW). R6 is
then calculated by:
SW
1
R6 2 C6 0.5 f
=π× × ×
Since R3 >> R6, R3 + R6 can be approximated as R3. R3
is then calculated as:
LC
1
R3 2 f C6
≈π× ×
fP3 is set at 5xfC. Therefore, C8 is calculated as:
P3
C7
C8 (2 C7 R5 f 1)
−
=π× × ×
Compensation When fC > fZESR
For larger ESR capacitors such as tantalum and aluminum
electrolytic ones, fZESR can occur before fC. If fZESR < fC,
then fC occurs between fP2 and fP3. fZ1 and fZ2 remain
the same as before however, fP2 is now set equal to fZESR.
The output capacitor’s ESR zero frequency is higher than
fLC but lower than the closedloop crossover frequency.
The equations that define the error amplifier’s poles and
zeroes (fZ1, fZ2, fP1, fP2, and fP3) are the same as before.
However, fP2 is now lower than the closed-loop crossover
frequency. Figure 4 shows the error amplifier feedback as
well as its gain response for circuits that use higher-ESR
output capacitors (tantalum or aluminum electrolytic).
Pick a value for the feedback resistor R5 in Figure 4 (val-
ues between 1kΩ and 10kΩ are adequate).
C7 is then calculated as:
LC
1
C7 2 0.8 f R5
=π× × ×
The error amplifier gain between fP2 and fP3 is approxi-
mately equal to R5/R6 (given that R6 << R3). R6 can then
be calculated as:
2
LC
2
C
R5 10 f
R6 f
××
≈
C6 is then calculated as:
OUT
C ESR
C6 R6
×
=
Figure 3. Error Amplifier Compensation Circuit (Closed-Loop
and Error-Amplifier Gain Plot) for Ceramic Capacitors
GAIN
(dB)
VOUT
REF
R3
COMP
R6
R5
C6
R4
FREQUENCY
CLOSED-LOOP
GAIN
EA
GAIN
fZ1 fZ2 fCfP2 fP3
C8
EA
C7
MAX5082/MAX5083 1.5A, 40V, MAXPower Step-Down
DC-DC Converters
www.maximintegrated.com Maxim Integrated
│
13
Since R3 >> R6, R3 + R6 can be approximated as R3. R3
is then calculated as:
LC
1
R3 2 f C6
≈π× ×
fP3 is set at 5xfC. Therefore, C8 is calculated as:
P3
C7
C8 (2 C7 R5 f 1)
−
=π× × ×
Power Dissipation
The MAX5082/MAX5083 is available in a thermally
enhanced package and can dissipate up to 2.7W at
TA = +70°C. When the die temperature reaches +160°C,
the part shuts down and is allowed to cool. After the part
cools by 20°C, the device restarts with a soft-start.
The power dissipated in the device is the sum of the
power dissipated from supply current (PQ), transition
losses due to switching the internal power MOSFET
(PSW), and the power dissipated due to the RMS current
through the internal power MOSFET (PMOSFET). The
total power dissipated in the package must be limited
such that the junction temperature does not exceed its
absolute maximum rating of +150°C at maximum ambient
temperature. Calculate the power lost in the MAX5082/
MAX5083 using the following equations:
The power loss through the switch:
2
MOSFET RMS_MOSFET ON
22
RMS_MOSFET PK PK DC DC
PP
PK OUT
PP
DC OUT
PI R
D
I I (I I ) I 3
I
II 2
I
II
2
−
−
= ×
= +×+ ×
∆
= +
∆
= −
RON is the on-resistance of the internal power MOSFET
(see the Electrical Characteristics).
The power loss due to switching the internal MOSFET:
IN OUT R F SW
SW V I (t t ) f
P 4
× ×××
=
where tR and tF are the rise and fall times of the internal
power MOSFET measured at LX.
The power loss due to the switching supply current
(ISW):
PQ = VIN x ISW
The total power dissipated in the device will be:
PTOTAL = PMOSFET + PSW + PQ
Figure 4. Error Amplifier Compensation Circuit (Closed-Loop
and Error Amplifier Gain Plot) for Higher ESR Output Capacitors
GAIN
(dB)
VOUT
REF
R3
COMP
R6
R5
C6
R4
FREQUENCY
CLOSED-LOOP
GAIN
EA
GAIN
fZ1 fZ2 fCfP2 fP3
C8
EA
C7
MAX5082/MAX5083 1.5A, 40V, MAXPower Step-Down
DC-DC Converters
www.maximintegrated.com Maxim Integrated
│
14
Chip Information
TRANSISTOR COUNT: 4300
PROCESS: BiCMOS/DMOS
Figure 5. MAX5082 Typical Application Circuit
Figure 6. MAX5083 Typical Application Circuit
VIN
4.5V TO 40V
ON/OFF
C1
10F
R1
1.4MΩ
R2
549kΩ
C2
0.1µF
C10
0.1µF
PGND
REG
LX
FB
IN
SYNC SGND PGND SS COMP
DVREG C-
C3
0.1µF
VOUT
PGND
C4
0.1µF
C9
0.047µF
D1
D2
L1
47µH
C8
820pF
C5
47µF R6
187Ω
R5
3.01kΩ
C+ BST
C7
22nF
C6
6.8nF
R3
6.81kΩ
R4
4.02kΩ
MAX5082
VIN
7.5V TO 40V
ON/OFF
C1
10F
R1
1.4MΩ
R2
301kΩ
C2
0.1µF
C10
0.1µF
PGND
REG
LX
FB
IN
SYNC SGND PGND SS COMP
DVREG
VOUT
PGND
C4
0.1µF
C9
0.047µF
D1
D2
L1
47µH
C8
820pF
C5
47µF R6
187Ω
R5
3.01kΩ
BST
C7
22nF
C6
6.8nF
R3
6.81kΩ
R4
4.02kΩ
MAX5083
MAX5082/MAX5083 1.5A, 40V, MAXPower Step-Down
DC-DC Converters
www.maximintegrated.com Maxim Integrated
│
15
Typical Application Circuits
VIN
7.5V TO 40V
ON/OFF
C1
R1
R2
C2
PGND
REG
LX
FB
IN
SYNC SGND PGND SS COMP
DVREG
VOUT
PGND
CBST
CSS
D1
D2
L1
C8
C5
R6
R5
BST
C7
C6
R3
R4
MAX5083
TOP VIEW
12
13
14
15
16
8
7
6
5
11 10 9
1 2 3 4
LX
LX
BST
PGND
C-
C+
DVREG
SYNC
IN
SGND
COMP
FB
0N/OFF
SS
IN
REG
TQFN
12
13
14
15
16
8
7
6
5
11 10 9
1 2 3 4
LX
LX
BST
PGND
N.C.
N.C.
DVREG
SYNC
IN
SGND
COMP
FB
0N/OFF
SS
IN
REG
TQFN
MAX5082 MAX5083
MAX5082/MAX5083 1.5A, 40V, MAXPower Step-Down
DC-DC Converters
www.maximintegrated.com Maxim Integrated
│
16
Typical Operating Circuits (continued)
Pin Congurations
MAX5082/MAX5083 1.5A, 40V, MAXPower Step-Down
DC-DC Converters
www.maximintegrated.com Maxim Integrated
│
17
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character,
but the drawing pertains to the package regardless of RoHS
status.
PACKAGE
TYPE
PACKAGE
CODE
DOCUMENT
NO.
LAND
PATTERN NO.
16 TQFN-EP T1655+3 21-0140
Refer to
Application
Note 1891
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
MAX5082/MAX5083 1.5A, 40V, MAXPower Step-Down
DC-DC Converters
© 2014 Maxim Integrated Products, Inc.
│
18
REVISION HISTORY
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 5/05 Initial release —
1 5/14 Removed automotive reference under Applications section on Page 1 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
