DG9454E
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Low Capacitance, +12 V / +5 V / +3 V, Triple SPDT (Triple 2:1)
Analog Switch / Multiplexer
DESCRIPTION
The DG9454E is a high precision triple SPDT (triple 2:1)
analog switch / multiplexer with enhanced performance on
low power consumption. The part features low parasitic
capacitance, low leakage, and low charge injection over the
full signal range which make it an ideal switch for healthcare,
data acquisition, and instrument products. Its compact size,
light weight, low power consumption, and low voltage
control capability are of advantages in portable consumer
applications such as goggles.
The DG9454E is designed to operate from a 3 V to 16 V
supply at V+, and 2.5 V to 5.5 V at VL, while guarantees
1.8 V logic compatible over the full operation voltage range.
Processed with advanced CMOS technology, the DG9454E
conducts equally well in both directions, offers rail to rail
analog signal handling and can be used both as a
multiplexer as well as a de-multiplexer.
The DG9454E operating temperature is specified
from -40 °C to +125 °C. It is available in ultra-compact
1.8 mm x 2.6 mm miniQFN16 package of lead (Pb)-free
nickel-palladium-gold device termination. It is represented
by the lead (Pb)-free “-E4” suffix. The nickel-palladium-gold
device terminations meet all JEDEC® standards for reflow
and MSL ratings.
FEATURES
• Operates with V+ = 3 V to 16 V,
VL = 2.5 V to 5.5 V
• Guaranteed 1.8 V logic control at full V+ range
• Low power consumption, both I+ and IL < 1 μA
• Low parasitic capacitance:
CD(ON): 8.8 pF
CD(OFF): 4 pF
CS(OFF): 3.1 pF
• High bandwidth: 356 MHz
• Low charge injection over the full signal range
• Compact miniQFN16 package
(1.8 mm x 2.6 mm x 0.55 mm)
• Material categorization: for definitions of
compliance please see www.vishay.com/doc?99912
APPLICATIONS
• Medical and healthcare systems
• Data acquisition systems
• Meters and instruments
• Games and Goggles
• Automatic test equipment
• Process control and automation
• Communication systems
• Battery powered systems
BENEFITS
• Low power consumption
• Precision switching
• Low voltage logic interface
• Bi-directional rail to rail signal switching
• Compact package option
• Extended operation temperature range
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
Pin 1
Device Marking: Jxx for DG9454E
(miniQFN16)
xx = Date/Lot Traceability Code
Yxx
Z1
Z
Z0
1
2
3
4
7
8
9
10
11
12
58
7
6
13
14
15
16
Y
Y1
Y0
GND
Top View
DG9454E
mQFN-16
V+
Enable
VL
A
B
C
X1
X
X0
DG9454E
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S16-0652-Rev. A, 18-Apr-16 2Document Number: 67172
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Notes
a. Signals on SX, DX, VL or INX exceeding V+ will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC board.
c. Derate 6.6 mW/°C above 70 °C.
d. Manual soldering with iron is not recommended for leadless components. The miniQFN-16 is a leadless package. The end of the lead
terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper lip
cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
TRUTH TABLE
ENABLE
INPUT
SELECT INPUTS ON SWITCHES
C B A DG9454E
H X X X All Switches Open
L L L L X to X0, Y to Y0, Z to Z0
L L L H X to X1, Y to Y0, Z to Z0
L L H L X to X0, Y to Y1, Z to Z0
L L H H X to X1, Y to Y1, Z to Z0
L H L L X to X0, Y to Y0, Z to Z1
L H L H X to X1, Y to Y0, Z to Z1
L H H L X to X0, Y to Y1, Z to Z1
L H H H X to X1, Y to Y1, Z to Z1
ORDERING INFORMATION
TEMP. RANGE PACKAGE PART NUMBER MIN. ORDER / PACK. QUANTITY
-40 °C to +85 °C lead (Pb)-free 16-Pin miniQFN DG9454EEN-T1-GE4 Tape and reel, 3000 units
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
PARAMETER LIMIT UNIT
Digital Inputs a, VS, VD, VLGND - 0.3 to (V+) + 0.3
or 30 mA, whichever occurs first V
V+ to GND -0.3 to +18
Continuous Current (any terminal) 30 mA
Peak Current, S or D (pulsed 1 ms, 10 % duty cycle) 100
Storage Temperature -65 to +150 °C
Power Dissipation b16-Pin miniQFN c, d 525 mW
Thermal Resistance b16-Pin miniQFN d152 °C/W
Latch-Up (per JESD78) 100 mA
ESD Human Body Model (HBM); per ANSI / ESDA / JEDEC JS-001 2500 V
DG9454E
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S16-0652-Rev. A, 18-Apr-16 3Document Number: 67172
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SPECIFICATIONS FOR UNIPOLAR SUPPLIES
PARAMETER SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE SPECIFIED
V+ = 12 V, VL = 2.7 V
VIN(A, B, C and enable) = 1.8 V, 0.5 V a
TEMP. b TYP. c
-40 °C to +125 °C -40 °C to +85 °C
UNIT
MIN. d MAX. d MIN. d MAX. d
Analog Switch
Analog Signal Range eVANALOG Full - 0 12 0 12 V
On-Resistance RON IS = 1 mA, VD = 0.7 V, 6 V, 11.3 V Room 85 - 103 - 103
Full - - 133 - 125
On-Resistance Match RON IS = 1 mA, VD = 0.7 V, 11.3 V Room 1.24 - 8 - 8
Full - - 8 - 8
On-Resistance Flatness RFLATNESS IS = 1 mA, VD = 0.7 V, 6 V, 11.3 V Room 27 - 37 - 37
Full - - 44 - 43
Switch Off
Leakage Current
IS(off) V+ = 13.2 V, VL = 2.7 V
VD = 1 V / 12.2 V, VS = 12.2 V / 1 V
Room ± 0.05 -1 1 -1 1
nA
Full - -50 50 -5 5
ID(off)
Room ± 0.07 -1 1 -1 1
Full - -50 50 -5 5
Channel On
Leakage Current ID(on) V+ = 13.2 V, VL = 2.7 V
VD = VS = 1 V / 12.2 V
Room ± 0.07 -1 1 -1 1
Full - -50 50 -5 5
Digital Control
Logic Low Input Voltage VINL VL = 2.7 V Full - - 0.5 - 0.5 V
Logic High Input Voltage VINH Full - 1.8 - 1.8 -
Logic Low Input Current IL
VIN(A0, A1, A2 and enable)
under test = 0.5 V Full 0.02 -1 1 -1 1
μA
Logic High Input current IH
V
IN(A0, A1, A2 and enable)
under test = 1.8 V
Full 0.02 -1 1 -1 1
Dynamic Characteristics
Transition Time tTRANS
RL = 300 , CL = 35 pF
see Fig. 1, 2, 3
Room 79 - 119 - 119
ns
Full - - 134 - 126
Enable Turn-On Time tON(EN)
Room 70 - 110 - 110
Full - - 130 - 116
Enable Turn-Off Time tOFF(EN)
Room 51 - 91 - 91
Full - - 95 - 94
Break-Before-Make
Time Delay tD
Room 17 - - - -
Full - 1 - 1 -
Charge Injection eQC
L = 1 nF, RGEN = 0 , VGEN = 0 V Full 5.84 - - - - pC
Off Isolation eOIRR
f = 1 MHz,
RL = 50 , CL = 5 pF
100 kHz Room -95 - - - -
dB
1 MHz Room -85 - - - -
10 MHz Room -65 - - - -
Crosstalk eXTALK
100 kHz Room -92 - - - -
1 MHz Room -73 - - - -
10 MHz Room -53 - - - -
Bandwidth, -3 dB eBW RL = 50 Room 356 - - - - MHz
Source Off Capacitance
e
CS(off)
f = 1 MHz
Room 3.1 - - - -
pF
Drain Off Capacitance
e
CD(off) Room 4 - - - -
Channel On Capacitance
e
CD(on) Room 8.8 - - - -
Total Harmonic
Distortion eTHD Signal = 1 VRMS,
20 Hz to 20 kHz, RL = 600 Room 0.075 - - - - %
DG9454E
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S16-0652-Rev. A, 18-Apr-16 4Document Number: 67172
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Notes
a. VIN = input voltage to perform proper function.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet.
e. Guaranteed by design, not subject to production test.
Power Supply
Power Supply Range I+
VIN(A, B, C and enable) = 0 V or 12 V
Room 0.05 - 1 - 1
μA
Full - - 10 - 10
Ground Current IGND
Room 0.05 -1 - -1 -
Full - -10 - -10 -
Logic Supply Current ILVL = 2.7 V Room 0.05 - 1 - 1
Full - - 10 - 10
SPECIFICATIONS FOR UNIPOLAR SUPPLIES
PARAMETER SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE SPECIFIED
V+ = 12 V, VL = 2.7 V
VIN(A, B, C and enable) = 1.8 V, 0.5 V a
TEMP. b TYP. c
-40 °C to +125 °C -40 °C to +85 °C
UNIT
MIN. d MAX. d MIN. d MAX. d
DG9454E
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S16-0652-Rev. A, 18-Apr-16 5Document Number: 67172
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Notes
a. VIN = input voltage to perform proper function.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet.
e. Guaranteed by design, not subject to production test.
SPECIFICATIONS FOR UNIPOLAR SUPPLIES
PARAMETER SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE SPECIFIED
V+ = 5 V, VL = 2.7 V
VIN(A, B, C and enable) = 1.8 V, 0.5 V a
TEMP.
b TYP.
c
-40 °C to +125 °C -40 °C to +85 °C
UNIT
MIN. dMAX. dMIN. dMAX. d
Analog Switch
Analog Signal Range eVANALOG Full - 0 5 0 5 V
On-Resistance RON IS = 1 mA, VD = 0 V, 3.5 V Room 125 - 147 - 147
Full - - 176 - 168
On-Resistance Match RON IS = 1 mA, VD = 3.5 V Room 1.33 - 8 - 8
Full - - 8 - 8
On-Resistance Flatness RFLATNESS IS = 1 mA, VD = 0 V, 3 V Room 21 - 31 - 31
Full - - 25 - 29
Switch Off
Leakage Current
IS(off) V+ = 5.5 V, V- = 0 V
VD = 1 V / 4.5 V, VS = 4.5 V / 1 V
Room ± 0.03 -1 1 -1 1
nA
Full - -50 50 -5 5
ID(off)
Room ± 0.03 -1 1 -1 1
Full - -50 50 -5 5
Channel On
Leakage Current ID(on) V+ = 5.5 V, V- = 0 V
VD = VS = 1 V / 4.5 V
Room ± 0.03 -1 1 -1 1
Full - -50 50 -5 5
Digital Control
VIN(A, B, C and enable) Low VIL VL = 2.7 V Full - - 0.6 - 0.6 V
VIN(A, B, C and enable) High VIH VL = 2.7 V Full - 1.8 - 1.8 -
Input Current, VIN Low ILVIN(A, B, C and enable) under test = 0.6 V Full 0.02 -1 1 -1 1 μA
Input Current, VIN High IHVIN(A, B, C and enable) under test = 1.8 V Full 0.02 -1 1 -1 1
Dynamic Characteristics
Transition Time tTRANS
RL = 300 , CL = 35 pF
see Fig. 1, 2, 3
Room 95 - 135 - 135
ns
Full - - 164 - 152
Enable Turn-On Time tON
Room 80 - 120 - 120
Full - - 138 - 129
Enable Turn-Off Time tOFF
Room 58 - 98 - 98
Full - - 106 - 103
Break-Before-Make
Time Delay tD
Room 45 - - - -
Full - 24 - 15 -
Charge Injection eQV
g = 0 V, Rg = 0 , CL = 1 nF Full 1.44 - - - - pC
Off Isolation eOIRR RL = 50 , CL = 5 pF
f = 100 kHz
Room -95 - - - -
dB
Channel-to-Channel
Crosstalk eXTALK Room -92 - - - -
Source Off Capacitance eCS(off)
f = 1 MHz
Room 3.5 - - - -
pFDrain Off Capacitance eCD(off) Room 4.5 - - - -
Channel On Capacitance eCD(on) Room 10.2 - - - -
Power Supply
Power Supply Current I+
VIN(A, B, C and enable) = 0 V or 5 V
Room 0.05 - 1 - 1
μA
Full - - 10 - 10
Ground Current IGND
Room -0.05 -1 - -1 -
Full - -10 - -10 -
Logic Supply Current ILVL = 2.7 V Room 0.05 - 1 - 1
Full - - 10 - 10
DG9454E
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S16-0652-Rev. A, 18-Apr-16 6Document Number: 67172
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Notes
a. VIN = input voltage to perform proper function.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this datasheet.
e. Guaranteed by design, not subject to production test.
SPECIFICATIONS FOR UNIPOLAR SUPPLIES
PARAMETER SYMBOL
TEST CONDITIONS
UNLESS OTHERWISE SPECIFIED
V+ = 3 V, VL = 2.7 V
VIN(A, B, C AND ENABLE) = 1.5 V, 0.6 V a
TEMP.
b TYP. c
-40 °C
to
+125 °C
-
40 °C
to
+85 °C
UNIT
MIN. dMAX. dMIN. dMAX. d
Analog Switch
Analog Signal Range eVANALOG Full - 0 3 0 3 V
On-Resistance RON IS = 1 mA, VD = 1.5 V Room 221 - - - -
Full - - - - -
Switch Off
Leakage Current
IS(off) V+ = 3.3 V, VL = 2.7 V
VD = 0.3 V / 3 V, VS = 3 V / 0.3 V
Room ± 0.02 -1 1 -1 1
nA
Full - -50 50 -5 5
ID(off)
Room ± 0.02 -1 1 -1 1
Full - -50 50 -5 5
Channel On
Leakage Current ID(on) V+ = 3.3 V, VL = 2.7 V
VS = VD = 0.3 V / 3 V
Room ± 0.02 -1 1 -1 1
Full - -50 50 -5 5
Digital Control
Logic Low Input Voltage VINL VL = 2.7 V Full - - 0.6 - 0.6 V
Logic High Input Voltage VINH Full - 1.8 - 1.8 -
Logic Low Input Current IL
VIN(A0, A1, A2 and enable)
under test = 0.6 V Full 0.02 -1 1 -1 1
μA
Logic High Input Current IH
V
IN(A0, A1, A2 and enable)
under test = 1.8 V
Full 0.02 -1 1 -1 1
Dynamic Characteristics
Transition Time tTRANS
RL = 300 , CL = 35 pF
see Fig. 1, 2, 3
Room 161 - - - -
ns
Full - - - - -
Enable Turn-On Time tON(EN)
Room 120 - - - -
Full - - - - -
Enable Turn-Off Time tOFF(EN)
Room 79 - - - -
Full - - - - -
Break-Before-Make
Time Delay tD
Room 98 - - - -
Full - - - - -
Charge Injection eQC
L = 1 nF, RGEN = 0 , VGEN = 0 V Full 0.58 - - - - pC
Off Isolation eOIRR f = 1 MHz, RL = 50 ,
CL = 5 pF
100 kHz Room -95 - - - - dB
Crosstalk eXTALK 100 kHz Room -92 - - - -
Source Off Capacitance eCS(off)
f = 1 MHz
Room 3.7 - - - -
pFDrain Off Capacitance eCD(off) Room 4.7 - - - -
Channel On Capacitance eCD(on) Room 10.4 - - - -
Power Supply
Power Supply Range I+
VIN (A, B, C and enable) = 0 V or 3 V
Room 0.05 - 1 - 1
μA
Full - - 10 - 10
Ground Current IGND
Room 0.05 -1 - -1 -
Full - -10 - -10 -
Logic Supply Current ILVL = 2.7 V Room 0.05 - 1 - 1
Full - - 10 - 10
DG9454E
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S16-0652-Rev. A, 18-Apr-16 7Document Number: 67172
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
On-Resistance vs. VD and Signal Supply Voltage
On-Resistance vs. Analog Voltage and Temperature
Leakage Current vs. Temperature
On-Resistance vs. Analog Voltage and Temperature
Switching Time vs. Temperature
Insertion Loss, Off-Isolation, Crosstalk vs. Frequency
0
20
40
60
80
100
120
140
0123456789101112
RON -On-Resistance (Ω)
VD- Analog Voltage (V)
+125
°
C+85
°
C
+25
°
C-40
°
C
V+ = +12 V
v- = 0 V
IS= 1 mA
1p
10p
100p
1n
10n
100n
-60 -40 -20 0 20 40 60 80 100 120 140
Leakage Current (A)
Temperature (°C)
ID(OFF), VD= 12.2 V, VS= 1 V
V+ = +13.2 V
V- = -0 V ID(ON), VD= 12.2 V
IS(OFF), VD= 12.2 V, VS= 1 V
0
25
50
75
100
125
150
175
200
225
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
RON -On-Resistance (Ω)
VD- Analog Voltage (V)
+125 °C
+85 °C
+25 °C
-40 °C
V+ = +5 V
v- = 0 V
IS= 1 mA
0
25
50
75
100
125
150
175
-60 0-40 -20 4020 60 100 12080 140
tON(EN), tOFF(EN) -Switching Time (ns)
Temperature (°C)
V+ = +3 V, V- = 0 V, tON
V+ = +5 V, V- = 0 V, tON
V+ = +16 V, V- = 0 V, tON
V+ = +3 V, V- = 0 V, tOFF
V+ = +5 V, V- = 0 V, tOFF
V+ = +16 V, V- = 0 V, tOFF
V+ = +12 V, V- = 0 V, tON
V+ = +12 V, V- = 0 V, tOFF
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
100K 1M 10M 100M 1G
Loss, OIRR, XTALK (dB)
Frequency (Hz)
Loss
V+ = 12 V
VL= 2.7 V
RL= 50 Ω
OIRR
X
TALK
DG9454E
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Switching Threshold vs. Logic Supply Voltage Charge Injection vs. Analog Voltage
IL vs. VIN
SCHEMATIC DIAGRAM (typical channel)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
02468101214161820
VT-Switching Threshold (V)
V+ - Supply Voltage (V)
VIH = -40 °C
VIL = 125 °C
-40 °C to +125 °C
-10.0
-8.0
-6.0
-4.0
-2.0
0
2.0
4.0
6.0
8.0
0123456789101112
QINJ - Charge Injection (pC)
VS- Analog Voltage (V)
V+ = 12 V
V+ = 5 V
V+ = 3 V
VL= 2.7 V
1p
10p
100p
1n
10n
100n
1m
10m
100m
0123456789101112
IL-Supply Current (μA)
VIN (V)
V+ = 12V
VL= 2.7 V
T = 25 °C
EN
A, B
X0, Y0, Z0
X, Y, Z
V+
X1, Y1, Z1
V-
Decode/
drive
Level
shift
V-
V+
VL
C
GND Body
snatcher
V-
V-
V-
DG9454E
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TEST CIRCUITS
Fig. 1 - Transition Time
Fig. 2 - Enable Switching Time
Fig. 3 - Break-Before-Make
0 V
1.8 V
50 %
50 %
90 %
t
TRANS
ON
V
O
V
A, B, C
V
X7
tTRANS
90 %
V
X0
or V
Y0
or V
Z0
V
X3
or V
Y3
V
X1
or V
Y1
or V
Z1
X1 or Y1 or Z1 ON (DG9454)
V
0
or Y
0
or Z
0
A or B
or C
ENABLE
GND
V
L
V+
V
O
50 Ω
300 Ω 35 pF
X or Y or Z
X0 or Y0
or Z0
X1 or Y1 or Z1
DG9454E
V
X0
or V
Y0
or V
Z0
V
X1
or V
Y1
or V
Z1
0 V
1.8 V
50 %
50 %
90 %
t
OFF
Enable X or Y or Z
Disable X or Y or Z
V
O
V
ENABLE
0 V
t
ON
90 %
V
X0
or V
Y0
or V
Z0
A or B
or C
ENABLE
GND
V
L
V+
V
O
50 Ω 300 Ω 35 pF
X or Y or Z
X0 or Y0
or Z0
X1 or Y1 or Z1
DG9454E
V+
0 V
1.8 V
50 %
80 %
t
D
V
O
V
A, B, C
0 V
V
X0
or V
Y0
or V
Z0
A or B
or C
ENABLE
GND
V
L
V+
V
O
50 Ω
300 Ω 35 pF
X or Y or Z
X0, X1 or Y0,
Y1 or Z0, Z1
DG9454E
V+
DG9454E
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TEST CIRCUITS
Fig. 4 - Charge Injection
Fig. 5 - Insertion Loss
Fig. 6 - Crosstalk
Fig. 7 - Off Isolation
Fig. 8 - Source, Drain Capacitance
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Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?67172.
A
B
C
ENABLE
GND
VL
V+
VO
1 nF
X
Xx
0 V
V+
VO
VENABLE
Rg
Channel
Select
V
g
ON
OFF OFF
ΔVO
tr < 5 ns
tf < 5 ns
A
B
C
ENABLE
GND
VL
V+
VOUT
X
X0
Vg
Rg = 50 Ω
50 Ω
VIN
Network Analyzer
Insertion Loss = 20 log VOUT
VIN
A
B
C
ENABLE
GND
VL
V+
VOUT
X
X0
V
g
Rg = 50 Ω
50 Ω
VIN
Network Analyzer
Crosstalk = 20 log VOUT
VIN
50 Ω Xx
A
B
C
ENABLE
GND
VL
V+
VOUT
X
X0
Vg
Rg = 50 Ω
50 Ω
VIN
Network Analyzer
Off Isolation = 20 log VOUT
VIN
V+
A
B
C
ENABLE
GND
VL
V+
X
X0
|
to
|
Xx Impedance
Analyzer
Channel
Select
Package Information
www.vishay.com Vishay Siliconix
Revision: 09-May-16 1Document Number: 64694
For technical questions, contact: analogswitchtechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Thin miniQFN16 Case Outline
Notes
(1) Use millimeters as the primary measurement.
(2) Dimensioning and tolerances conform to ASME Y14.5M. - 1994.
(3) N is the number of terminals. Nd and Ne is the number of terminals in each D and E site respectively.
(4) Dimensions b applies to plated terminal and is measured between 0.15 mm and 0.30 mm from terminal tip.
(5) The pin 1 identifier must be existed on the top surface of the package by using identification mark or other feature of package body.
(6) Package warpage max. 0.05 mm.
DIMENSIONS MILLIMETERS (1) INCHES
MIN. NOM. MAX. MIN. NOM. MAX.
A 0.50 0.55 0.60 0.020 0.022 0.024
A1 0 - 0.05 0 - 0.002
A3 0.15 ref. 0.006 ref.
b 0.15 0.20 0.25 0.006 0.008 0.010
D 2.50 2.60 2.70 0.098 0.102 0.106
e 0.40 BSC 0.016 BSC
E1.70
1.80 1.90 0.067 0.071 0.075
L 0.35 0.40 0.45 0.014 0.016 0.018
L1 0.45 0.50 0.55 0.018 0.020 0.022
N (3) 16 16
Nd (3) 44
Ne (3) 44
ECN: T16-0226-Rev. B, 09-May-16
DWG: 6023
0.10 C
0.10
A
A3
C
0.10 C
0.10 C
Side view
Top view Bottom view
C
AB
13
12 11 10
D
E
9
8
7
6
5
8
7
6
5
13
14
15
16 L1
1234
Pin #1 identier (5)
Seating
plane
Terminal tip (4)
16 x b
0.10
0.05
C
C
M
M
AB
1211109
4
15 x L
321
e
14
15
16
Document Number: 66557 www.vishay.com
Revision: 05-Mar-10 1
PAD Pattern
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR MINI QFN 16L
1
0.400
(0.0157)
0.225
(0.0089)
0.463
(0.0182)
0.562
(0.0221)
2.900
(0.1142)
1.200
(0.0472)
2.100
(0.0827)
Mounting Footprint
Dimensions in mm (inch)
Legal Disclaimer Notice
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Revision: 08-Feb-17 1Document Number: 91000
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