DG485
Vishay Siliconix
Document Number: 70065
S-52433—Rev. E, 06-Sep-99 www .vishay.com FaxBack 408-970-5600
5-1
Octal Analog Switch Array
  
Low On-Resistance: 55
Rail-to-Rail Analog Input Range
Serial Interface
Low-Power—PD: 35 nW
TTL and CMOS Compatible
Any Combination of 8 SPST to the
Output
High Speed—tON: 170 ns
Low Signal Distortion
Devices Can Be Chained for System
Expansion
Reduced Board Space
Reduced Switch Errors
Reduced Power Supply
Requirements
Simple Interfacing
Audio Switching and Routing
Audio Teleconferencing
Data Acquisition and Industrial
Process Control
Battery Powered Remote Systems
Automotive, Avionics and ATE
Systems
Summing Amplifiers

The DG485 is an analog switch array consisting of eight SPST
switches connected to a common output. This device may be
used as an 8-channel multiplexer in serial control applications.
Any, all or none of the eight switches may be closed at any
given time. Combining low on-resistance (rDS(on) 55 , typ.)
and fast switching (tON: 170 ns, typ.), the DG485 is ideally
suited for data acquisition, process control, communication,
and avionic applications.
Control data is input serially into the shift register with each
clock pulse. The shift register contents can be latched-in (via
LD) at any point into an octal latch which in turn controls all
switches. RS resets the shift register, forcing all latch inputs to
a low condition (all switches off). The serial input (DIN) and
serial output (DOUT) allow daisy chaining of multiple arrays for
large systems.
Built on the V ishay Siliconix high voltage silicon gate process
the DG485 has a wide 44-V power supply voltage rating. An
epitaxial layer prevents latchup.
Each channel conducts equally well in either direction when on
and blocks up to rail-to-rail voltages when off.
For additional information please refer to application note
AN204.
     
1
2
3
4
5
6
7
8
18
17
16
15
14
13
12
11
LD RS
VLGND
S4D
S3S5
S2S6
S1S7
V+ S8
DIN V–
Dual-In-Line
Top View
910
CLK DOUT
Shift Register
Latches
PLCC and LCC
14
15
16
17
18
8
7
6
5
4
1231920
111091312
Top View
S4D
S3S5
S2S6
S1S7
V+ S8
IN
CLK
NC
OUT
V
LD
NC
RS
GND
Shift Register/Latches
L
D
D
V–
DG485
Vishay Siliconix
www.vishay.com S FaxBack 408-970-5600
5-2 Document Number: 70065
S-52433—Rev. E, 06-Sep-99
TRUTH TABLES AND ORDERING INFORMATION
TRUTH TABLEĊDUALĆINĆLINE PACKAGE
RS CLK* DIN D1Dn
1 0 0 Dn-1
1 1 1 Dn-1
1 X D1Dn (No Change)
0 X X 0 0
*CLK Input Edge T riggered
TRUTH TABLEĊPLCC & LCC PACKAGES
LD* DnLnSWn
0 0 OFF
1 1 ON
DnLn(No Change)
*LD Input Level T riggered
ORDERING INFORMATION
Temp Range Package Part Number
40 to 85
_
C
18-Pin Plastic DIP DG485DJ
40
to
85_C
20-Pin PLCC DG485DN
–55 to 125_C LCC-20 DG485AZ/883
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to V–
V+ 44 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
GND 25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Inputsa VS, VD(V–) –2 V to (V+) + 2 V. . . . . . . . . . . . . . . . . . . . . . . . . .
or 30 mA, whichever occurs first
Continuous Current (Any Terminal) 30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current, S or D (Pulsed 1 ms, 10% duty cycle) 100 mA. . . . . . . . . . . . . . . . . .
Storage Temperature (AZ Suffix) –65 to 150_C. . . . . . . . . . . . . . . . . .
(DJ, DN Suffix) –65 to 125 _C. . . . . . . . . . . . . .
Power Dissipation (Package)b
18-Pin Plastic DIPc470 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20-Pin PLCC, LCCd800 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Notes:
a. Signals on SX, DX or INX exceeding V+ or V– will be clamped by internal
diodes. Limit forward diode current to maximum current ratings.
b. All leads soldered or welded to PC board.
c. Derate 6 mW/_C above 75_C.
d. Derate 10 mW/_C above 75_C.
DG485
Vishay Siliconix
Document Number: 70065
S-52433—Rev. E, 06-Sep-99 www .vishay.com S FaxBack 408-970-5600
5-3

Test Conditions
Unless Otherwise Specified A Suffix
–55 to 125_CD Suffix
–40 to 85_C
Parameter Symbol V+ = 15 V, V– = –15 V
VL = 5 V, VIN = 2.4 V, 0.8 VfTempbTypcMindMaxdMindMaxdUnit
Analog Switch
Analog Signal RangeeVANALOG Full –15 15 –15 15 V
Drain-Source
On-Resistance rDS(on) V+ = 13.5 V, V– = –13.5 V
IS = –5 mA, VD = 10 V Room
Full 55 85
125 85
125 W
Delta Drain-Source
On-ResistancegDrDS(on) Room 6 %
Switch Off
Lk C t
IS(off) V+ = 16.5 V, V– = –16.5 V
V155VV155V
Room
Full 0.01 –1
–20 1
20 –1
–10 1
10
A
Leakage Current ID(off)
,
VD = 15.5 V, VS = 15.5 V Room
Full 0.1 –10
–200 10
200 –10
–50 10
50
nA
Channel On
Lk C t
ID(on)
V = 1 6.5 V VS = VD = 15.5 V
One Switch At A T ime Room
Full 0.11 –20
–500 20
500 –20
–50 20
50
nA
Leakage Current
I
D(on) V = 16.5 V, VS = VD = 15.5 V
All Switches On Room 0.2
Input
Input Current
with VIN Low IIL VIN Under Test = 0.8 V
All Other = 2.4 V Room
Full –0.0001 –1
–5 1
5–1
–5 1
5mA
Input Current
with VIN High IIH VIN Under Test = 2.4 V
All Other = 0.8 V Room
Full 0.0001 –1
–5 1
5–1
–5 1
5
Serial Data Output
Output Voltage
with VIN Low – DOUT VOL IO = 1.6 mA, V+ = 4.5 V Full 0.25 0.4 0.4
V
Output V oltage
with VIN High – DOUT VOH IO = –80 mA, V+ = 16.5 V
VL = 4.75 V Full 4.4 2.7 2.7
V
Dynamic Characteristics
Turn-On Time tON VS = 10 V
See Figures 1, 8 Room
Full 170 200
275 200
275
T urn-Off Time tOFF VS = 10 V
See Figures 2, 3, 8 Room
Full 150 200
275 200
276
Data Setup T ime tDS
See Figures 4, 8
Room
Full 40
60 40
60
Data Hold T ime tDH
See
Figures
4
,
8
Room
Full 40
60 40
60 ns
LOAD Hold T ime tLH
SFi 58
Room
Full 100
150 100
150
RESET Hold Time tRH See Figures 5, 8 Room
Full 100
150 100
150
RESET to CLOCK
Delay tDRC Room
Full 40
60 40
60
Charge Injection Q VS = 0 V, CL = 1,000 pF
Any One Channel Room 17 pC
Off IsolationeOIRR RL = 50 W, CL = 5 pF, f = 1 MHz
See Figure 9 Room –75 dB
Maximum
Clock Frequency fCLK Room 10 MHz
DG485
Vishay Siliconix
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5-4 Document Number: 70065
S-52433—Rev. E, 06-Sep-99
SPECIFICATIONSa
Test Conditions
Unless Otherwise Specified A Suffix
–55 to 125_CD Suffix
–40 to 85_C
Parameter Symbol V+ = 15 V, V– = –15 V
VL = 5 V, VIN = 2.4 V, 0.8 VfTempbTypcMindMaxdMindMaxdUnit
Dynamic Characteristics (Cont’d)
Source Off
CapacitanceeCS(off) Vgen = 0 V, Rgen = 0 W, f = 1 MHz Room 7
F
Drain Off CapacitanceeCD(off)
gen ,gen
Room 43
F
On
-
State Capacitance
e
CD(on)
Vgen = 0 V, Rgen = 0 W, f = 1 MHz One
Channel On Room 53 pF
On
-
State
Capacitancee
C
D(on) Vgen = 0 V, Rgen = 0 W, f = 1 MHz All Chan-
nels On Room 122
Power Supplies
Positive Supply
Current I+
V165VV 165V
Room
Full 0.001 3
10 3
10
A
Negative Supply
Current I– V+ = 16.5 V, V– = –16.5 V
VIN
=
0 or 5 V, VL
=
5.25 V
Room
Full –0.001 –3
–10 –3
–10
mA
Logic Supply Current IL
V
IN =
0
or
5
V
,
V
L =
5
.
25
V
DOUT Open Room
Full 0.001 3
10 3
10
m
A
Ground Current IGND Room
Full –0.001 –3
–10 –3
–10
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. T ypical values are for DESIGN AID ONL Y, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
g. For each VD:DrDS(on) +ǒrDS(on) MAX rDS(on) MIN
rDS(on) AVE Ǔ
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
GND
Supply Currents vs. Temperature rDS(on) vs. VD and Power Supply Voltage
I+, I–, I
rDS(on)
– Drain-Source On-Resistance (
Temperature (_C) VD – Drain Voltage (V)
V+ = 15 V
V– = –15 V
VL = 5 V
IL
IPOS
IGND
–50 –10 130
160
140
0–20 –10 0 10 20
120
100
80
60
40
20
–30 10 30 50 70 90 110
1 mA
100 nA VL = 5 V
IS = –5 mA
"5 V
10 nA
1 nA
100 pA
10 pA
1 pA
0.1 pA
INEG
"8 V
"10 V
"12 V
"15 V "20 V
–15 –5 5 15
)W
DG485
Vishay Siliconix
Document Number: 70065
S-52433—Rev. E, 06-Sep-99 www .vishay.com S FaxBack 408-970-5600
5-5
  _  
rDS(on) vs. VD and Unipolar Power Supply Voltage rDS(on) vs. VD and Temperature
Switching Threshold
vs. Power Supply Voltage and VLRF Characteristics
Channel On/Off Leakage Currents
vs. Analog Voltage Channel On/Off Leakage Currents
vs. Temperature
rDS(on)
– Drain-Source On-Resistance (
rDS(on)
– Drain-Source On-Resistance (
I, I
SD (pA)
, I S + D
I, I
DS
(dB)
(V)
TH
V
VD – Drain Voltage (V) VD – Drain Voltage (V)
VD or VS – Drain or Source Voltage (V) Temperature (_C)
V+ Supply (V) f – Frequency (Hz)
100
90
70
20
0–15 –10 –5 0 5 10 15
80
60
10
30
50
40
400
350
002 20
300
250
200
150
100
50
4 6 8 10 12 14 16 18
V+ = 5 V
8 V 10 V 12 V 15 V
20 V
V– = 0 V
VL = 5 V
IS = –5 mA
V+ = 15 V
V– = –15 V
VL = 5 V
IS = –5 mA
125_C
25_C
–55_C
60
40
20
–80–15 –10 15
0
–20
–5 0 5 10
–40
–60
V+ = 15 V
V– = –15 V
VL = 5 V
IS(off)
ID(off)
ID(on)
1 mA
100 nA
1 nA
100 pA
10 pA
1 pA
0.1 pA
0.01 pA
–50 –10 130–30 10 30 50 70 90 110
V+ = 15 V
V– = –15 V
VL = 5 V
VS or VD = – 14 V
ID(off)
IS(off)
ID(on)
10 nA
3.0
2.5
2.0
0.5
056
1.0
1.5
7 8 9 101112131415
4 V
5 V 6 V
6 V VL = 7 V
–140
–120
0
–100
–80
–60
–40
–20
OIRR XTALK
V+ = 15 V
V– = –15 V
VL = 5 V
See Figures 9, 10
1 k 10 k 100 k 1 M 10 M
)
)
DG485
Vishay Siliconix
www.vishay.com S FaxBack 408-970-5600
5-6 Document Number: 70065
S-52433—Rev. E, 06-Sep-99
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Supply Currents vs. Switching Frequency Source/Drain On Capacitance vs. Analog Voltage
Source/Drain Off Capacitance
vs. Analog Voltage Charge Injection vs. Analog Voltage
GND
I+, I–, I
(pF)CS, D
(pF)CS, D
Q (pC)
f – Frequency (Hz) VANALOG – Analog Voltage (V)
VANALOG – Analog Voltage (V) VS – Source Voltage (V)
180
160
140
40
120
100
80
60
V+ = 15 V
V– = –15 V
VL = 5 V
VIN = 3 V
V+ = 15 V
V– = –15 V
VL = 5 V
IL
InCD(on)
(All Channels On)
(Channel 1 On Only)
10 mA
1 mA
100 mA
10 mA
1 mA
100 nA
10 nA 100 1 k 10 k 100 k 1 M –15 –10 15–5 0 5 10
–15 –10 15–5 0 5 10
70
60
50
0
40
30
20
10
55
45
–5
35
25
15
5
V+ = 15 V
V– = –15 V
VL = 5 V
V+ = 15 V
V– = –15 V
VL = 5 V
CL = 1 nF
CD(off)
CS(off)
–15 –10 15–5 0 5 10
Ip
CD(on)
TIMING DIAGRAMS
FIGURE 1. tON from LD FIGURE 2. tOFF from LD
3 V 50%
LD
0 V 90%
0 V
Repeat for All Channels
3 V 50%
LD
0 V 90%
0 V
Repeat for All Channels
tON
VS
VDtOFF
VS
VD
3 V 50%
0 V
90%
0 V
tOFF
VS
VD
RS
FIGURE 3. tOFF from RS
DG485
Vishay Siliconix
Document Number: 70065
S-52433—Rev. E, 06-Sep-99 www .vishay.com FaxBack 408-970-5600
5-7
 
FIGURE 4. Data Setup and Hold Time
FIGURE 5. Timing Relationships
50%
50%
CLOCK
DATA
tDH
tDS
CLOCK
LOAD
RS
tLH tRH tDRC
CLK
RS
S1
S3
S2
S4
DIN
DOUT
LD
S5
S7
S6
S8
S1 – S8 and DOUT are expected output with the drain connected high. The sources require pull-down of 1 k.
FIGURE 6.
DG485
Vishay Siliconix
www.vishay.com FaxBack 408-970-5600
5-8 Document Number: 70065
S-52433—Rev. E, 06-Sep-99
   
LD
VL
Level
Shift/
Drive
Octal
Latch
V+
Shift
Register
V+
RS
Dn
CLK
LD
D1
D8
DIN
RS
S1
S8
D
V–
V–
V+
CLK
DOUT
GND
FIGURE 7.
V+
DG485
Vishay Siliconix
Document Number: 70065
S-52433—Rev. E, 06-Sep-99 www .vishay.com FaxBack 408-970-5600
5-9
 
FIGURE 8. Switching Time Test Circuit FIGURE 9. Adjacent Input Crosstalk
LD
CLK
D
V+
V– GND
35 pF
+15 V +5 V
–15 V
DG485
VSVL
RS
S1
S8
S2
S7
DIN
1 kDG485
S1
S2
S3
S8
D
50
50
50
50
50
50
VO
 
DG485
50
50
50
50
50
S8
S2
S1
FIGURE 10. Off Isolation
VO
DG485
Vishay Siliconix
www.vishay.com S FaxBack 408-970-5600
5-10 Document Number: 70065
S-52433—Rev. E, 06-Sep-99

CLK
LD
f
f= for CLK and LD inputs of the same frequency.
The recommended phase delay of LD from CLK is
½ tLOGIC to tLOGIC:
tLOGIC(MIN): 80 ns at 25_C V+ = 15 V
150 ns at 125_C V– = –15 V
GND = 0 V
+
DG485
+
DG485
IN1
IN2
tLOGIC
RIN
RIN
R2
R1
C1
C2
R0R1R2R7
RF
VOUT
DIN
CLK
VREF
FIGURE 11.
FIGURE 12. Multi-Function Circuit Provides Input Selection,
Gain Ranging and Filtering with One DG485 FIGURE 13. Serial DAC Circuit
tLOGIC
DG485
Vishay Siliconix
Document Number: 70065
S-52433—Rev. E, 06-Sep-99 www .vishay.com FaxBack 408-970-5600
5-11

+
R
R
R
+
DG485 DG485
Switch Array
Octal Latch
S/R
LD CLK
DG485
8085
ALE
R/S
8212
(8)
(8)
Decoder
8205
SOD
V1VOUT
RF
V2
V8
CH
WR
Data Bus
Address Bus
RS
DOUT
DIN To Next
Switch
Array
S1S2S8
D
FIGURE 14. Summing Node Mixer FIGURE 15. Multiplexing, Sampling Application
FIGURE 16. Direct Serial Interface (8085)
Document Number: 91000 www.vishay.com
Revision: 18-Jul-08 1
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All product specifications and data are subject to change without notice.
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