LP3872ESX-1.8/NOPB - NATIONAL SEMICONDUCTOR

LP3872,LP3875

LP3872/LP3875 1.5A Fast Ultra Low Dropout Linear Regulators

Literature Number: SNVS227E

LP3872/LP3875

1.5A Fast Ultra Low Dropout Linear Regulators

General Description

The LP3872/LP3875 series of fast ultra low-dropout linear

regulators operate from a +2.5V to +7.0V input supply. Wide

range of preset output voltage options are available. These

ultra low dropout linear regulators respond very quickly to

step changes in load, which makes them suitable for low

voltage microprocessor applications. The LP3872/LP3875

are developed on a CMOS process which allows low quies-

cent current operation independent of output load current.

This CMOS process also allows the LP3872/LP3875 to op-

erate under extremely low dropout conditions.

Dropout Voltage: Ultra low dropout voltage; typically 38mV

at 150mA load current and 380mV at 1.5A load current.

Ground Pin Current: Typically 6mA at 1.5A load current.

Shutdown Mode: Typically 10nA quiescent current when

the shutdown pin is pulled low.

Error Flag: Error flag goes low when the output voltage

drops 10% below nominal value.

SENSE: Sense pin improves regulation at remote loads.

Precision Output Voltage: Multiple output voltage options

are available ranging from 1.8V to 5.0V with a guaranteed

accuracy of ±1.5% at room temperature, and ±3.0% over all

conditions (varying line, load, and temperature).

Features

nUltra low dropout voltage

nLow ground pin current

nLoad regulation of 0.06%

n10nA quiescent current in shutdown mode

nGuaranteed output current of 1.5A DC

nAvailable in TO-263, TO-220 and SOT-223 packages

nOutput voltage accuracy ±1.5%

nError flag indicates output status

nSense option improves load regulation

nMinimum output capacitor requirements

nOvertemperature/overcurrent protection

n−40˚C to +125˚C junction temperature range

Applications

nMicroprocessor power supplies

nGTL, GTL+, BTL, and SSTL bus terminators

nPower supplies for DSPs

nSCSI terminator

nPost regulators

nHigh efficiency linear regulators

nBattery chargers

nOther battery powered applications

Typical Application Circuits

20063301

*SD and ERROR pins must be pulled high through a 10kΩpull-up resistor. Connect the ERROR pin to ground if this function is not used. See application hints

for more information.

September 2006

LP3872/LP3875 1.5A Fast Ultra Low Dropout Linear Regulators

Typical Application Circuits (Continued)

20063345

*SD must be pulled high through a 10kΩpull-up resistor. See application hints for more information.

Connection Diagrams

20063305

Top View

TO220-5 Package

Bent, Staggered Leads

20063306

Top View

TO263-5 Package

20063386

Top View

SOT223-5 Package

LP3872/LP3875

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Pin Descriptions for TO220-5 and TO263-5 Packages

Pin # LP3872 LP3875

Name Function Name Function

1SD

Shutdown SD Shutdown

Input Supply V

Input Supply

3 GND Ground GND Ground

OUT

Output Voltage V

OUT

Output Voltage

5 ERROR ERROR Flag SENSE Remote Sense Pin

Pin Descriptions for SOT223-5 Package

Pin # LP3872 LP3875

Name Function Name Function

1SD

Shutdown SD Shutdown

Input Supply V

Input Supply

OUT

Output Voltage V

OUT

Output Voltage

4 ERROR ERROR Flag SENSE Remote Sense Pin

5 GND Ground GND Ground

LP3872/LP3875

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Ordering Information

20063331

Package Type Designator is "T" for TO220 package, "S" for TO263 package, and "MP" for SOT223-5 package.

TABLE 1. Package Marking and Ordering Information

Output

Voltage Order Number Description

(Current, Option) Package Type Package Marking Supplied As:

5.0 LP3872EMP-5.0 1.5A, Error Flag SOT223-5 LHDB 1000 Units on Tape and

Reel

5.0 LP3872EMPX-5.0 1.5A, Error Flag SOT223-5 LHDB 2000 Units on Tape and

Reel

5.0 LP3872ES-5.0 1.5A, Error Flag TO263-5 LP3872ES-5.0 Rail

5.0 LP3872ESX-5.0 1.5A, Error Flag TO263-5 LP3872ES-5.0 Tape and Reel

3.3 LP3872EMP-3.3 1.5A, Error Flag SOT223-5 LHCB 1000 Units on Tape and

Reel

3.3 LP3872EMPX-3.3 1.5A, Error Flag SOT223-5 LHCB 2000 Units on Tape and

Reel

3.3 LP3872ES-3.3 1.5A, Error Flag TO263-5 LP3872ES-3.3 Rail

3.3 LP3872ESX-3.3 1.5A, Error Flag TO263-5 LP3872ES-3.3 Tape and Reel

2.5 LP3872EMP-2.5 1.5A, Error Flag SOT223-5 LHBB 1000 Units on Tape and

Reel

2.5 LP3872EMPX-2.5 1.5A, Error Flag SOT223-5 LHBB 2000 Units on Tape and

Reel

2.5 LP3872ES-2.5 1.5A, Error Flag TO263-5 LP3872ES-2.5 Rail

2.5 LP3872ESX-2.5 1.5A, Error Flag TO263-5 LP3872ES-2.5 Tape and Reel

1.8 LP3872ES-1.8 1.5A, Error Flag TO263-5 LP3872ES-1.8 Rail

1.8 LP3872ESX-1.8 1.5A, Error Flag TO263-5 LP3872ES-1.8 Tape and Reel

1.8 LP3872EMP-1.8 1.5A, Error Flag SOT223-5 LHAB 1000 Units on Tape and

Reel

1.8 LP3872EMPX-1.8 1.5A, Error Flag SOT223-5 LHAB 2000 Units on Tape and

Reel

5.0 LP3875EMP-5.0 1.5A, SENSE SOT223-5 LHRB 1000 Units on Tape and

Reel

5.0 LP3875EMPX-5.0 1.5A, SENSE SOT223-5 LHRB 2000 Units on Tape and

Reel

5.0 LP3875ES-5.0 1.5A, SENSE TO263-5 LP3875ES-5.0 Rail

5.0 LP3875ESX-5.0 1.5A, SENSE TO263-5 LP3875ES-5.0 Tape and Reel

3.3 LP3875EMP-3.3 1.5A, SENSE SOT223-5 LHPB 1000 Units on Tape and

Reel

LP3872/LP3875

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Ordering Information (Continued)

TABLE 1. Package Marking and Ordering Information (Continued)

Output

Voltage Order Number Description

(Current, Option) Package Type Package Marking Supplied As:

3.3 LP3875EMPX-3.3 1.5A, SENSE SOT223-5 LHPB 2000 Units on Tape and

Ree

3.3 LP3875ES-3.3 1.5A, SENSE TO263-5 LP3875ES-3.3 Rail

3.3 LP3875ESX-3.3 1.5A, SENSE TO263-5 LP3875ES-3.3 Tape and Reel

2.5 LP3875EMP-2.5 1.5A, SENSE SOT223-5 LHNB 1000 Units on Tape and

Reel

2.5 LP3875EMPX-2.5 1.5A, SENSE SOT223-5 LHNB 2000 Units on Tape and

Ree

2.5 LP3875ES-2.5 1.5A, SENSE TO263-5 LP3875ES-2.5 Rail

2.5 LP3875ESX-2.5 1.5A, SENSE TO263-5 LP3875ES-2.5 Tape and Reel

1.8 LP3875EMP-1.8 1.5A, SENSE SOT223-5 LHLB 1000 Units on Tape and

Reel

1.8 LP3875EMPX-1.8 1.5A, SENSE SOT223-5 LHLB

1.8 LP3875ES-1.8 1.5A, SENSE TO263-5 LP3875ES-1.8 Rail

1.8 LP3875ESX-1.8 1.5A, SENSE TO263-5 LP3875ES-1.8 Tape and Reel

5.0 LP3872ET-5.0 1.5A, Error Flag TO220-5 LP3872ET-5.0 Rail

3.3 LP3872ET-3.3 1.5A, Error Flag TO220-5 LP3872ET-3.3 Rail

2.5 LP3872ET-2.5 1.5A, Error Flag TO220-5 LP3872ET-2.5 Rail

1.8 LP3872ET-1.8 1.5A, Error Flag TO220-5 LP3872ET-1.8 Rail

5.0 LP3875ET-5.0 1.5A, SENSE TO220-5 LP3875ET-5.0 Rail

3.3 LP3875ET-3.3 1.5A, SENSE TO220-5 LP3875ET-3.3 Rail

2.5 LP3875ET-2.5 1.5A, SENSE TO220-5 LP3875ET-2.5 Rail

1.8 LP3875ET-1.8 1.5A, SENSE TO220-5 LP3875ET-1.8 Rail

LP3872/LP3875

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Block Diagrams

LP3872

20063303

LP3875

20063329

LP3872/LP3875

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Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Storage Temperature Range −65˚C to +150˚C

Lead Temperature

(Soldering, 5 sec.) 260˚C

ESD Rating (Note 3) 2 kV

Power Dissipation (Note 2) Internally Limited

Input Supply Voltage (Survival) −0.3V to +7.5V

Shutdown Input Voltage

(Survival) −0.3V to +7.5V

Output Voltage (Survival), (Note

6), (Note 7) −0.3V to +6.0V

OUT

(Survival) Short Circuit Protected

Maximum Voltage for ERROR

Pin V

Maximum Voltage for SENSE Pin V

OUT

Operating Ratings

Input Supply Voltage (Note 11) 2.5V to 7.0V

Shutdown Input Voltage −0.3V to 7.0V

Maximum Operating Current (DC) 1.5A

Junction Temperature −40˚C to +125˚C

Electrical Characteristics

LP3872/LP3875

Limits in standard typeface are for T

= 25˚C, and limits in boldface type apply over the full operating temperature range.

Unless otherwise specified: V

O(NOM)

+ 1V, I

= 10 mA, C

OUT

= 10µF, V

= 2V.

Symbol Parameter Conditions Typ

(Note 4)

LP3872/5 (Note 5) Units

Min Max

Output Voltage

Tolerance

(Note 8)

OUT

+1V ≤V

≤7.0V

10 mA ≤I

≤1.5A 0 -1.5

-3.0

+1.5

+3.0 %

∆V

Output Voltage Line

Regulation (Note 8)

OUT

+1V≤V

≤7.0V 0.02

0.06

∆V

/∆I

OUT

Output Voltage Load

Regulation

(Note 8)

10 mA ≤I

≤1.5A 0.06

0.12

-V

OUT

Dropout Voltage

(Note 10)

= 150 mA 38 50

60 mV

= 1.5A 380 450

550

GND

Ground Pin Current In

Normal Operation Mode

= 150 mA 5 9

10 mA

= 1.5A 6 14

GND

Ground Pin Current In

Shutdown Mode

≤0.3V 0.01 10 µA

-40˚C ≤T

≤85˚C 50

O(PK)

Peak Output Current V

≥V

O(NOM)

- 4% 1.8 A

Short Circuit Protection

Short Circuit Current 3.2 A

LP3872/LP3875

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Electrical Characteristics

LP3872/LP3875 (Continued)

Limits in standard typeface are for T

= 25˚C, and limits in boldface type apply over the full operating temperature range.

Unless otherwise specified: V

O(NOM)

+ 1V, I

= 10 mA, C

OUT

= 10µF, V

= 2V.

Symbol Parameter Conditions Typ

(Note 4)

LP3872/5 (Note 5) Units

Min Max

Shutdown Input

SDT

Shutdown Threshold Output = High V

Output = Low 0 0.3

dOFF

Turn-off delay I

= 1.5A 20 µs

dON

Turn-on delay I

= 1.5A 25 µs

SD Input Current V

1nA

Error Flag

Threshold (Note 9) 10 516%

Threshold Hysteresis (Note 9) 5 28%

EF(Sat)

Error Flag Saturation I

sink

= 100µA 0.02 0.1 V

Td Flag Reset Delay 1 µs

Error Flag Pin Leakage

Current

1nA

max

Error Flag Pin Sink

Current

Error

=0.5V 1mA

AC Parameters

PSRR Ripple Rejection

OUT

+1V

OUT

= 10uF

OUT

= 3.3V, f = 120Hz

OUT

+ 0.5V

OUT

= 10uF

OUT

= 3.3V, f = 120Hz

n(l/f)

Output Noise Density f = 120Hz 0.8 µV

Output Noise Voltage

BW = 10Hz – 100kHz

OUT

= 2.5V

150

µV (rms)

BW = 300Hz – 300kHz

OUT

= 2.5V

100

Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is

intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and test conditions, see Electrical Characteristics. The

guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed

test conditions.

Note 2: At elevated temperatures, devices must be derated based on package thermal resistance. The devices in TO220 package must be derated at θjA = 50˚C/W

(with 0.5in2, 1oz. copper area), junction-to-ambient (with no heat sink). The devices in the TO263 surface-mount package must be derated at θjA = 60˚C/W (with

0.5in2, 1oz. copper area), junction-to-ambient. The SOT-223 package must be derated at θjA = 90˚C/W (with 0.5in2, 1oz. copper area), junction-to-ambient.

Note 3: The human body model is a 100pF capacitor discharged through a 1.5kΩresistor into each pin.

Note 4: Typical numbers are at 25˚C and represent the most likely parametric norm.

Note 5: Limits are guaranteed by testing, design, or statistical correlation.

Note 6: If used in a dual-supply system where the regulator load is returned to a negative supply, the output must be diode-clamped to ground.

Note 7: The output PMOS structure contains a diode between the VIN and VOUT terminals. This diode is normally reverse biased. This diode will get forward biased

if the voltage at the output terminal is forced to be higher than the voltage at the input terminal. This diode can typically withstand 200mA of DC current and 1Amp

of peak current.

Note 8: Output voltage line regulation is defined as the change in output voltage from the nominal value due to change in the input line voltage. Output voltage load

regulation is defined as the change in output voltage from the nominal value due to change in load current. The line and load regulation specification contains only

the typical number. However, the limits for line and load regulation are included in the output voltage tolerance specification.

Note 9: Error Flag threshold and hysteresis are specified as percentage of regulated output voltage. See Application Hints.

Note 10: Dropout voltage is defined as the minimum input to output differential voltage at which the output drops 2% below the nominal value. Dropout voltage

specification applies only to output voltages of 2.5V and above. For output voltages below 2.5V, the drop-out voltage is nothing but the input to output differential,

since the minimum input voltage is 2.5V.

Note 11: The minimum operating value for VIN is equal to either [VOUT(NOM) +V

DROPOUT] or 2.5V, whichever is greater.

LP3872/LP3875

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Typical Performance Characteristics Unless otherwise specified: T

= 25˚C, C

OUT

= 10µF,

= 10µF, S/D pin is tied to V

OUT

= 2.5V, V

O(NOM)

+ 1V, I

= 10mA

Dropout Voltage vs Output Load Current

Ground Current vs Output Voltage

= 1.5A

20063360

20063354

Shutdown I

vs Junction Temperature Errorflag Threshold vs Junction Temperature

20063355 20063357

DC Load Reg. vs Junction Temperature DC Line Regulation vs Temperature

20063358 20063359

LP3872/LP3875

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Typical Performance Characteristics Unless otherwise specified: T

= 25˚C, C

OUT

= 10µF,

CIN = 10µF, S/D pin is tied to V

OUT

= 2.5V, V

O(NOM)

+ 1V, I

= 10mA (Continued)

Noise vs Frequency

Load Transient Response

OUT

= 10µF, OSCON

20063361

20063381

Load Transient Response

OUT

= 100µF, OSCON

Load Transient Response

OUT

= 100µF, POSCAP

20063382 20063383

Load Transient Response

OUT

= 10µF, TANTALUM

Load Transient Response

OUT

= 100µF, TANTALUM

20063384 20063385

LP3872/LP3875

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Application Hints

EXTERNAL CAPACITORS

Like any low-dropout regulator, external capacitors are re-

quired to assure stability. These capacitors must be correctly

selected for proper performance.

INPUT CAPACITOR: An input capacitor of at least 10µF is

required. Ceramic Ceramic, Tantalum, or Electrolytic capaci-

tors may be used, and capacitance may be increased with-

out limit

OUTPUT CAPACITOR: An output capacitor is required for

loop stability. It must be located less than 1 cm from the

device and connected directly to the output and ground pins

using traces which have no other currents flowing through

them (see PCB Layout section).

The minimum value of output capacitance that can be used

for stable full-load operation is 10µF, but it may be increased

without limit. The output capacitor must have an ESR value

as shown in the stable region of the curve below. Tantalum

capacitors are recommended for the output capacitor.

ESR Curve

20063370

SELECTING A CAPACITOR

It is important to note that capacitance tolerance and varia-

tion with temperature must be taken into consideration when

selecting a capacitor so that the minimum required amount

of capacitance is provided over the full operating tempera-

ture range. In general, a good Tantalum capacitor will show

very little capacitance variation with temperature, but a ce-

ramic may not be as good (depending on dielectric type).

Aluminum electrolytics also typically have large temperature

variation of capacitance value.

Equally important to consider is a capacitor’s ESR change

with temperature: this is not an issue with ceramics, as their

ESR is extremely low. However, it is very important in Tan-

talum and aluminum electrolytic capacitors. Both show in-

creasing ESR at colder temperatures, but the increase in

aluminum electrolytic capacitors is so severe they may not

be feasible for some applications (see Capacitor Character-

istics Section).

CAPACITOR CHARACTERISTICS

CERAMIC: For values of capacitance in the 10 to 100 µF

range, ceramics are usually larger and more costly than

tantalums but give superior AC performance for bypassing

high frequency noise because of very low ESR (typically less

than 10 mΩ). However, some dielectric types do not have

good capacitance characteristics as a function of voltage

and temperature.

Z5U and Y5V dielectric ceramics have capacitance that

drops severely with applied voltage. A typical Z5U or Y5V

capacitor can lose 60% of its rated capacitance with half of

the rated voltage applied to it. The Z5U and Y5V also exhibit

a severe temperature effect, losing more than 50% of nomi-

nal capacitance at high and low limits of the temperature

range.

X7R and X5R dielectric ceramic capacitors are strongly rec-

ommended if ceramics are used, as they typically maintain a

capacitance range within ±20% of nominal over full operat-

ing ratings of temperature and voltage. Of course, they are

typically larger and more costly than Z5U/Y5U types for a

given voltage and capacitance.

TANTALUM: Solid Tantalum capacitors are recommended

for use on the output because their typical ESR is very close

to the ideal value required for loop compensation. They also

work well as input capacitors if selected to meet the ESR

requirements previously listed.

Tantalums also have good temperature stability: a good

quality Tantalum will typically show a capacitance value that

varies less than 10-15% across the full temperature range of

125˚C to −40˚C. ESR will vary only about 2X going from the

high to low temperature limits.

The increasing ESR at lower temperatures can cause oscil-

lations when marginal quality capacitors are used (if the ESR

of the capacitor is near the upper limit of the stability range at

room temperature).

ALUMINUM: This capacitor type offers the most capaci-

tance for the money. The disadvantages are that they are

larger in physical size, not widely available in surface mount,

and have poor AC performance (especially at higher fre-

quencies) due to higher ESR and ESL.

Compared by size, the ESR of an aluminum electrolytic is

higher than either Tantalum or ceramic, and it also varies

greatly with temperature. A typical aluminum electrolytic can

exhibit an ESR increase of as much as 50X when going from

25˚C down to −40˚C.

It should also be noted that many aluminum electrolytics only

specify impedance at a frequency of 120 Hz, which indicates

they have poor high frequency performance. Only aluminum

electrolytics that have an impedance specified at a higher

frequency (between 20 kHz and 100 kHz) should be used for

the LP387X. Derating must be applied to the manufacturer’s

ESR specification, since it is typically only valid at room

temperature.

Any applications using aluminum electrolytics should be

thoroughly tested at the lowest ambient operating tempera-

ture where ESR is maximum.

TURN-ON CHARACTERISTICS FOR OUTPUT

VOLTAGES PROGRAMMED TO 2.0V OR BELOW

As Vin increases during start-up, the regulator output will

track the input until Vin reaches the minimum operating

voltage (typically about 2.2V). For output voltages pro-

grammed to 2.0V or below, the regulator output may mo-

mentarily exceed its programmed output voltage during start

up. Outputs programmed to voltages above 2.0V are not

affected by this behavior.

LP3872/LP3875

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Application Hints (Continued)

PCB LAYOUT

Good PC layout practices must be used or instability can be

induced because of ground loops and voltage drops. The

input and output capacitors must be directly connected to the

input, output, and ground pins of the regulator using traces

which do not have other currents flowing in them (Kelvin

connect).

The best way to do this is to lay out C

and C

OUT

near the

device with short traces to the V

OUT

, and ground pins.

The regulator ground pin should be connected to the exter-

nal circuit ground so that the regulator and its capacitors

have a "single point ground".

It should be noted that stability problems have been seen in

applications where "vias" to an internal ground plane were

used at the ground points of the IC and the input and output

capacitors. This was caused by varying ground potentials at

these nodes resulting from current flowing through the

ground plane. Using a single point ground technique for the

regulator and it’s capacitors fixed the problem.

Since high current flows through the traces going into V

and coming from V

OUT

, Kelvin connect the capacitor leads to

these pins so there is no voltage drop in series with the input

and output capacitors.

RFI/EMI SUSCEPTIBILITY

RFI (radio frequency interference) and EMI (electromagnetic

interference) can degrade any integrated circuit’s perfor-

mance because of the small dimensions of the geometries

inside the device. In applications where circuit sources are

present which generate signals with significant high fre-

quency energy content (>1 MHz), care must be taken to

ensure that this does not affect the IC regulator.

If RFI/EMI noise is present on the input side of the regulator

(such as applications where the input source comes from the

output of a switching regulator), good ceramic bypass ca-

pacitors must be used at the input pin of the IC.

If a load is connected to the IC output which switches at high

speed (such as a clock), the high-frequency current pulses

required by the load must be supplied by the capacitors on

the IC output. Since the bandwidth of the regulator loop is

less than 100 kHz, the control circuitry cannot respond to

load changes above that frequency. This means the effective

output impedance of the IC at frequencies above 100 kHz is

determined only by the output capacitor(s).

In applications where the load is switching at high speed, the

output of the IC may need RF isolation from the load. It is

recommended that some inductance be placed between the

output capacitor and the load, and good RF bypass capaci-

tors be placed directly across the load.

PCB layout is also critical in high noise environments, since

RFI/EMI is easily radiated directly into PC traces. Noisy

circuitry should be isolated from "clean" circuits where pos-

sible, and grounded through a separate path. At MHz fre-

quencies, ground planes begin to look inductive and RFI/

EMI can cause ground bounce across the ground plane.

In multi-layer PCB applications, care should be taken in

layout so that noisy power and ground planes do not radiate

directly into adjacent layers which carry analog power and

ground.

OUTPUT NOISE

Noise is specified in two ways-

Spot Noise or Output noise density is the RMS sum of all

noise sources, measured at the regulator output, at a spe-

cific frequency (measured with a 1Hz bandwidth). This type

of noise is usually plotted on a curve as a function of fre-

quency.

Total output Noise or Broad-band noise is the RMS sum

of spot noise over a specified bandwidth, usually several

decades of frequencies.

Attention should be paid to the units of measurement. Spot

noise is measured in units µV/√Hz or nV/√Hz and total output

noise is measured in µV(rms).

The primary source of noise in low-dropout regulators is the

internal reference. In CMOS regulators, noise has a low

frequency component and a high frequency component,

which depend strongly on the silicon area and quiescent

current. Noise can be reduced in two ways: by increasing the

transistor area or by increasing the current drawn by the

internal reference. Increasing the area will decrease the

chance of fitting the die into a smaller package. Increasing

the current drawn by the internal reference increases the

total supply current (ground pin current). Using an optimized

trade-off of ground pin current and die size, LP3872/LP3875

achieves low noise performance and low quiescent current

operation.

The total output noise specification for LP3872/LP3875 is

presented in the Electrical Characteristics table. The Output

noise density at different frequencies is represented by a

curve under typical performance characteristics.

SHORT-CIRCUIT PROTECTION

The LP3872 and LP3875 are short circuit protected and in

the event of a peak over-current condition, the short-circuit

control loop will rapidly drive the output PMOS pass element

off. Once the power pass element shuts down, the control

loop will rapidly cycle the output on and off until the average

power dissipation causes the thermal shutdown circuit to

respond to servo the on/off cycling to a lower frequency.

Please refer to the section on thermal information for power

dissipation calculations.

ERROR FLAG OPERATION

The LP3872/LP3875 produces a logic low signal at the Error

Flag pin when the output drops out of regulation due to low

input voltage, current limiting, or thermal limiting. This flag

has a built in hysteresis. The timing diagram in Figure 1

shows the relationship between the ERROR flag and the

output voltage. In this example, the input voltage is changed

to demonstrate the functionality of the Error Flag.

The internal Error flag comparator has an open drain output

stage. Hence, the ERROR pin should be pulled high through

a pull up resistor. Although the ERROR flag pin can sink

current of 1mA, this current is energy drain from the input

supply. Hence, the value of the pull up resistor should be in

the range of 10kΩto 1MΩ.The ERROR pin must be

connected to ground if this function is not used. It should

also be noted that when the shutdown pin is pulled low, the

ERROR pin is forced to be invalid for reasons of saving

power in shutdown mode.

LP3872/LP3875

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Application Hints (Continued)

SENSE PIN

In applications where the regulator output is not very close to

the load, LP3875 can provide better remote load regulation

using the SENSE pin. Figure 2 depicts the advantage of the

SENSE option. LP3872 regulates the voltage at the output

pin. Hence, the voltage at the remote load will be the regu-

lator output voltage minus the drop across the trace resis-

tance. For example, in the case of a 3.3V output, if the trace

resistance is 100mΩ, the voltage at the remote load will be

3.15V with 1.5A of load current, I

LOAD

. The LP3875 regulates

the voltage at the sense pin. Connecting the sense pin to the

remote load will provide regulation at the remote load, as

shown in Figure 2. If the sense option pin is not required, the

sense pin must be connected to the V

OUT

pin.

SHUTDOWN OPERATION

A CMOS Logic level signal at the shutdown ( SD) pin will

turn-off the regulator. Pin SD must be actively terminated

through a 10kΩpull-up resistor for a proper operation. If this

pin is driven from a source that actively pulls high and low

(such as a CMOS rail to rail comparator), the pull-up resistor

is not required. This pin must be tied to Vin if not used.

20063307

FIGURE 1. Error Flag Operation

20063308

FIGURE 2. Improving remote load regulation using LP3875

LP3872/LP3875

www.national.com13

Application Hints (Continued)

DROPOUT VOLTAGE

The dropout voltage of a regulator is defined as the minimum

input-to-output differential required to stay within 2% of the

nominal output voltage. For CMOS LDOs, the dropout volt-

age is the product of the load current and the Rds(on) of the

internal MOSFET.

REVERSE CURRENT PATH

The internal MOSFET in LP3872 and LP3875 has an inher-

ent parasitic diode. During normal operation, the input volt-

age is higher than the output voltage and the parasitic diode

is reverse biased. However, if the output is pulled above the

input in an application, then current flows from the output to

the input as the parasitic diode gets forward biased. The

output can be pulled above the input as long as the current

in the parasitic diode is limited to 200mA continuous and 1A

peak.

POWER DISSIPATION/HEATSINKING

LP3872 and LP3875 can deliver a continuous current of

1.5A over the full operating temperature range. A heatsink

may be required depending on the maximum power dissipa-

tion and maximum ambient temperature of the application.

Under all possible conditions, the junction temperature must

be within the range specified under operating conditions.

The total power dissipation of the device is given by:

=(V

−V

OUT

+(V

GND

where I

GND

is the operating ground current of the device

(specified under Electrical Characteristics).

The maximum allowable temperature rise (T

Rmax

) depends

on the maximum ambient temperature (T

Amax

) of the appli-

cation, and the maximum allowable junction temperature

Jmax

Rmax

Jmax

−T

Amax

The maximum allowable value for junction to ambient Ther-

mal Resistance, θ

, can be calculated using the formula:

Rmax

LP3872 and LP3875 are available in TO-220 and TO-263

packages. The thermal resistance depends on amount of

copper area or heat sink, and on air flow. If the maximum

allowable value of θ

calculated above is ≥60 ˚C/W for

TO-220 package and ≥60 ˚C/W for TO-263 package no

heatsink is needed since the package can dissipate enough

heat to satisfy these requirements. If the value for allowable

falls below these limits, a heat sink is required.

HEATSINKING TO-220 PACKAGE

The thermal resistance of a TO220 package can be reduced

by attaching it to a heat sink or a copper plane on a PC

board. If a copper plane is to be used, the values of θ

will

be same as shown in next section for TO263 package.

The heatsink to be used in the application should have a

heatsink to ambient thermal resistance,

≤θ

−θ

In this equation, θ

is the thermal resistance from the case

to the surface of the heat sink and θ

is the thermal resis-

tance from the junction to the surface of the case. θ

about 3˚C/W for a TO220 package. The value for θ

de-

pends on method of attachment, insulator, etc. θ

varies

between 1.5˚C/W to 2.5˚C/W. If the exact value is unknown,

2˚C/W can be assumed.

HEATSINKING TO-263 PACKAGE

The TO-263 package uses the copper plane on the PCB as

a heatsink. The tab of these packages are soldered to the

copper plane for heat sinking. Figure 3 shows a curve for the

of TO-263 package for different copper area sizes, using

a typical PCB with 1 ounce copper and no solder mask over

the copper area for heat sinking.

As shown in the figure, increasing the copper area beyond 1

square inch produces very little improvement. The minimum

value for θ

for the TO-263 package mounted to a PCB is

32˚C/W.

Figure 4 shows the maximum allowable power dissipation

for TO-263 packages for different ambient temperatures,

assuming θ

is 35˚C/W and the maximum junction tempera-

ture is 125˚C.

HEATSINKING SOT223-5 PACKAGE

Figure 5 shows a curve for the θ

of SOT-223 package for

different copper area sizes, using a typical PCB with 1 ounce

copper and no solder mask over the copper area for heat

sinking.

20063332

FIGURE 3. θ

vs Copper (1 Ounce) Area for TO-263

package

20063333

FIGURE 4. Maximum power dissipation vs ambient

temperature for TO-263 package

LP3872/LP3875

www.national.com 14

Application Hints (Continued)

The following figures show different layout scenarios for

SOT-223 package.

20063387

FIGURE 5. θ

vs Copper(1 Ounce) Area for SOT-223

package

20063388

FIGURE 6. SCENARIO A, θ

= 148˚C/W

20063389

FIGURE 7. SCENARIO B, θ

= 125˚C/W

LP3872/LP3875

www.national.com15

Physical Dimensions inches (millimeters) unless otherwise noted

TO220 5-lead, Molded, Stagger Bend Package (TO220-5)

NS Package Number T05D

For Order Numbers, refer to the “Ordering Information” section of this document.

LP3872/LP3875

www.national.com 16

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

TO263 5-Lead, Molded, Surface Mount Package (TO263-5)

NS Package Number TS5B

For Order Numbers, refer to the “Ordering Information” section of this document.

LP3872/LP3875

www.national.com17

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

SOT223, 5-Lead, Molded, Surface Mount Package (SOT223-5)

NS Package Number MP05A

For Order Numbers, refer to the “Ordering Information” section of this document.

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves

the right at any time without notice to change said circuitry and specifications.

For the most current product information visit us at www.national.com.

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS

WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR

CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body, or

(b) support or sustain life, and whose failure to perform when

properly used in accordance with instructions for use

provided in the labeling, can be reasonably expected to result

in a significant injury to the user.

2. A critical component is any component of a life support

device or system whose failure to perform can be reasonably

expected to cause the failure of the life support device or

system, or to affect its safety or effectiveness.

BANNED SUBSTANCE COMPLIANCE

National Semiconductor follows the provisions of the Product Stewardship Guide for Customers (CSP-9-111C2) and Banned Substances

and Materials of Interest Specification (CSP-9-111S2) for regulatory environmental compliance. Details may be found at:

www.national.com/quality/green.

Lead free products are RoHS compliant.

National Semiconductor

Americas Customer

Support Center

Email: new.feedback@nsc.com

Tel: 1-800-272-9959

National Semiconductor

Europe Customer Support Center

Fax: +49 (0) 180-530 85 86

Email: europe.support@nsc.com

Deutsch Tel: +49 (0) 69 9508 6208

English Tel: +44 (0) 870 24 0 2171

Français Tel: +33 (0) 1 41 91 8790

National Semiconductor

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Support Center

Email: ap.support@nsc.com

National Semiconductor

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Fax: 81-3-5639-7507

Email: jpn.feedback@nsc.com

Tel: 81-3-5639-7560

www.national.com

LP3872/LP3875 1.5A Fast Ultra Low Dropout Linear Regulators

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