BSC119N03S G
OptiMOS®2 Power-Transistor
Features
• Fast switching MOSFET for SMPS
• Optimized technology for notebook DC/DC converters
• Qualified according to JEDEC1) for target applications
• N-channel
• Logic level
• Excellent gate charge x RDS(on) product (FOM)
• Very low on-resistance RDS(on)
• Superior thermal resistance
• Avalanche rated
• Pb-free plating; RoHS compliant
Maximum ratings, at Tj=25 °C, unless otherwise specified
Parameter Symbol Conditions Unit
Continuous drain current IDTC=25 °C 30 A
TC=100 °C 30
TA=25 °C,
RthJA=45 K/W2) 11.9
Pulsed drain current ID,pulse TC=25 °C3) 120
Avalanche energy, single pulse EAS ID=30 A, RGS=25 Ω60 mJ
Reverse diode dv/dtdv/dt
ID=30 A, VDS=24 V,
di/dt=200 A/µs,
Tj,max=150 °C
6 kV/µs
Gate source voltage VGS ±20 V
Power dissipation Ptot TC=25 °C 43 W
TA=25 °C,
RthJA=45 K/W2) 2.8
Operating and storage temperature Tj, Tstg -55 ... 150 °C
IEC climatic category; DIN IEC 68-1 55/150/56
Value
VDS 30 V
RDS(on),max 11.9 mΩ
ID 30 A
Product Summary
Type Package Ordering Code Marking
BSC119N03S G P-TDSON-8 Q7042 S4292 119N03S
P-TDSON-8P-TDSON-8
Rev. 1.01 page 1 2004-12-15
BSC119N03S G
Parameter Symbol Conditions Unit
min. typ. max.
Thermal characteristics
Thermal resistance, junction - case RthJC - - 2.9 K/W
Thermal resistance, RthJA minimal footprint - - 62
junction - ambient 6 cm2 cooling area2) --45
Electrical characteristics, at Tj=25 °C, unless otherwise specified
Static characteristics
Drain-source breakdown voltage V(BR)DSS VGS=0 V, ID=1 mA 30 - - V
Gate threshold voltage VGS(th) VDS=VGS, ID=20 µA 1.2 1.6 2
Zero gate voltage drain current IDSS
VDS=30 V, VGS=0 V,
Tj=25 °C - 0.1 1 µA
VDS=30 V, VGS=0 V,
Tj=125 °C - 10 100
Gate-source leakage current IGSS VGS=20 V, VDS=0 V - 10 100 nA
Drain-source on-state resistance RDS(on) VGS=4.5 V, ID=25 A - 14.4 18 mΩ
VGS=10 V, ID=30 A - 9.9 11.9
Gate resistance RG-1-
Ω
Transconductance gfs
|VDS|>2|ID|RDS(on)max,
ID=30 A 22 43 - S
1)J-STD20 and JESD22
Values
2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
2) See figure 3
Rev. 1.01 page 2 2004-12-15
BSC119N03S G
Parameter Symbol Conditions Unit
min. typ. max.
D
y
namic characteristics
Input capacitance Ciss - 1030 1370 pF
Output capacitance Coss - 370 490
Reverse transfer capacitance Crss -5075
Turn-on delay time td(on) - 3.8 5.8 ns
Rise time tr- 3.4 5.1
Turn-off delay time td(off) -1523
Fall time tf- 2.6 3.9
Gate Char
g
e Characteristics3)
Gate to source charge Qgs - 3.3 4.4 nC
Gate charge at threshold Qg(th) - 1.6 2.2
Gate to drain charge Qgd - 2.1 3.2
Switching charge Qsw - 3.8 5.4
Gate charge total Qg-811
Gate plateau voltage Vplateau - 3.2 - V
Gate charge total, sync. FET Qg(sync)
VDS=0.1 V,
VGS=0 to 5 V -79nC
Output charge Qoss VDD=15 V, VGS=0 V -811
Reverse Diode
Diode continous forward current IS- - 30 A
Diode pulse current IS,pulse - - 120
Diode forward voltage VSD
VGS=0 V, IF=30 A,
Tj=25 °C - 0.93 1.2 V
Reverse recovery charge Qrr
VR=15 V, IF=IS,
diF/dt=400 A/µs - - 10 nC
3) See figure 16 for gate charge parameter definition
TC=25 °C
Values
VGS=0 V, VDS=15 V,
f=1 MHz
VDD=15 V, VGS=10 V,
ID=15 A, RG=2.7 Ω
VDD=15 V, ID=15 A,
VGS=0 to 5 V
Rev. 1.01 page 3 2004-12-15
BSC119N03S G
1 Power dissipation 2 Drain current
Ptot=f(TC)ID=f(TC); VGS≥10 V
3 Safe operating area 4 Max. transient thermal impedance
ID=f(VDS); TC=25 °C; D=0 ZthJC=f(tp)
parameter: tpparameter: D=tp/T
1 µs
10 µs
100 µs
1 ms
10 ms
DC
102
101
100
10-1
103
102
101
100
10-1 0.1
1
10
100
1000
0.1 1 10 100
VDS [V]
ID [A]
limited by on-state
resistance
single pulse
0.01
0.02
0.05
0.1
0.2
0.5
10-1
10-2
10-3
10-4
10-5
10-6
101
100
10-1
10-2 0.01
0.1
1
10
000000
tp [s]
ZthJC [K/W]
0
10
20
30
40
50
0 40 80 120 160
TC [°C]
Ptot [W]
0
10
20
30
40
0 40 80 120 160
TC [°C]
ID [A]
Rev. 1.01 page 4 2004-12-15
BSC119N03S G
5 Typ. output characteristics 6 Typ. drain-source on resistance
ID=f(VDS); Tj=25 °C RDS(on)=f(ID); Tj=25 °C
parameter: VGS parameter: VGS
7 Typ. transfer characteristics 8 Typ. forward transconductance
ID=f(VGS); |VDS|>2|ID|RDS(on)max gfs=f(ID); Tj=25 °C
parameter: Tj
3.2 V 3.4 V 3.7 V
4 V
4.5 V
10 V
0
5
10
15
20
25
30
0 1020304050
ID [A]
RDS(on) [mΩ]
25 °C
150 °C
0
10
20
30
40
50
60
70
80
012345
VGS [V]
ID [A]
0
10
20
30
40
50
60
70
0 102030405060
ID [A]
gfs [S]
2.8 V
3 V
3.2 V
3.4 V
3.7 V
4 V
4.5 V
10 V
0
10
20
30
40
50
60
70
80
0123
VDS [V]
ID [A]
Rev. 1.01 page 5 2004-12-15
BSC119N03S G
9 Drain-source on-state resistance 10 Typ. gate threshold voltage
RDS(on)=f(Tj); ID=30 A; VGS=10 V VGS(th)=f(Tj); VGS=VDS
parameter: ID
11 Typ. capacitances 12 Forward characteristics of reverse diode
C=f(VDS); VGS=0 V; f=1 MHz IF=f(VSD)
parameter: Tj
typ
98 %
0
4
8
12
16
20
-60 -20 20 60 100 140 180
Tj [°C]
RDS(on) [mΩ]
20 µA
200 µA
0
0.5
1
1.5
2
2.5
-60 -20 20 60 100 140 180
Tj [°C]
VGS(th) [V]
Ciss
Coss
Crss
104
103
102
10110
100
1000
10000
0102030
VDS [V]
C [pF]
25 °C
150 °C
25 °C, 98%
150 °C, 98%
103
102
101
100
10-1
0 0.5 1 1.5 2
VSD [V]
IF [A]
Rev. 1.01 page 6 2004-12-15
BSC119N03S G
13 Avalanche characteristics 14 Typ. gate charge
IAS=f(tAV); RGS=25 ΩVGS=f(Qgate); ID=15 A pulsed
parameter: Tj(start) parameter: VDD
15 Drain-source breakdown voltage 16 Gate charge waveforms
VBR(DSS)=f(Tj); ID=1 mA
6 V
15 V
24 V
0
2
4
6
8
10
12
0481216
Qgate [nC]
VGS [V]
20
22
24
26
28
30
32
34
36
-60 -20 20 60 100 140 180
Tj [°C]
VBR(DSS) [V]
V
GS
Q
gate
V
gs(th)
Q
g(th)
Q
gs
Q
gd
Q
sw
Q
g
25 °C
100 °C
125 °C
1
10
100
1 10 100 1000
tAV [µs]
IAV [A]
Rev. 1.01 page 7 2004-12-15
BSC119N03S G
Package Outline
P-TDSON-8: Outline
Footprint
Dimensions in mm
Rev. 1.01 page 8 2004-12-15
BSC119N03S G
Package Outline
P-TDSON-8: Tape
Dimensions in mm
Rev. 1.01 page 9 2004-12-15
BSC119N03S G
Published by
Infineon Technologies AG
Bereich Kommunikation
St.-Martin-Straße 53
D-81541 München
©
Infineon Technologies AG 1999
All Rights Reserved.
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For further information on technology, delivery terms and conditions and prices, please contact your
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Due to technical requirements, components may contain dangerous substances.
For information on the types in question, please contact your nearest Infineon Technologies office.
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Rev. 1.01 page 10 2004-12-15
