1
Motorola Small–Signal Transistors, FETs and Diodes Device Data
PNP Silicon
MAXIMUM RATINGS
Rating Symbol Value Unit
Collector–Emitter Voltage VCEO –35 Vdc
Collector–Base Voltage VCBO –40 Vdc
Emitter–Base Voltage VEBO –25 Vdc
Collector Current — Continuous IC–150 mAdc
Total Device Dissipation @ TA = 25°C
Derate above 25°CPD625
5.0 mW
mW/°C
Total Device Dissipation @ TC = 25°C
Derate above 25°CPD1.5
12 Watts
mW/°C
Operating and Storage Junction
Temperature Range TJ, Tstg –55 to +150 °C
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Thermal Resistance, Junction to Ambient R
q
JA(1) 200 °C/W
Thermal Resistance, Junction to Case R
q
JC 83.3 °C/W
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic Symbol Min Max Unit
OFF CHARACTERISTICS
Collector–Emitter Breakdown Voltage(2)
(IC = –10 mAdc, IB = 0) V(BR)CEO –35 — Vdc
Collector–Base Breakdown Voltage
(IC = –10
m
Adc, IE = 0) V(BR)CBO –40 — Vdc
Emitter–Base Breakdown Voltage
(IE = –10
m
Adc, IC = 0) V(BR)EBO –25 — Vdc
Collector Cutoff Current
(VCB = –10 Vdc, IE = 0) ICBO — –100 nAdc
Emitter Cutoff Current
(VBE = –10 Vdc, IC = 0) IEBO — –100 nAdc
2. Pulse Test: Pulse Width
v
300
m
s, Duty Cycle
v
2.0%.
Preferred devices are Motorola recommended choices for future use and best overall value.
Order this document
by MPS404A/D
SEMICONDUCTOR TECHNICAL DATA
Motorola Preferred Device
CASE 29–04, STYLE 1
TO–92 (TO–226AA)
123
Motorola, Inc. 1996
COLLECTOR
3
2
BASE
1
EMITTER
MPS404A
2 Motorola Small–Signal Transistors, FETs and Diodes Device Data
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)
Characteristic Symbol Min Max Unit
ON CHARACTERISTICS
DC Current Gain
(IC = –12 mAdc, VCE = –0.15 Vdc) hFE 30 400 —
Collector–Emitter Saturation Voltage
(IC = –12 mAdc, IB = –0.4 mAdc)
(IC = –24 mAdc, IB = –1.0 mAdc)
VCE(sat) —
—–0.15
–0.2
Vdc
Base–Emitter Saturation Voltage
(IC = –12 mAdc, IB = –0.4 mAdc)
(IC = –24 mAdc, IB = –1.0 mAdc)
VBE(sat) —
—–0.85
–1.0
Vdc
SMALL–SIGNAL CHARACTERISTICS
Common–Base Cutoff Frequency
(IC = –1.0 mAdc, VCB = 6.0 Vdc) fob 4.0 — MHz
Output Capacitance
(VCB = –6.0 Vdc, IE = 0, f = 1.0 MHz) Cobo — 20 pF
VCE, COLLECTOR–EMITTER VOLTAGE (mV)
VEC, EMITTER–COLLECTOR VOLTAGE (mV)
VBC, BASE–COLLECTOR VOLTAGE (VOLTS)
VBE, BASE–EMITTER VOLTAGE (VOLTS)
–100
–80
–60
–40
–20
0–100
–0.9
–0.82
–0.74
–0.66
–0.58
–0.50
IC, COLLECTOR CURRENT (mA)
IE, EMITTER CURRENT (mA)
Figure 1. Collector–Emitter Voltage
IC, COLLECTOR CURRENT (mA)
IE, EMITTER CURRENT (mA)
Figure 2. Base “On” Voltage
–1.0 –2.0 –3.0 –5.0 –7.0 –10 –20 –30 –50 –70
NORMAL MODE
INVERTED MODE
TJ = 25
°
C
VCE(sat) @ IC/IB = 10
VEC(sat) @ IE/IB = 2.0
IC/IB = 2.0
–100–1.0 –2.0 –3.0 –5.0 –7.0 –10 –20 –30 –50 –70
NORMAL MODE
INVERTED MODE TJ = 25
°
C
VBE(sat) @ IC/IB = 2
VBC(sat) @ IE/IB = 2
VBE(on) @ VCE = –1.0 V
MPS404A
3
Motorola Small–Signal Transistors, FETs and Diodes Device Data
hFE, DC CURRENT GAIN
hFE, DC CURRENT GAIN
hFE, DC CURRENT GAIN
hFE, DC CURRENT GAIN
NORMAL MODE INVERTED MODE
–100
IC, COLLECTOR CURRENT (mA)
Figure 3. DC Current Gain @ VCE = –0.15 Vdc
–100
IE, EMITTER CURRENT (mA)
Figure 4. DC Current Gain @ VEC = –0.15 Vdc
200
100
30
10
10
1.0
–100
IC, COLLECTOR CURRENT (mA)
Figure 5. DC Current Gain @ VCE = –1.0 Vdc
–100
IE, EMITTER CURRENT (mA)
Figure 6. DC Current Gain @ VEC = –1.0 Vdc
20
40
60
80
–1.0 –2.0 –3.0 –5.0 –7.0 –10 –20 –30 –50 –70
25
°
C
–55
°
C
1.5
2.0
3.0
5.0
7.0
–1.0 –2.0 –3.0 –5.0 –7.0 –10 –20 –30 –50 –70
TJ = 125
°
C25
°
C
–55
°
C
600
30
40
60
80
100
200
300
400
–1.0 –2.0 –3.0 –5.0 –7.0 –10 –20 –30 –50 –70
TJ = 125
°
C
25
°
C
–55
°
C
10
1.0
2.0
3.0
5.0
7.0
–1.0 –2.0 –3.0 –5.0 –7.0 –10 –20 –30 –50 –70
TJ = 125
°
C
25
°
C
–55
°
C
IB, BASE CURRENT (mA)
Figure 7. Collector Saturation Region
–0.5
0
–0.005
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
VEC, EMITTER–COLLECTOR VOLTAGE (VOLTS)
–0.4
–0.3
–0.2
–0.1
–0.01 –0.02 –0.05 –0.1 –0.2 –0.5 –1.0 –2.0 –5.0
TJ = 25
°
C
IC = –2.0 mA –10 mA –50 mA
–0.5
0
–0.4
–0.3
–0.2
–0.1
–0.05 –0.1 –0.2 –0.5 –1.0 –2.0 –5.0 –10 –20 –50
IB, BASE CURRENT (mA)
Figure 8. Emitter Saturation Region
TJ = 25
°
C
IE = –0.5 mA –2.0 mA –10 mA –50 mA
MPS404A
4 Motorola Small–Signal Transistors, FETs and Diodes Device Data
IB, BASE CURRENT (mA)
Figure 9. Emitter–Collector “On” Resistance
VR, REVERSE VOLTAGE (VOLTS)
Figure 10. Capacitance
100
5.0
20
–100
IC, COLLECTOR CURRENT (mA)
Figure 11. Turn–On Time
–100
IC, COLLECTOR CURRENT (mA)
Figure 12. Turn–Off Time
–1.0 –2.0 –3.0 –5.0 –7.0 –10
2.0 k
20
–1.0 –2.0 –3.0 –5.0 –7.0 –10 –20 –30 –50 –70
1.0 k
100
–1.0 –2.0 –3.0 –5.0 –7.0 –10 –20 –30 –50 –70
t, TIME (ns)
C, CAPACITANCE (pF)
rec(on), EMITTER–COLLECTOR “ON”
RESISTANCE (OHMS)
70
50
30
20
10
7.0
–0.1 –0.2 –0.3 –0.5 –0.7 –1.0 –2.0 –5.0–0.1 –0.2 –0.5–0.05 –10 –20 –50
2.0
3.0
5.0
7.0
10
30
50
70
100
200
300
500
700
1.0 k
t, TIME (ns)
200
300
500
700
TJ = 25
°
C
NOTE: The dynamic resistance between the emitter and
NOTE: collector is measured with the device operated in
NOTE: the Inverted Mode.
Ie = 100
µ
A RMS
f = 1.0 kHz
TJ = 25
°
C
IE = 0
Cob
Cib
VCC = –10 V
IC/IB = 0
TJ = 25
°
C
tr
td @ VBE(off) = –1.4 V
ts
tf
VCC = –10 V
IC/IB = 0
IB1 = IB2
TJ = 25
°
C
Figure 13. Switching Time Test Circuit
RB
10 k
0.1
µ
F
Vin
51
TO SCOPE
1.0 k
VCC = –10 V
ton, td and tr
toff, ts and tf
Vin
(Volts) VBB
(Volts)
–12 +1.4
+20.6 –11.6
Voltages and resistor values shown
are for IC = 10 mA. IC/IB = 10 and IB1
= IB2. Resistor values changed to ob-
tain curves in Figures 11 and 12.
VBB
RBB
1.0 k
Figure 14. Stored Base Charge Test Circuit
(0–250 pF)
RB*
(5.6 k
Ω
)
INPUT Vin
C1
VCC
(–6.0 V)
RC (560
Ω
)
OUTPUT
VOLTAGE WAVEFORMS
Vin
6.0 V
0
6.0 V
Vout
>5.0
µ
str, tf < 15 ns
10%
toff
MEASUREMENT PROCEDURE
C1 is increased until the toff time of
the output waveform is decreased to
0.2
µ
s, QS is then calculated by
QS = C1 Vin.
QS3 or QS7 by B–Line Electronics
or equivalent may also be used.
MPS404A
5
Motorola Small–Signal Transistors, FETs and Diodes Device Data
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R
IS UNCONTROLLED.
4. DIMENSION F APPLIES BETWEEN P AND L.
DIMENSION D AND J APPLY BETWEEN L AND K
MINIMUM. LEAD DIMENSION IS UNCONTROLLED
IN P AND BEYOND DIMENSION K MINIMUM.
R
A
P
J
L
F
B
K
G
HSECTION X–X
C
V
D
N
N
X X
SEATING
PLANE DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.175 0.205 4.45 5.20
B0.170 0.210 4.32 5.33
C0.125 0.165 3.18 4.19
D0.016 0.022 0.41 0.55
F0.016 0.019 0.41 0.48
G0.045 0.055 1.15 1.39
H0.095 0.105 2.42 2.66
J0.015 0.020 0.39 0.50
K0.500 ––– 12.70 –––
L0.250 ––– 6.35 –––
N0.080 0.105 2.04 2.66
P––– 0.100 ––– 2.54
R0.115 ––– 2.93 –––
V0.135 ––– 3.43 –––
1
STYLE 1:
PIN 1. EMITTER
2. BASE
3. COLLECTOR
CASE 029–04
(TO–226AA)
ISSUE AD
MPS404A
6 Motorola Small–Signal Transistors, FETs and Diodes Device Data
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