ee FAIRCHILD ee SEMICONDUCTOR wm NDS331N N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description These N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMCIA cards, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package. July 1996 Features #134, 20 V. Rogion) = 0.21 2 @ Veg= 2.7 V Rogiony = 0.16 2 @ Veg= 4.5 V. = Industry standard outline SOT-23 surface mount package using poprietary SuperSOT-3 design for superior thermal and electrical capabilities. = High density cell design for extremely low Rog). = Exceptional on-resistance and maximum DC current capability. D { } G 8 SuperSOT-3 Absolute Maximum Ratings T, = 25C unless otherwise noted Symbol | Parameter NDS331N Units Voss Drain-Source Voltage 20 Vv Vass Gate-Source Voltage - Continuous 8 Vv lp Maximum Drain Current - Continuous (Note 1a) 1.3 A - Pulsed 10 Py Maximum Power Dissipation (Note 1a) 0.5 Ww (Note 1b) 0.46 Ty Teste Operating and Storage Temperature Range -55 to 150 C THERMAL CHARACTERISTICS Rosa Thermal Resistance, Junction-to-Ambient 250 C/W (Note 1a) Rosc Thermal Resistance, Junction-to-Case (Note 1) 75 C/W 1997 Fairchild Semiconductor Corporation NDS331N Rev.EELECTRICAL CHARACTERISTICS (T, = 25C unless otherwise noted) Symbol Parameter Conditions | Min | Typ | Max | Units OFF CHARACTERISTICS BV ps5 Drain-Source Breakdown Voltage Veg = 0 V, Ip= 250 PA 20 Vv loss Zero Gate Voltage Drain Current Vos = 16 V, Vgg= OV 1 HA T, =125C 10 pA lassr Gate - Body Leakage, Forward Veg = 8 V, Vog = OV 100 nA lassr Gate - Body Leakage, Reverse Veg = 78 V, Vog= OV -100 nA ON CHARACTERISTICS (note 2) Vestn) Gate Threshold Voltage Vog = Vag: |p = 250 pA 0.5 0.7 1 V | T,=125C | 03 | 053 | 08 Rosony Static Drain-Source On-Resistance Veg = 2.7 V, 1p = 1.3A 0.15 | 0.21 Q | T, =125C 0.24 | 0.4 Veg = 4.5V,1,=1.5A 0.11 0.16 lpyony On-State Drain Current Veg = 2.7 V, Veg = 5 V A Ves = 4.5 V, Vig = 5 V Irs Forward Transconductance Vog = OV, 1) = 1.34, 3.5 Ss DYNAMIC CHARACTERISTICS Css Input Capacitance Vpg = 10V, Vag = OV, 162 pF Coss Output Capacitance f= 1.0 MHz 85 pF Cres Reverse Transfer Capacitance 28 pF SWITCHING CHARACTERISTICS (note 2) tocon) Turn - On Delay Time Vop = SV, ID=1A, 5 20 ns t Turn - On Rise Time Ves =5V, Ree = 6 Q 25 40 ns tovoin Turn - Off Delay Time 10 20 ns t Turn - Off Fall Time 5 20 ns Q, Total Gate Charge Vpg = 5 V, I =H 1.34, 3.5 5 nc Q,. Gate-Source Charge Vos = 4.5 V 0.3 nc Qya Gate-Drain Charge 1 nc NDS331N Rev.EElectrical Characteristics (T, = 25C unless otherwise noted) Symbol | Parameter Conditions | Min | Typ | Max | Units DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS lg Maximum Continuous Drain-Source Diode Forward Current 0.42 A low Maximum Pulsed Drain-Source Diode Forward Current 10 A Vop Drain-Source Diode Forward Voltage Veg = OV, I= 0.42 A (Note 2) 0.8 1.2 Vv Notes: 1. Ry, is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R,,, is guaranteed by design while R,,, is determined by the user's board design. Tra _ TT Polt) = reap = Fas ero ~ 1208) X Rosiaw ery Typical R,,, using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 250C/W when mounted on a 0.02 in? pad of 20z copper. b. 270C/W when mounted on a 0.001 in? pad of 20z copper. la 1b i eS 8 Go @ Scale 1:1 on letter size paper 2. Pulse Test: Pulse Width < 300ps, Duty Cycle < 2.0%. NDS331N Rev.ETypical Electrical Characteristics 2.0 Ip , DRAIN-SOURCE CURRENT (A) nD 0 1 2 Vos , DRAIN-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. R DS(ON) NORMALIZED DRAIN-SOURCE ON-RESISTANCE 50 -25 0 25 50 75 100 Ty, JUNCTION TEMPERATURE (C) Figure 3. On-Resistance Variation with Temperature. 125 150 4 Vps = 5.0V Ty= 56C oso 425C wo y |p, DRAIN CURRENT (A) nD 0 0.5 1 1.5 2 25 Vos , GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. R pg(on), NORMALIZED DRAIN-SOURCE ON-RESISTANCE Rogion) . NORMALIZED DRAIN-SOURCE ON-RESISTANCE Vin NORMALIZED GATE-SOURCE THRESHOLD VOLTAGE 0 0.5 1 15 2 25 3 | D DRAIN CURRENT (A) Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. Ty= 125C 0 0.5 1 1.5 2 2.5 3 ae DRAIN CURRENT (A) Figure 4. On-Resistance Variation with Drain Current and Temperature. Vos= Vos Ip = 250pA "-50 -25 0 25 50 75 100 125 150 Ty , JUNCTION TEMPERATURE (C) Figure 6. Gate Threshold Variation with Temperature. NDS331N Rev.E( \ Typical Electrical Characteristics (continued) wi 1.12 2 - Ip = 250A Lo 9 $ 1.08 A Nz _- ze E 81.04 oc O14. 24 lL go Su 1 3 9 H 0.96 DA zZ < Z| oc a o S a -25 0 25 50 75 100 Ty , JUNCTION TEMPERATURE (C) 125 150 Figure 7. Breakdown Voltage Variation with Temperature. 600 400 = nM 3 3 CAPACITANCE (pF) a oO 01 02 05 1 2 5 10 20 Vos DRAIN TO SOURCE VOLTAGE (V) Figure 9. Capacitance Characteristics. Di DUT Vi N , / SS Raen a ( ) OM Vout a Ss 1 Vop 7) C) Figure 11. Switching Test Circuit. 2 0.001 , REVERSE DRAIN CURRENT (A) $s 0.0001 0 0.2 Figure 8. Body Diode Forward Voltage Variation with Source Current and Temperature. a 0.4 0.6 0.8 1 Vp: BODY DIODE FORWARD VOLTAGE (V) 1.2 r Ip=1.3A B wo h Ves , GATE-SOURCE VOLTAGE (V) 2 3 4 Q, , GATE CHARGE (nC) Figure 10. Gate Charge Characteristics. raat t 10% te tote t t- d(off) | 90% N20 % 10% 90% 50% PULSE WIDTH Figure 12. Switching Waveforms. INVERTED NDS331N Rev.ETypical Electrical Characteristics (continued) 8 20 2 Vps = 5.0V 10 Ww ti Ty =-55C a6 ss o | 25C Z 2 ns W 1 oc 8 O_o 125C 2 S54 o a fn > 03 5} oo < Qo c g ZZ B o1 Ves = 2.7V Z2 4 SINGLE PULSE =See Note1b F 0.03 of Ty = 25C a 0 0.01 0 1 2 3 4 01 02 05 1 2 5 10 20 30 Ip. DRAIN CURRENT (A) Vpg, DRAIN-SOURCE VOLTAGE (V) Figure 13. Transconductance Variation with Drain Figure 14. Maximum Safe Operating Area. Current and Temperature. = = 1.8 = | < F b 6 Zz | E08 ita a 16 3 | a | > L 6 06 < Le Ww [ 5 14 | 3 tb wo w 04 = t|fia E | 2 4.5"x5" FR-4 Board 5 Q12 if Ta = 25C s 2 0.2 5g tb Still Air x 4.5"x5" FR-4 Board bE L Vag = 2.7V 9 wo iS < L Ta = 25C = = Still Air 4 | n 9g 1 0 01 0.2 0.3 0.4 0 0.1 0.2 0.30 0.4 20z COPPER MOUNTING PAD AREA (in?) 20z COPPER MOUNTING PAD AREA (in ) Figue 15. SuperSOT-3 Maximum Figure 16. Maximum Steady-State Drain Steady-State Power Dissipation. versus Copper Current versus Copper Mounting Pad. Area Mounting Pad Area. uw Oo 05 z SE Roua (t) = rt) * Rosa =n 02 5 EG R gga = See Note 1b tt wo _ i 2 0.05 4 a 2 , f P(pk) N i Zi 0.02 bet ZS 0.01 2 ow . _p* = 0.005 Ty-Ta =P * Roya) SE Duty Cycle, D =t1 A F 0.002 0.001 0.0001 0.001 0.01 0.1 1 10 100 300 ty, TIME (sec) Figure 17. Transient Thermal Response Curve. Note : Thermal characterization performed using the conditions described in note 1b. Transient|thermal response will change depending on the circuit board design. NDS331N Rev.E