UM10973
LPCXpresso54114
Rev. 1.1 — 25 February 2016
User manual
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Abstract
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Contact information
For more information, please visit: http://www.nxp.com
Revision history
Rev
Date
Description
1.1
20160225
Applied the updated user manual template.
1.0
20160218
Initial version.
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1. Introduction
The LPCXpresso™ family of boards provides a powerful and flexible development
system for NXP's Cortex®-M family of MCUs. They can be used with a wide range of
development tools, including the NXP’s LPCXpresso IDE. The LPCXpresso54114 board
has been developed by NXP to enable evaluation of and prototyping with the LPC54110
family of MCUs, and is based on the LPC54114J256BD64 version of the MCU.
This document describes the LPC54114 LPCXpresso LQFP board hardware. The
following aspects of interfacing to the board are covered by this guide:
Main board features.
Setup for use with development tools.
Supporting software drivers.
Board interface connector pin out.
Jumper settings.
Fig 1. LPCXpresso54114 Board
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2. Feature summary
The LPCXpresso54114 board includes the following features:
On-board, high-speed USB based, Link2 debug probe with ARM’s CMSIS-DAP and
SEGGER J-Link protocol options.
Link2 probe can be used with on-board LPC54114 or external target.
Support for external debug probes.
Tri-color LED.
Target Reset, ISP, and WAKE buttons.
Expansion options based on Arduino UNO and PMod™, plus additional expansion
port pins.
On-board 1.8/3.3V or external power supply options.
Built-in power consumption measurement.
UART, I2C and SPI port bridging from LPC54114 target to USB via the on-board
debug probe.
8Mb Macronix MX25R SPI flash.
FTDI UART connector.
2.1 Board layout and settings
This section provides a quick reference guide to the main board components,
configurable items, visual indicators and expansion connectors. The layout of the
components on the LPCXpresso54114 board is shown in Fig 2.
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Fig 2. LPCXpresso54114 layout
The function of each identified component is listed in Table 1.
Table 1. Table Board interface components
Circuit ref
Description
Ref section
D1
Link2 LPC43xx BOOT0_LED indicator. Reflects the state of LPC43xx Link2
MCU P1_1. When the boot process fails, D1 will toggle at a 1 Hz rate for 60
seconds. After 60 seconds, the LPC43xx is reset.
0
D2
Tri-color LED driven by Target LPC54114 MCU. JP8 must be shunted for
+3.3V to be applied to D2 anode. The default shunt for JP8 is a 0Ω resistor
installed at JS19.
0
D3
Target LPC54114 Power LED.
0
D4
Target LPC54114 Reset LED – LED is on anytime the Target RESETn is
pulled low.
0
J1, J2, J8, J9
Expansion connectors, including Arduino Uno rev3 compatible connectivity.
8
J3
External processor control header. This connector provides access to the
LPC54114 control and ISP0 boot control to enable an external device control
reset and entry into I2C/SPI boot mode.
n/a
J4
PMod™ (SPI / I2C) Bridge connector. An external Application Processor (AP)
or PMod™ peripheral may be connected to the LPC54114 Target MCU SPI
and I2C via this connector.
8
D1
D2
D3
D4
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Circuit ref
Description
Ref section
J5
Target MCU Power / USB Device connector. Connect this micro USB B-type
connector to a +5V power source when it is desired to power only the Target
MCU, and leave the on-board Link2 debug probe unpowered.
n/a
J6
Link2 micro USB B-type connector. Powers both the Link2 side of the board
and LPC54114 Target side of the board. Power the board from this
connector when using the on-board debug probe to debug the LPC54114
Target MCU.
Table 2
JP1
LPC54114 Target SWD disable – 2-position jumper pins.
1) Jumper open (default) the LPC54114 Target SWD interface
enabled. Normal operating mode where the Target SWD is
connected to either the on-board Link2 debug probe or an
external debug probe.
Jumper shunted, the LPC54114 Target SWD interface is disabled. Use this
setting only when the on-board Link2 debug probe is used to debug an off-
board Target MCU.
6
JP3
JP3 can be installed to reduce the voltage sense resistance (used by
the on-board current measurement circuitry) from 8.24 ohms to 4.12
ohms.
5.1
JP4
A current meter may be installed across JP4 terminals to measure the
LPC54114 current consumption. By default JP4 is shunted by a 0Ω
resistor installed at JS11; remove this shunt to measure current at JP4.
5.1.2
JP5
Link2 (LPC43xx) force DFU boot – 2 position jumper pins.
1) Jumper open (default) for Link2 to follow the normal boot
sequence. The Link2 will boot from internal flash if image is
found there. With the internal flash erased the Link2 normal
boot sequence will fall through to DFU boot.
Jumper shunted to force the Link2 to DFU boot mode. Use this setting
to reprogram the Link2 internal flash with a new image or to use the
LPCXpresso IDE with CMSIS-DAP protocol.
6.1.3
JP6
JP6 is used to isolate the Link2 debug probe (SPI bridge function) from
the LPC54114 target to prevent leakage current in power critical
applications / current consumption analysis. JP6 needs to be fitted to
use the SPI bridging function between the LPC54114 and Link2. This
jumper is not fitted by default.
n/a
JP7
On-board reset enable/disable. This jumper (not factory installed)
connects the reset button and reset signal from the expansion
connector J1 to the LPC54114 reset input. This jumper is shunted by
a zero ohm resistor on SJ9. This jumper is intended to be used when
an external host processor (controlling reset) is connected at J3.
n/a
JP8
Tri-color LED anode voltage enable:
1) By default JP8 is shunted by a 0Ω resistor installed at JS19.
To disable +3.3V to the tri-color led common anode, remove the
resistor installed at JS19.
5.1 and 0
JP9
Power supply voltage selection – 3 position jumper pins.
1) Jumper 1–2: LPC54114 is powered at 1.8V.
Jumper 2–3 (default): LPC54114 is powered at 3.3V.
n/a
JP10
Target connector USB (J5) VBUS to LPC54114 connection:
1) Installed (default): JP10 connects VBUS from Target USB
connector to the LPC54114.
Not installed: VBUS from J5 is unconnected.
n/a
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Circuit ref
Description
Ref section
P1
10-pin SWD connector The SWD connector is used to debug the
LPC54114 Target from an external debug probe. The same SWD
connector can also be used to connect the on-board Link2 debug probe
to an off-board target MCU (for this JP1 must be shunted).
6
P2
LPC54114 VDD current monitor Vsense measurement. The Vsense
can be measured with a volt meter. Pin 1 (square pad) is positive and
pin 2 is negative. LPC54114 current is calculated by dividing the
measured voltage at P2 by the Vsense resistance value of 4.12Ω.
5.1.1
P3
FTDI serial header. In addition to provide a serial output from
LPC54114, the Target side of the board can be powered from the FTDI
header. The LPC54114 supports serial ISP boot from the FTDI header.
4.1
P4
External ADC reference input. The pads of this header enable external
VREF (negative and positive) ADC reference voltages to be injected.
Pin 1 (indicated by the square pad) of the connector footprint can
connected to the VREFP pin of the LPC54114 by removing the zero
ohm resistor at SJ2 from position 1-2 and bridging pads 2-3 instead.
Similarly, Pin 3 of P4 can be connected to the VREFN of the LPC54114
by removing the zero ohm resistor at SJ1 from position 1-2 and
bridging pads 2-3 instead.
LPC54110
User Manual
SW1
LPC54114 Target WAKE pushbutton. When pressed the WAKE
switch will drive LPC54114 P0_24 to a low level.
9.3
SW2, SW3
These switches can be used to force the LPC54114 in to ISP boot
modes:
Boot mode
ISP0
ISP1
Vbus (from J5)
I2C/SPI boot
Pressed
Pressed
X
UART boot
Pressed
0
USB Mass storage
Pressed
1
Boot from internal flash
After reset these pins may also be used to generate interrupts.
9.2
SW4
LPC54114 Target Reset pushbutton.
9.1
TP1
Ground terminal test point.
n/a
U12
Link2 MCU
n/a
U11
LPC54114 Target LQFP64 MCU
n/a
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3. Getting Started
By default, the LPCXpresso54114 is configured to use the on-board debug probe (Link2)
to debug the on-board target (LPC54114), using the CMSIS-DAP debug protocol pre-
programmed into the Link2 Flash memory. The LPCXpresso IDE (available for free
download at http://www.nxp.com/lpcxpressoide) or development tools that support the
CMSIS-DAP protocol can be used in the default configuration. Check with your toolchain
vendor for availability of specific device support packs for the LPC54110 family of
devices.
Note that when using the LPCXpresso IDE, the on-board Link2 can also be booted in
DFU mode by installing a jumper on JP5; if this is done then the IDE will download
CMSIS-DAP to the probe as needed. Using DFU boot mode will ensure that the most up-
to-date / compatible firmware image is used with the IDE. Note that spare jumpers are
provided in the board packaging, taped to the card insert beneath the board.
Installation steps for use with LPCXpresso IDE on a Windows 7/8/10 platform (booting
Link2 in DFU mode):
1. Download and install the LPCXpresso IDE (version 8.1 or later).
2. Install JP5 to force the Link2 debug probe to boot in DFU mode (see notes above).
3. Connect the LPCXpresso54114 board to the USB port of your host computer,
connecting a micro USB cable to connector J7 (“Link”). The board will boot a simple
LED blinky example using the tricolor LED, alternating between red and green.
4. Allow about 10 seconds for the LPCXpresso54114 devices to enumerate for the first
time; the device will appear as “LPC Device”.
5. Download the LPCOpen examples & drivers from https://www.nxp.com/lpcopen or
https://www.nxp.com/OM13089, selecting the version for the toolchain you are using;
project files for LPCXpresso IDE, Keil and IAR tools are available.
6. Start the LPCXpresso IDE and import the LPCOpen zip file by clicking Import
project(s) in the “Start here panel.”
7. The simplest example is periph_blinky, which will blink the tricolor LED (fast blinking
of the red LED) on the LPCXpresso54114. Click on the periph_blinky in the “Project
Explorer” panel, then click Debug ‘periph_blinky’ in the “Start here” panel. This will
build the project and then launch the debug session.
8. After detecting and booting the Link2, the IDE will prompt for selection of the
processor core to debug – M4 or M0. Select the M4 target. Note that after this
selection has been made once for a given project, the IDE will assume this as the
default for that project.
9. The IDE will show a source code window and break at the function main(). Press F8
(or use the Resume icon) to run the program.
Installation steps for use with third party tools on a Windows 7/8/10 platform (Link2
configured for CMSIS-DAP):
1. Download and install LPCScrypt or the Windows drivers for LPCXpresso boards
(http://www.nxp.com/lpcutilities). This will install required drivers for the board.
2. Ensure JP5 is open to force the Link2 debug probe to boot from internal flash.
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3. Connect the LPCXpresso54114 board to the USB port of your host computer,
connecting a micro USB cable to connector J7 (“Link”). The board will a simple LED
blinky example using the tricolor LED, alternating between red and green.
4. Allow about 30 seconds for the LPCXpresso54114 devices to enumerate for the first
time. It is not necessary to check the Hardware Manager, however if this is done
there will be five devices; four under Human Interface Devices (CMSIS-DAP, LPC-
SIO, two HID Compliant Devices, and a USB Input Device) and one under Ports
(LPC-LinkII Ucom.)
5. Your board is now ready to use with your 3rd party tool. Follow the instructions for
those tools for using a CMSIS-DAP probe.
4. LPC54114 Serial ports
By default the LPC54114 UART0 is connected to the FTDI header at J5. This can be
used for ISP booting or sending debug messages out to a host computer via a suitable
cable. The LPC54114 UART0 can also be connected through a virtual communication
port (VCOM) UART bridge Link2 function to a host computer connected to the J6 USB
Link2.
The factory default CMSIS-DAP Link2 image includes UART bridge functionality (VCOM
support), and this firmware is also available with the LPCScrypt utility, available at
http://www.nxp.com/lpcutilities. When running this firmware the default source of data to
the LPC54114 RXD is the FTDI header. Once the Link2 receives any data via the VCOM
port of a host computer it will set P2_2 low to select the Link2 UART0 data to the
LPC54114. In order to reset this so the FTDI connection can be used it is necessary to
power cycle the board.
4.1 P3 FTDI header
The FTDI header P3 mates with FTDI cable TTL-232R-3V3. P3 interfaces the LPC54114
UART0 to a Host PC virtual serial port. The location of P3 is shown in Fig 3. The pin out
and a description of the signals at P3 are listed in Table 2.
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Fig 3. FTDI connector
Table 2. P3 FTDI interface
LPC54114 Signal
FTDI signal
Pin #
Direction
LPC54114 Signal
GND
GND
1
GND
No connect
CTS
2
No connect
Board +5V
5V
3
Board +5V
UART0_RXD
TXD
4
From host
UART0_RXD
UART0_TXD
RXD
5
To host
UART0_TXD
No connect
RTS
6
GND
5. Board power connections and measurement
The LPCXpresso54114 board requires +5V input to power the on-board voltage
regulators which in turn power the Link2 debug probe and other +3.3V circuits, the
LPC54114 target and other +1.8V circuits, and the Arduino +5V and +3.3V power rails.
When the main external power source is from the Link2 side USB micro B-type connector
(J7), both the Link side and LPC54114 Target sections of the board are powered. When
the main external power is from the Target side USB micro B-type connector (J5), or
FTDI header (P3) only the LPC54114 Target section of the board is powered.
A block diagram of the board power tree is shown in Fig 4. When the LPC54114 Target
is to be debugged from an external debug probe, instead of the on-board Link2 debug
probe, the Link USB connector (J7) must be disconnected. The circle with I indicates
where the current monitoring circuitry measures / where an ammeter can be inserted.
1
2
3
4
5
6
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The LPC54114 Target VDD selection of 1.8V or 3.3V is made at JP9, with 3.3V set as
the default.
Fig 4. Board power diagram
5.1 LPCXpresso54114 current measurement
The LPC54114 current can be measured by measuring the voltage across a sense
resistor in series with the supply, a current meter or using the on board current
measurement circuit. Each of these methods will be described in subsections below.
There is no current monitoring of the Link2 section circuits on the board. The Target side
power going to LEDs and support ICs is not monitored by the current measurement
circuit. The LPC54114 LQFP package has the core and IO power both sourced from the
same VDD pins.
When a shield board is attached, attempting to measure the lowest possible power the
LPC54114 IO pins must be configured according to how the software has configured the
shield board to ensure there is no extra current from the LPC54114 IO ports that have
external pull-up or pull-down resistors enabled. JS19 should be opened to ensure no
leakage through the tri-color LED and +3.3V supply, and JP6 opened to avoid leakage to
the Link2 via the I2C and SPI connections between it and the LPC54114.
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5.1.1 LPC54114 Vsense resistor current measurement
The voltage across a series 4.12Ω resistor with the target LPC54114 VDD can be
manually measured at P2 on the PCB. The voltmeter positive probe is applied to P2 pin
1 (square pad) and negative probe to P2 pin 2. Use Ohm’s law to calculate the current
(LPC54114 current = measured voltage / 4.12Ω). As an example if the measured
voltage is 10mV, then 10e-3 / 4.12Ω = 2.44mA. Note that the input current to the
MAX9634 used in the on-board current measurement will be included in the voltage
measured across this resistor.
5.1.2 LPC54114 VDD current measurement using a current meter
A current meter may be inserted at JP4 to measure the LPC54114 VDD input current.
The 0Ω resistor at JS11 must be removed and the current meter connected at the
positive input at JP4 pin 1 (square pad) and negative input at pin 2.
5.1.3 LPC54114 VDD current measurement
The LPCXpresso54114 board has an on-board current measurement circuit consisting of
a MAX9634T (U5) current monitor chip and a 12-bit ADC (ADC122S021, U11) with a 12-
bit sample at 50k to 200ksps. The on-board MAX9634T current monitor measures the
voltage across the LPC54114 VDD vsense resistors; either 8.24Ω or 4.12 Ω if JP3 is
installed. The MAX9634 multiplies the sense voltage by 25 to provide a voltage range
suitable for the ADC to measure. A 2-input analog mux selects between the LPC54114
current monitor and the output on a MAX9634T current monitor chip on an expansion
board (with compatible current measurement circuit on-board). The current measurement
circuit is controlled by the Link2 processor and is not user programmable. Power
measurement utilities to use this feature are available in the LPCXpresso IDE installation.
Due to input offset voltage variations in the MAX9634, the current measurement circuit is
not recommended for measuring current below 150uA. See Fig 5 as a guideline for
measurement error versus measured current.
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Fig 5. Current measurement circuit error
5.1.4 Shield board current measurement
To use the on-board current measurement circuitry, any expansion board must match the
functionality of the LPCXpresso54114. Refer to the board schematics for more
information.
6. Debug Configurations
The LPCXpresso54114 LQFP board has a built-in debug probe referred to as “Link2”.
The LPC54114 target MCU can be debugged by the Link2 debugging probe, or from an
external debug probe installed at P1. On-board jumpers JP1 and JP2 must be correctly
positioned for each mode. The on-board Link2 debug probe is capable of debugging
target MCU’s with a VDDIO range of 1.6V to 3.6V. Use JP9 to set the LPC54114 chip
VDD to the desired voltage level (+1.8V or +3.3V). Check the sections below for the
appropriate jumper settings and how to properly power the board.
% Error
LPC54114 current (µA)
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6.1.1 Debugging LPC54114 target using on-board (Link2) debug probe
To use the on-board Link debug probe, the LPCXpresso54114 board must be powered
from the Link2 USB connector J7, and jumper JP2 must be fitted in position pin 1 - 2
(Local Target). Jumper JP1 must be open to enable the target LPC54114. Connecting
the micro USB J7 to a host computer will power the Link and Target sections of the board
and provide the USB link to the debug tool software.
6.1.2 Debug LPC54114 target using external debug probe
To use an external debug probe, connect the probe to the SWD (P1) connector, power
the LPC54114 Target section of the board from the Target micro USB connector J5, and
fit a jumper to JP2 across pin 1 - 2 (Local Target). Jumper JP1 must be open to enable
the target LPC54114. The on-board Link2 debug probe must be unpowered, by leaving
J7 unconnected.
6.1.3 On-board Link2 flash programing
To program the Link2 Flash the Link2 MCU must be in DFU mode. If the Link2 already
has a valid image in the flash, you will need to force it into DFU mode by placing a
jumper shunt on JP5, then power the board by connecting the micro USB J7 to a host
computer. Link2 MCU programming is performed using the LPCScrypt utility (see
http://www.nxp.com/lpcutilities). Instructions for using the tool are located at the same
web page.
6.2 Using on-board Link2 to debug an off-board target LPC MCU
The LPCXpresso54114 board’s Link2 debug probe may be used to debug an off-board
target MCU. The on-board Link2 debug probe is capable of debugging target MCU’s
with a VDDIO range of 1.6V to 3.6V. To keep the on-board target LPC54114 MCU from
interfering with the SWD interface, JP1 must be fitted. The Link2 debug probe SWD is
connected by a ribbon cable between the P1 connector to the off-board target MCU SWD
interface. Power the LPCXpresso54114 board from the Link USB connector J7, and fit
jumper JP2 across pins 2 - 3 (External Target).
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7. LED indicators
The LPCXpresso54114 board LED locations are shown in Fig 2. A description of each
on-board LED indicator is shown in Table 3.
Table 3. LED indicator functions
LED reference
Description
D1
Link2 MCU BOOT0_LED indicator. Reflects the state of Link2 MCU P1_1.
When the boot process fails, D1 will toggle at a 1 Hz rate for 60 seconds.
After 60 seconds, the Link2 MCU is reset. It will be ON when the Link2
MCU is Booting using DFU (See description for JP6).
D2
Tri-color LED – Driven by Target LPC54114 MCU. The red led is driven by
P0_29. The green led is driven by P0_30. The blue led is driven by
P0_31. LEDs are on when the LPC54114 port is output low. To light any
of the tri-color leds, JP6 must have a shunt between pins 1 – 2. By default
the 0Ω resistor at JS17 provides the shunt for JP6. To measure the lowest
possible current from LPC54114 remove the 0Ω resistor at JS17 (remove
+3.3V from led common anode).
D3
Target LPC54114 power LED. This LED is on any time power is applied to
the Target LPC54114 MCU. LED will have a brighter intensity when the
LPC54114 is powered from +3.3V than when powered by +1.8V.
D4
Target Reset LED. This LED is on anytime the Target RESETn is pulled
low.
8. Expansion connectors
The LPCXpresso54114 board includes four expansion connectors plus a PMod
compatible connector (J3). The expansion connectors (J1, J2, J8 and J9) incorporate an
Arduino Uno revision 3 footprint in their inner rows. Not all connector locations are
populated on the expansion connectors since the LPC54114 does not have enough I/O
to utilize all of the available connections (additional pin locations are provided for
compatibility with future LPCXpresso boards).
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Table 4. Expansion connectors
Reference
Description
J1
The odd number pins are compatible with Arduino Uno rev3 Digital
15:8, AREF, SDA & SCL connector. The even numbered pins are
used for external access and expansion of LPC54114 signals not
used by the Arduino Uno rev3 compatible interface.
J2
The odd numbered pins 1 – 13 are compatible with Arduino Uno rev3
Digital 7:0 connector. The even numbered pins, and odd numbered
pins 17 and 19, are used for external access and expansion of
LPC54114 signals not used by the Arduino Uno rev3 compatible
interface.
J3
PMod™ connector. Connected to the LPC54114 Target MCU SPI0
and I2C2.
J8
The even numbered pins 6 – 20 are compatible with Arduino Uno
rev3 Power connector. The odd numbered pins, and even numbered
pins 2 and 4 are used.
J9
The even numbered pins 2 – 12 are compatible with Arduino Uno
rev3 Analog connector. The odd numbered pins are used for
external access and expansion of LPC54114 signals not used by the
Arduino Uno rev3 compatible interface.
9. Buttons
The LPCXpresso54114 board has 4 push buttons available to control the operation of the
LPC54114 (target) MCU. Their functions are as described below.
9.1 Reset
This button is used to reset the LPC54114 (note that the Link2 is NOT reset by this
button.)
9.2 ISP0 and ISP1
These button connect to the LPC54114 P0_31 (ISP0 button) and P0_4 (ISP1 button) pin
and may be used to force the LPC54114 into its various ISP boot modes. See Table 5.
Table 5. ISP boot mode control
Boot mode
ISP0
ISP1
Vbus (from J5)
I2C/SPI boot
Pressed
Pressed
X
UART boot
Pressed
Not pressed
0
USB Mass storage
Pressed
Not pressed
1
Boot from internal flash
Not pressed
Not pressed
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To force entry into one of these boot modes hold down the required button(s), press and
release the Reset button, then release the ISP button(s).
Note that for USB Mass Storage boot to work, a USB host must be connected to J5 and
JP10 must be installed in order to route Vbus to the LPC54114. When the LPC54114 has
been booted in mass storage mode a firmware image (which must be named
firmware.bin) can be virtually “dragged and dropped” onto the board (which appears as a
mass storage device called “CRP DISABLED” on the host computer) using a file
manager utility (such as File Explorer on Windows, or Finder on MacOS). Before
dropping new firmware onto the board the existing firmware.bin needs to be deleted.
This can be useful when the LPC54114 flash has been programmed with code that
disables the SWD debug pins or changes timing settings such that the debug probe has
problems communicating with it. The ISP buttons can be used to force the LPC54114
into a state where the debugger can regain debug control.
The ISP buttons can also be used to trigger an interrupt by configuring the P0_31 / P0_4
pins and associated interrupt controls within your application code.
9.3 WAKE
This button can be used to generate an interrupt by pulling down the P0_24 of the
LPC54114.
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UM10973
LPCXpresso54114
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User manual
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10. Legal information
10.1 Disclaimers
Limited warranty and liability Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation -
lost profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability
towards customer for the products described herein shall be limited in
accordance with the Terms and conditions of commercial sale of NXP
Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s
own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP
Semiconductors accepts no liability for any assistance with applications or
customer product design. It is customer’s sole responsibility to determine
whether the NXP Semiconductors product is suitable and fit for the
customer’s applications and products planned, as well as for the planned
application and use of customer’s third party customer(s). Customers should
provide appropriate design and operating safeguards to minimize the risks
associated with their applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Evaluation products — This product is provided on an “as is” and “with all
faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates
and their suppliers expressly disclaim all warranties, whether express,
implied or statutory, including but not limited to the implied warranties of non-
infringement, merchantability and fitness for a particular purpose. The entire
risk as to the quality, or arising out of the use or performance, of this product
remains with customer.
In no event shall NXP Semiconductors, its affiliates or their suppliers be
liable to customer for any special, indirect, consequential, punitive or
incidental damages (including without limitation damages for loss of
business, business interruption, loss of use, loss of data or information, and
the like) arising out the use of or inability to use the product, whether or not
based on tort (including negligence), strict liability, breach of contract, breach
of warranty or any other theory, even if advised of the possibility of such
damages.
Notwithstanding any damages that customer might incur for any reason
whatsoever (including without limitation, all damages referenced above and
all direct or general damages), the entire liability of NXP Semiconductors, its
affiliates and their suppliers and customer’s exclusive remedy for all of the
foregoing shall be limited to actual damages incurred by customer based on
reasonable reliance up to the greater of the amount actually paid by
customer for the product or five dollars (US$5.00). The foregoing limitations,
exclusions and disclaimers shall apply to the maximum extent permitted by
applicable law, even if any remedy fails of its essential purpose.
10.2 Trademarks
Notice: All referenced brands, product names, service names and
trademarks are property of their respective owners.
<Name> — is a trademark of NXP Semiconductors N.V.
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User manual
Rev. 1.1 — 25 February 2016
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11. List of figures
Fig 1. LPCXpresso54114 Board ................................. 3
Fig 2. LPCXpresso54114 layout ................................. 5
Fig 3. FTDI connector ............................................... 10
Fig 4. Board power diagram ...................................... 11
Fig 5. Current measurement circuit error .................. 13
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UM10973
LPCXpresso54114
UM10973
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User manual
Rev. 1.1 — 25 February 2016
20 of 21
12. List of tables
Table 1. Table title here .................................................. 5
Table 2. P3 FTDI interface ............................................ 10
Table 3. LED indicator functions ................................... 15
Table 4. Expansion connectors ..................................... 16
Table 5. ISP boot mode control .................................... 16
NXP Semiconductors
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LPCXpresso54114
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in the section 'Legal information'.
© NXP Semiconductors N.V. 2016. All rights reserved.
For more information, please visit: http://www.nxp.com
Date of release: 25 February 2016
Document identifier: UM10973
13. Contents
1. Introduction ......................................................... 3
2. Feature summary ................................................ 4
2.1 Board layout and settings ................................... 4
3. Getting Started .................................................... 8
4. LPC54114 Serial ports ........................................ 9
4.1 P3 FTDI header .................................................. 9
5. Board power connections and measurement . 10
5.1 LPCXpresso54114 current measurement ........ 11
5.1.1 LPC54114 Vsense resistor current measurement
......................................................................... 12
5.1.2 LPC54114 VDD current measurement using a
current meter .................................................... 12
5.1.3 LPC54114 VDD current measurement ............. 12
5.1.4 Shield board current measurement .................. 13
6. Debug Configurations ....................................... 13
6.1.1 Debugging LPC54114 target using on-board
(Link2) debug probe ......................................... 14
6.1.2 Debug LPC54114 target using external debug
probe ................................................................ 14
6.1.3 On-board Link2 flash programing ..................... 14
6.2 Using on-board Link2 to debug an off-board
target LPC MCU ............................................... 14
7. LED indicators ................................................... 15
8. Expansion connectors ...................................... 15
9. Buttons ............................................................... 16
9.1 Reset ................................................................ 16
9.2 ISP0 and ISP1 .................................................. 16
9.3 WAKE .............................................................. 17
10. Legal information .............................................. 18
10.1 Disclaimers....................................................... 18
10.2 Trademarks ...................................................... 18
11. List of figures ..................................................... 19
12. List of tables ...................................................... 20
13. Contents ............................................................. 21