ka _SGS-THOMSON Sf, MiCROELECTROMICS TS27C64A 64K (8K x 8) CMOS UV EPROM - OTPROM FAST ACCESS TIME : 200 ns. COMPATIBLE WITH HIGH SPEED MICRO- PROCESSORS, ZERO WAIT STATE. m 28-PiIN JEDEC APPROVED PIN-OUT. m LOW POWER CONSUMPTION : - ACTIVE 30mA Max - STANDBY 100uA Max m PROGRAMMING VOLTAGE : 12.5V. HIGH SPEED PROGRAMMING (< 1 minute). PDIP-28 mw ELECTRONIC SIGNATURE. (Ordering information at the end of the datasheet) DESCRIPTION Figure 1 : Pin Connection The TS27C64A is a high speed 65,536 bit UV erasable and electrically reprogrammable Vep -1t GND DATA OUTPUT Vpp O> OE OUTPUT ENABLE PGM CWP ENABLE cE AND PROG LomiG OUTPUT BUFFERS Y Y J] peconeR | GATING Ss S| AO-At2 | +| mance | 3 x 65.636 BIT DECODER chi Mathix _ VAQOO55S ABSOLUTE MAXIMUM RATINGS "? Symbol Parameters Values : Unit Operating temperature range Tu to TH : TaMB TS27C64ACQ 0 to +70 C TS27C64AVOQ -40 to +85 Tste Storage temperature range -65 to +125 Cc Vpp) Supply voltage -0.6 to +14 V Vin@ Input voltages Ag -0.6 to +13.5 Vv IN Except Vpp, AQ -0.6 to 6.25 Po Max power dissipation 1.5 Ww Lead temperature 2 (Soldering : 10 seconds) +300 c NOTES : 1. "Maximum ratings are those values beyond which the safety of the device cannot be guaranteed. Except to "Oper- ating temperature range they are not meant to imply that the devices should be operated at these limits. The table of "Electrical characteristics provides conditions for actual device operation. 2. With respect to GND. OPERATING MODES PINS MODE CE OE AQ PGM Vpp Voc spurs READ Vit Vit Xx Vin Vcc Vec Dout OUTPUT DISABLE Vic Vin Xx Vin Vec Vec HIGH Z STANDBY Vy OX x X Vec Vec HIGH Z HIGH SPEED PROGRAMMING! Vi Vin x Vit Vep Voc Din PROGRAM VERIFY Vit Vit X Via Vpp Voc Dour PROGRAM INHIBIT Vin X Xx X Vop Veo HIGH Z ELECTRONIC SIGNATURE) Vit Vit Va? Vin Vec Voc CODE NOTES : 1. X can be either Vi or Vin. 2. VH = 12.0V + O0.5V. 3. All address lines at Vi except AQ and AO that is toggled from Vi. (manufacturer code : 9B) to Vin (type code : 2it4 . Or. SGS THOMSON 94TS27C64A READ OPERATION DC CHARACTERISTICS (TamB = TL to TH, Voc = 5V + 10%, Vss = OV. Unless otherwise specified) f ; Values Symbol Parameter Test Conditions v 7 | Unit Min Typ! ) Max | lui Input Load Current Vin = Voc or GND 10. vA Vout_= Vcc or Vss i lLo Output Leakage Current CE = Vin 10 HA Vpp Vpp Read voltage Voc - 0.7 Voc Vv Vit Input Low Voltage 1-0. 0.8 Vv Vin Input High Voltage 2.0 Vec+t Vv lo. = 2.1 mA 0.45. Vo Output Low Voltage lo. = OWA 041 | Vv . lon = -400 pA 2.4 | Vou Output High Voltage lo = OPA Vec-0.1 ' Vv Voc Supply Active Current TTL CE=OE=Vi, Inputs=Vin coe Levels or 10 30 mA Vic, f = 5 MHz, (/O = OmA locsa1 Voc Supply Standby Current CE = Vin 0.5 1 mA lecss2 | Vcc Supply Standby Current CE = Voc 10 100 uA Ipp1 Vpp Read Current Vpp = Voc = 5.5V 100 HA NOTE : 1. Typical conditions are for operation at : Tama = +25C, Voc = 5V, Vep = Vcc and Vss = OV AC CHARACTERISTICS (Tams = TL to TH)! ) | 27C64A Symbol Parameter Test I : : Unit y condition -20 , 25 730 Min | Max = Min | Max | Min | Max 1 tacc Address to Output Delay CE= OE=ViL 200 250 300 | ns tce CE to Output Delay OE=Vit 200 250 300 | ns toe OE to Output Delay CE=Vit 80 100 120 | ns toe OE or CE High to Output 0 50 0 60 0 105 ns Float Output Hold from __ tou Address, CE or OF Which- | CE= OE=Vit 0 0 0 ns ever occured first i CAPACITANCE Tams = +25C, f = 1 MHz (Note 3) Symbol Parameter Test Condition Min Typ.) Max Unit Cin Input Capacitance - Vin = OV 4 6 pF Cout Output Capacitance Vout = OV | 8 12 pF NOTES : 1. Vcc must be applied at the same time or before Ver and removed after or at the same time as Vpp. Vep may be connected to Vcc except during program. 2. The tor compare level is determined as follows : High to THREE-STATE, the measured Vow? -0.1V Low to THREE-STATE the measured Voi'? + 0.1V. . Capacitance is guaranteed by periodic testing. Tame = +25C, f=1MHz. Tor, is specified from OE or CE whichever occurs first. This parameter is only sampled and not 100 % tested. . All parameters are specified at Vcc = 5V + 5% for 27C64-20X, 27C64-25X and 27C64-30X. aARwW 5. SGS-THOMSON 3 's MICROELECTRONICS 95TS27C64A READ OPERATION (Continued) AC TEST CONDITIONS Input Rise and Fal! Times : <20ns Timing Measurement Reference Level : Input pulse levels > 0.45V to 2.4V Inputs : 0.8V and 2V - Outputs : 0.8V and 2V Figure 3 : AC Testing Input/Output Waveform Figure 4 : AC Testing Load Circuit 1.3V 1N914 2.4 20 2.0 "Test Poms 3.3kq 0.45 0.8 O8 DEVICE UNDER out TEST == CL-100pF | | 1 L VRO00516 ROO0517 Figure 5 : AC Waveforms Vin / ---- ADDRESSES x ADDRESS VALID v IL OUTPUT HIGH Z L S HIGH Z Vit Po Z VRCOOS"E NOTES : 1. Typical values are for Tama = 25C and nominal supply voltage. 2. This parameter is only sampled and not 100% tested. 3. OE may be delayed up to tacc - tOE after the falling edge CE without impact on tacc 4. tor is specified from OE or CE whichever occurs first. 4/4 - ky, Soe 96DEVICE OPERATION The seven modes of operation of the TS27C64A are listed in the Operating Modes table. A single 5V power supply is required in the read mode. All inputs are TTL levels except for Vpp and AQ in electronic signature mode. READ MODE The TS27C64A has two control functions, both of which must be logically active in order to obtain data at the outputs. Chip Enable (CE) is the power control and should be used for device se- lection. Output Enable (OE) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable, address access time (tacc) is equal to the delay from CE (tce). Data is available at the outputs after a delay of toe from the falling edge of OE, assuming that CE has been low and addresses have been stable for at least tacc-toe. STANDBY MODE The TS27C64A has a standby mode which re- duces the maximum power dissipation to 5.5mW. The TS27C64A is placed in the standby mode by applying a TTL high signal to the CE input. When in standby mode, the outputs are in a high imped- ance state, independent of the OE input. TWO LINE OUTPUT CONTROL Because EPROMs are usually used in larger memory arrays, we have provided two control lines which accommodate this multiple memory connection. The two control lines allow for : a) the lowest possible memory power dissipation, b) complete assurance that output bus contention will not occur. To use these control lines most efficiently, CE should be decoded and used _as the primary de- vice selecting function, while OE should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby modes and that the output pins are active only when data is required from a particular memory device. PROGRAMMING MODES Caution : Exceeding 14V on Vpp will damage the TS27C64A. Initially, (and after each erasure for UV EPROM), all bits of the TS27C64A are in the "1" state. Data TS27C64A is introduced by selectively programming "Os" into the desired bit locations. Although only "Os" will be programmed, both "1s" and "Os" can be presented in the data word. The only way to change a "0" to a 1 is by ultraviolet light erasure. The TS27C64A is in the programming mode when the Vpp input is at 12.5V and CE and PGM are both at TTL Low. To avoid damage to the device from spurious voltage transients, a 0.1 UF filter capacitor must be placed accross Vpp. Vcc and ground. The data to be programmed is ap- plied 8 bits in parallel to the data output pins. The levels required for the address and data inputs are TTL. Programming of multiple TS27C64As in parallel with the same data can be easily accomplished due to the simplicity of the programming require- ments. Like inputs of the parallel TS27C64As may be connected together when they are programmed with the same data. A low level TTL pulse applied to the PGM input programs the paralleled TS27C64As. HIGH SPEED PROGRAMMING The high speed programming algorithm described in the flowchart rapidly programs the TS27C64A using an efficient and reliable method particularly suited to the production programming environ- ment. An individual device will take around 1 minute to program. PROGRAM INHIBIT Programming of multiple TS27C64As in parallel with different data is also easily accomplished by using the program inhibit mode. A high level on CE or PGM inputs inhibits the other TS27C64As from being programmed. Except for CE, all like inputs (including OE) of the parallel TS27C64As may be common. A TTL low-level pulse applied to a TS27C64A CE and PGM inputs with Vep at 12.5V will program that TS27C64A. PROGRAM VERIFY A verify may be performed on the programmed bits to ensure that they were correctly pro- grammed. The verify routine is performed with CE and OE at Vit, PGM at Vin and Vpp at 12.5V. ELECTRONIC SIGNATURE MODE Electronic signature mode allows the reading out of a binary code that will identify the EPROM manufacturer and type. &r* SGS-THOMSON s/t MICH. BCTRONES 97TS27C64A This mode is intended for use with programming equipment in oder to automatically match the de- vice to be programmed with its corresponding programming algorithm. This mode is functional in the 25C + 5C ambient temperature range that is required when programming the TS27C64A. To activate this mode the programming equip- ment must force 11.5V to 12.5V on address line AQ of the TS27C64A. Two bytes may then be sequenced from the device outputs by toggling address line AO from Vit to Vin. All other address lines must be held at Vit during electronic signa- ture mode. ERASING (applies for UV EPROM) The TS27C64A is erased by exposure to high intensity ultraviolet light through the transparent window. This exposure discharges the floating gate to its initial state through induced photo cur- rent. It is recommended that the TS27C64A be kept out of direct sunlight. The UV content of sun- light may cause a partial erasure of some bits in a relatively short period of time. Direct sunlight can also cause temporary functional failure. Ex- tended exposure to room level fluorescent fight- 6 &7 SGS-THOMSON 2 M.CROELECTRON-CS 98 ing will also cause erasure. An opaque coating (paint, tape, label, etc.) should be placed over the package window if this product is to be operated under these lighting conditions. Covering the win- dow also reduces Icc due to photodiode currents. An ultraviolet source of 2537A yielding a total inte- grated dosage of 15 watt seconds/cm* is required. This will erase the part in approximately 15 to 20 minutes if a UV lamp with a 12,000 uWicm? power rating is used. The TS27C64A to be erased should be placed 1 inch from the lamp and no filters should be used. An erasure system should be calibrated periodically. The distance from lamp to unit should be maintained at 1 inch. The erasure time is increased by the square of the distance (if the distance is doubled the erasure time goes up by a factor of 4). Lamps lose intensity as they age. When a lamp is changed, the distance, or the lamp is aged, the system should be checked to make certain full erasure is occuring. Incompiete erasure will cause symptoms that can be misleading. Programmers, components, and system designs have been erroneously suspected when incomplete erasure was the basic problem.PROGRAMMING OPERATIONS") (Tap = 25 + 5C, Voc = 6.0V + 0.25V, Vpp = 12.5V + 0.3V) DC AND OPERATING CHARACTERISTICS TS27C64A | Symbol Parameter Test condition , Values Unit Min Typ Max I li Input Current (all inputs) Vi = Vir or Vin | 10 pA: Vit Input Low Level (all inputs) -0.1 0.8 vo Vin Input High Level 5 2.0 Veco +1 Vv VoL Output Low voitage during verify lo. = 2.1 mA 0.45 Vv Vou Output High voltage during verify lon = -400 vA 2.4 Vv ees | Yee Sunny cures 20 mA Ipp2 Vep supply current (Program) CE = Vi. = PGM 30 mA AC CHARACTERISTICS Symbol Parameter Test Condition Values Unit Min Typ Max tas Address Set-up time 2 ys toes OE Set-up Time 2 us tos Data Set-up Time 2 us taH Address Hold time 0 us : tou Data Hold Time 2 bs tore Gol enable to output float 0 130 ns tves Vep set-up time 2 us tves Voc set-up time 2 us tew PGM initial program pulse width 0.95 10 1.05 ms topw) PGM overprogram pulse width 2.85 78.75 ms tces CE set-up time 2 us toE Data valid from OE 150 ns NOTES : 1. Vcc must be applied simultaneously or before Vep and removed simultaneously or after Vep. 2. topw is defined in flow chart. 7/1 ii SGS-THOMSON EL EGT BONIS 99TS27C64A AC TEST CONDITIONS Input rise and fall times Timing reference levels : (10% to 90%) < 20ns inputs : 0.8V and 2.0V - Outputs : 0.8V and 2.0V Input pulse levels : 0.45V to 2.4V Figure 6 : High Speed Programming Waveforms PROGRAM VERIFY Vin 2 ADDRESSES \ ADDRESS STABLE x Veo+t | 2 Voc ! tvcs Veco ce in * | CE ! VIL t 4 CES K Vin 5 PGM Vv : L t t OES OE * pw NOTES : 1. The input timing reference level is 0.8V for Vii and 2.0V for Vin. 2. toe and tore are characteristics of the device but must be accommodated by the programmer. 3. When programming the TS27C64A, a 0.1 uF capacitor is required across Ver and ground to suppress spurious voltage transients which can damage the device. 8/11 . 7 scs THOMSON 100Figure 7 : High Speed Programming Flow Chart TS27C64A START ADDR-FIRST LOCATION { PROGRAM ONE ims PULSE INCREMENT X PROGRAM VERIFY ONE BYTE PROGRAM ONE PULSE OF 3X-ms DURATION LAST ADDR? NGREMENT NO _{ ADDR J DEVICE PASSED DEVICE FAILED DEVICE FalLep VROOD63} ky SGS-THOMSON SVM, icnosecsoM:es 9/11 101TS27C64A ORDERING INFORMATION - UV EPROM Part Number Access Time Supply Voltage Temp. Range Package TS27C64A-20XCQ 200 ns 5V+ 5% 0C to+ 70C FDIP-28 TS27C64A-25XCQ 250 ns 5V+t 5% 0C to +70C FDIP-28 TS27C64A-30XCQ 300 ns 5V+ 5% 0C to + 70C FDIP-28 TS27C64A-20CQ 200 ns 5V + 10% OC to + 70C FDIP-28 TS27C64A-25CQ 250 ns 5V + 10% 0C to + 70C FDIP-28 TS27C64A-30CQ 300 ns 5V + 10% : 0C to + 70C FDIP-28 TS27C64A-20VQ 200 ns : 5V + 10% 40C to+85C | FDIP-28 TS27C64A-25VQ 250 ns 5V + 10% -40C to + 85C FDIP-28 TS27C64A-30VQ 300 ns 5V + 10% -40C to + 85C FDIP-28 PACKAGE MECHANICAL DATA Figure 8 : 28-PIN CERAMIC DIP BULLS EYE mm inches Min | Typ | Max | Min Typ - Max 38.10 1.500 13.05 13.36 514 526 3.90 5.08 154 199 3.00 118 0.50 1.78) 020 070 33.02 1.300 2.29 2.79 090 110 0.40 0.55) .016 027 1.17 1.42] .046 i 056 0.22 0.31; .009 012 1.52 2.49) .060: 098 0 10 oO 10 15.40 15.80 606 622 5.71 225 6.86 7.36 270 290 tort" {57 S&S-THOMSON & MICROSLEGCTAOMCS 102ORDERING INFORMATION - OTP ROM TS27C64A Part Number Access Time Supply Voltage Temp. Range Package TS27C64A-20CP 200 ns 5V+ 10% 0C to + 70C PDIP28 TS27C64A-25CP 250 ns 5V+ 10% 0C to + 70C PDIP28 TS27C64A-20VP 200 ns 5V+ 10% -40C to + 85C PDIP28 TS27C64A-25VP 250 ns 5V+ 10% -40C to + 85C PDIP28 TS27C64A-35TP(1) 350 ns 5V4 10% -40C to + 105C PDIP28 TS27C64A-20CFN 200 ns 5V+ 10% 0C to + 70C PLOC32 TS27C64A-25CFN 250 ns 5V+t 10% 0C to + 70C PLOC32 TS27C64A-20VFN 200 ns 5V+ 10% -40C to + 85C PLOC32 TS27C64A-25VFN 250 ns 5V+ 10% -40C to + 85C PLOC32 NOTE : Consult your nearest SGS-THOMSON sales office for availability of other combination. (1) Specification available upon request. PACKAGE MECHANICAL DATA - OTP ROM Figure 9 : 28-PIN PLASTIC DIP Pa VRO00287 14 1 mm inches ] Dim. Min | Typ | Max | Min | Typ | Max q A al 0.63 .025 B 0.45 .018 15 28 bi | 0.23 0.31' 009! 012 WA OT FS SP SS Se | b2 1.27 1.050 rhe D1 ' c D | c D 37.34 1.470 1 & | 15.20 16.68] .598 657 ;e 2.54 .100 e3 33.02 + 1.300 eq : ! F 14.10 | 555 l 4.45 175 Li 3.30 130 o mm inches | Dim. + 98 pies 023 Min | Typ |; Max Min Typ Max ' DENOTES PIN 4 955 A | 3.04 3.55 120 140 nDsSmonnm At | 1.96 2.41 078 035 B | 033 053.013 021 p B1 | 0.66 0.81} 026: 032 H D | 12.31 12.57) .485 495 D1 | 11.35 (11.50) .447 453 Er 84 D2 | 9.90 10.92! .380 430 E | 14.85 15.11) 585 595 E1 | 13.89 14.04 547! 553 ; | E2 | 12.44 13.46: 490] 530] 11/11 103