EL4083/EL4084 June 1993 Rev A el HIGH PERFORMANCE ANALOG INTEGRATED CIRCUITS : oe Current Mode Four Quadrant Multiplier: : oS ope ee ae eee Features * Novel current mode design Virtual ground current summing inputs Differential ground referenced current outputs High speed (both inputs) 200 MHz bandwidth 12 ns 1% settling time * Low distortion THD < 0.03% @ 1MHz THD < 0.1% @ 10 MHz Low noise (Ry, = 502) 100 dB dynamic range 10 Hz to 20 kHz 73 dB dynamic range 10 Hz to 10 MHz Wide supply conditions +5 to 15V operation Programmable bias current Built-in high performance switching > 50 dB input(s) to output(s) isolation @ 100 MHz 20 ns ON/OFF, OF F/ON switching time * 0.2 dB gain tolerance to 25 MHz Applications * Four quadrant multiplication Gain control * Controlled signal summing and multiplexing * HDTV video fading and switching Mixing/modulating/ demodulating (phase detection) * Frequency doubling * Division * Squaring Square rooting RMS and power measurement * Vector addition-RMS summing * CRT focus and geometry correction Polynomial function generation AGC circuits General Description The 4083/84 makes use of an Elantec fully complimentary ox- ide isolated bipolar process to produce a patent pending current in, current out four quadrant multiplier. Input and output sig- nal summing and direct interface to other current mode devices can be accomplished by simple connection to reduce component count and preserve bandwidth. The selection of an appropriate series resistor value allows an input to accept a voltage signal of any size and optimize dynamic range. The differential outputs offer significant performance improvements which greatly ex- tend the usable gain control range at high frequencies. A fast, high isolation switching function has been incorporated into the design. The bias current is programmable to accommodate the voltage and power dissipation constraints of the package and available systems supplies. The devices can implement all the classic four quadrant multi- plier applications and are uniquely well suited to gain control, signal summing and multiplexing of broadband signals. Connection Diagrams EL4083 EL4084 8-Pin SO/P DIP 14-Pin SO/P DIP xin Gi 4 rs] iz (pias) tz (etas) [7] 14] Vee ono [27] 7] (XY OUT ne* [2] 3] NC* y IN C3] Esk7e ix IN 3] iz] IXY OUT Ver rs | (XY OUT onp Fi] i1] Voc Vv ING 10] XY OUT . 4083-1 NCc* tf ro] NC? Top View swe [74 E Vee 4083-2 Top View * In package trim pins MAKE NO CONNECTION! Ordering Information PartNo. Temp.Range Package Outline# EL4083CN 40C to + 85C 8-Pin P-DIP MDP0031 EL4083CS 40C to +85C 8-Pin SO MDP0027 EL4084CN 40C to +85C 14-Pin P-DIP MDP0031 EL4084CM -40C to + 85C 14-Pin SO MDP0027 4-46 Mm 3329557 0003306 O4T nce a eee Notet oe OSS Absolute Maximum Ratings (7, = 25c) Vs Voltage between Vg+ and Vg +33V Tst Izpras) Z, Bias Current +2.4mA Ix X Input Current +24mA Ty Y Input Current +2.4mA Pp Maximum Power Dissipation See Curves Ta Operating Temperature Range EL4083 40C to + 85C EL4084 40C to + 85C Ty Operating Junction Temperature EL4083 150C EL4084 150C Storage Temperature Lead Temperature DIP Package (Soldering: <10 seconds) SO Package Vapor Phase (60 seconds) Infrared (15 seconds) 65C to +150C 300C 215C 220C Electrical Characteristics (Ta = 25C, Vg = 5, Iz = 1.6 mA) unless otherwise specified Parameter Conditions Min Typ Max Units Power Supplies Operating Supply Voltage Range 4.5 #165 Vv Icc Vg = 15V Ig = 0.2mA 7.2 8.5 9.5 mA lee Vs = +5V,Iz = 1.6mA 42.0 44.0 45 mA IgE Vg = 15V, Iz = 0.2mA 9.5 10.0 12 mA IgE Vg = t5V,Iz = 1.6mA 45 47 48 mA Multiplier Performance 5) Transfer Function (Uxy-Ixy) = Kdlx X Iy)/Iz K Value 0.92 0.965 0.985 1) Total Error 2mA < Ixy, ly <2mA +05 2 %FS vs. Temp Twin to Tax 15 +3 %FS 2) Linearity 0.25 0.5 %FS 3) Bandwidth 3 dB (See Figure 2) 200 225 MHz 5)X Feedthrough DC to Ixy or Ixy Ix = 2mA,Iy = 0 (unnulled) 0.15 1.6 %FS 5) Feedthrough DC to Ixy or Ixy Ty = +2 mA,Iy = 0 (unnulled) 0.15 1.6 FS 4) AC Feedthrough, X to Ixy or Ixy Ix = 4mApp, Iy = nulled f = 3.58 MHz 80 dB f = 100 MHz 28 dB 4) AC Feedthrough, X to (IxyIxy) = 4mApp, ly = nulled 50 dB DC <f<1GHz 4) AC Feedthrough, Y to Ixy or Ixy Iy = 4 mApp, Ixy = nulled f = 3.58 MHz 64 dB f = 100 MHz 26 dB 4) AC Feedthrough, Y to (Iyy-Ixy) Ty = 4mApp, Ix = nulled DC <f<1GHz 50 dB 4-47 Me 3129557 0003307 Tb v80r Id /E80r Ta aaa acaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa seamanEL4083/EL4084 Parameter Conditions Min Typ Max Units Inputs (Ix, Ty) Full Scale Range FRS = 1.25 X Iz (Nominal) +2 mA Clipping Level Cy =2XIz 2.85 3.2 mA 2 (Ix) 30 40 48 2 Zn (ly) 30 36 48 2 Input Offset Voltages at Input Pins, Iz = 16mA 4 +4 mV (Vosx: Vosy) Iz = 0.2mA ~12 +12 mV 5)Input Offset Currents Rsx = Rsy = 1K, Vx = Vy = 0, +10 +40 pA Ixos; lyos Twin to Tyax +20 nA/C Nonlinearity Ix Iy = 2mA, 2mA <Iy <2mA 0.1 0.6 FS ly Ix = 2mA, 2mA <ly <2mA 0.1 0.4 %FS Distortion, Ix (to Ixy or Ixy) Iy = 2mA, 2mA <Iy <2mA f = 3.58 MHz 55 dB f = 100 MHz 25 dB Distortion, Iy (to Iyy or Ixy) Ix = 2mA, 2mA < ly <2mA f = 3.58 MHz 56 dB f = 100 MHz 26 dB Distortion, Ix (to (Ixy Ixy) Iy = 2mA, 2mA < Ixy <2mA f = 3.58 MHz 66 dB f = 100 MHz 35 dB Distortion, Iy (to (Ixy Ixy) Ixy = 2mA, 2mA <Ily <2mA f = 3.58 MHz 66 dB f = 100 MHz 34 dB Diff Gain @3.58 MHz Ix Iz = 0.2 mA, ly = 0.25 mA 0.2 % ly Iz = 0.2 mA, Ix = 0.25 mA 0.17 % Ix Iz = 1.6mA,ly = 2mA 0.1 % ly Iz = 1.6mA,Ix = 2mA 0.05 % Diff Phase @3.58 MHz Ix Iz = 0.2 mA, ly = 0.25 mA 0.5 deg ly Iz = 0.2 mA, Ix = 0.25 mA 0.5 deg Ix Iz = 1.6mA,Iy = 2mA 0.05 deg ly Iz = 1.6mA,Iy = 2mA 0.05 deg Outputs (Ixy, Iyx) 5)Output Iog Ix =Iy =0 -15 | +120 pA 5)Diff Output Iog Ix = Iy = 0, Iyy-Ixy) +01 +80 pA Voltage Compliance 1.5 +2.0 Vv Max Output Current Swing 2.85 3.2 mA Noise Spectral Density 10 Hz <f < 10MHz Ry = 500 125 pA/rootHz Iz (Bias) Current Range Tested 0,2 16 mA Input Voltage Iz = 0.2mA 25 mV Input Voltage Iz = 16mA 25 mV 4-48 me 3229557 0003304 IleParameter Conditions Min Typ Max Units Switching (Specifications Apply for EL4084 only) Igw (off) 0.87 mA Igw (on) 0.2 mA Switching Voltage 9 mV Zn (swe) At Switch Control 400 500 600 a I (Internal Pulldown) 0.38 0.5 0.62 mA D.C. Output Leakage Ixy, Ixy Part Switched Off +3 pA Off Feedthrough ly to Iyy, Kyy Ty = 2mA, 2mA < Ixy <2mA +1 pA A.C. ~1kHz, Switch Off Off Feedthrough Iy to Ixy, Ixy Ixy = 2mA, -2mA <Iy <2mA 4) pA AC. ~1kHz, Switch Off Off Feedthrough Ix to Iyy-Ixy Ty = 2mA, 2mA < Ixy <2mA +4 pA A.C. ~1kHz, Switch Off Off Feedthrough ly to Iyy-Ixy Ixy = 2mA, -2mA <Iy <2mA +1 yA AC. ~1kHz, Switch Off T (on/off) 20 ns T (off/on) 20 ns Note 1: Error is defined as the maximum deviation from the ideal transfer function expressed as a percentage of the full scale output. Note 2: Linearity is defined as the error remaining after compensating for scale factor (gain) variation and input and output referred offset errors. Note 3: Bandwidth is guaranteed using the squaring mode test circuit of Figure 4. P80 1H/E80F TH Note 4: Relative to full scale output with full scale sinewave on signal input and zero port input nulled. Specification represents feedthrough of the fundamental. Note 5: Specifications are provisional for the EL4083. Corresponding specs for the EL4084 are TBD. EL4084 production specifications will appear in the 1994 data book. 4-49 @@ 332955? 0003309 655. Current Mode Fo EL4083/4084 Block Diagram EL4083/EL4084 Z (BIAS) | . MASTER EPI EP2 BIAS . GENERATOR Qi4 ye oy . i. i. {as oro ofait | ai2 Qi3 = IxY(OUT) VP+ vP- ry T] X(N) | + [Gon ore L- 1 N) QUAL OIF. Logic ~-|_(swe) GM AMP 1 + 110 | ry INTERFACE r+ at 02>} - IxY(0UT) VN+ VN- {as 04} fas a6 + o15 +} EN2 Q16 ENA 4083-3 Figure 1 4-50 MB 3229557 0003310 570 aaa a cca acca. CcAC Test Fixture +Vog = +5V Rz s l ~ 1K 510 2 470 pF W___ 3 SIG weP ix 0% XY OUT 70 roo h 120 + ) xy out 1. = 1 uF (NONPOLARIZED) z N.c. 06 9D nc. 510 0.01 uF | Veg = -5V 4083-4 Figure 2. AC Bandwidth Test Fixture Burn-In Circuit Ri 1k YJ Cw _ 71 = R3 2 4 7# 3 3k = R2 1k 0 = Cw 8 6 1." +5V C2 ade = 3 oe 5 D1 0.1 F a -Ty = = L Top View 4083-6 Figure 3. Burn-In Circuit P-DIP 4-51 MM 31229557 0003311 407 800 TH/E800 TH4083: nt Mi Current fode Four Quadrant Mult EL4083/EL4084 8-Pin Plastic DIP 8-Lead SO Maximum Power Dissipation Maximum Power Dissipation vs Ambient Temperature vs Ambient Temperature 1500 T T 1500 3 Tjmax = 150C Timax = 150C 2 = S 4 = 175 = 1200 Gj, =103/W = 1200 Pa = = Zz Zz 3 So 2 900 SN 2 900 < a a NX s w Wy yy va Fs 600 5 600 oe oe ka ud 3 300 5 300 a a oO 0 -40 -25 a 25 50 75 100 ~40 -25 0 25 50 75 100 AMBIENT TEMPERATURE (C) AMBIENT TEMPERATURE (C) 4083-6 4083-7 Figure 4a. Figure 4b. 14-Pin Plastic DIP 14-Lead SO Maximum Power Dissipation Maximum Power Dissipation va Ambient Temperature ve Ambient Temperature TjMAX = 1509C TJMAX = 150C = 8), = 70 =~ = Q s a = 70C/W S By, = 110C /W = <2 z z o 6 e e < < a a wv wv nv a a oa a lad a = = 3 5 a a -40 =-25 9 25 50 7S 100 -40 -25 0 25 50 75 100 AMBIENT TEMPERATURE (C) AMBIENT TEMPERATURE (C) 4083-8 4083-9 Figure 5a. Figure 5b. 250M ~ X INPUT a > = 200M = rm 2 150M z Zz X INPUT Z Z 100M 2 z 5 Z 50M % a x Y INPUT OM O.102mA O4mA 0.6mA O8mA 1.0mA 1.2mA 1.4mA 1.6mA 0.10.2mA O4mA O.6mA O8mA 1.0mMA 1.2mA 1.4mA 1.6mA 4083-10 4083-11 Figure 6. (Ix, Iy Bandwidth vs Iz) Figure 7. (Ix, ly 1% Settling Time vs Iz) 4-52 ME 3229557 O0033)2 343 iE _______.________ a,OUTPUT CURRENT NOISE DENSITY (pA/VHz) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.11.2 1.3 1.4 1.5 1.6 lz (mA) Figure 8. Output Noise Density vs Iz Bias 4083-12 Vs Rrr = (Vs X 1.6 mA)/(16 pA X Iz) -20m VIN -40m -60m 10 pA 100 pA IZ Figure 10. Vzrn vs Iz (Typical) 4083-19 4083-15 Input Offset Trim(s) Output Offset Trim +V5 +Vg Rro R A 70 Nyy mI 50k SPW 10 yay OR yy 10k $4F og, A> TO ky Rro = (Vg X 1.6 mA)/(30 WA X Iz) Figure 9. Optional External Trim Networks 100M 10M Z BANDWIDTH 10 pA 100 pA (Z Figure 11. Izi~ Bandwidth vs Iz 4089-14 4083-16 4-53 MP 3129557 0003313 257 aaa ta saa aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaasaa v80r Td /80r THEL4083/EL4084 EL4083/EL4084 Current Mode Four Quadrant Acti General Operating Information 17 Input (Bias, Divisor) and Power Supplies The Iz pin is a low impedance (<200.) virtual ground current input. It can accept positive current from a resistor connected to a positive voltage source or the positive supply. The instan- taneous bias for the multiplier gain core is pro- portional to this current value. Negative applied current will put the multiplier portion of the cir- cuit in a zero bias state and the voltage at the pin will be clamped at a diode drop below ground. The part will respond in a similar manner to cur- rents from a current source such as the output of a transconductance amplifier or one of its own outputs. The overall transfer equation for the EL4083/4084 is: K(Ix X Iy)/Iz = Uxy-Ixy), K ~ 1 As can be seen from the equation, the Z input can serve as a divisor input. However, it is different from the other two inputs in that the value of its current determines the supply current of the part and the bandwidth and compliance range of the outputs and other two inputs. Table 1 gives the equations describing these and other important relationships. These dependencies can complicate and/or limit the usefulness of this pin as a com- putational input. The Iz dependence of the im- pedance of the multiplying inputs can be particu- larly troublesome. See the Iz divider and the RMS #2 circuit sections of the application note for some ways of dealing with this. The primary intended use for the Z input is as a programming pin similar in function to those on programmable op amps. This enables one to trade off power consumption against bandwidth and settling time and allow the part to function within its power dissipation rating over its full operational supply range (+4.5V +16.5V). The E4083/4084 has been designed to function well for Iz values in the range of 200 pA< Iz < 1.6 mA which corresponds to Iy and Iy signal bandwidths of about 50 MHz to over 200 MHz. Higher values of Iz may cause problems at tem- perature extremes while lower values down to zero will progressively degrade the input referred D.C. offsets and reduce speed. Below about 50 uA of bias current the internal servo amplifier loop which maintains the Iz pin at ground will lose regulation and the voltage at the pin will start to move negative (see Figure 10), This is accompa- nied by a significant increase in input imped- dance of the pin. Figure 11 shows the A.C. band- width of the Iz input as a function of the D.C. value of Iz. Figures 6 and 7 show the bandwidth and 1% settling time of the multiplying inputs, Ix and Iy, as functions of Iz. Iy and Iy (Multiplier) Inputs and Offset Trimming The Ix and Iy pins are low impedance (Iz depen- dent) virtual ground current inputs that accept bipolar signals. The input referred clip value is equal to Iz X 2 while the full scale value has been chosen to be 1.25 X Iz to maintain excellent dis- tortion and linearity performance. Operating at higher full scale values will degrade these two pa- Table 1. Basic Design Equations and Relationships Positive Supply Current Negative Supply Current Power Dissipation (See Figures 4 and 5) Multipling Input(s) Impedance Multiplying Input(s) Clip Point Multiplying Input(s) Full Scale Value Multiplying Input Resistor Values (In Terms of Peak Input Signal) Full Scale Output (Single Ended) Full Scale Output (Differential) Iz (Bias) Input Voltage vs Iz Iz Signal Bandwidth vs Iz Iy, ly Signal Bandwidth vs Iz Ix, Iy 1% Settling Time vs Iz Ig+ = 3.4mA + Iz X 26 Ig- = 4.5mA + Iz XK 27 PWR = (+ Vg (Vs)) X (4mA + Iz X 26.5) Rzx = Rzy = (329) X 1.6 mA/Iz Ix (clip) = Iy (clip) = Iz x 2 ly (fs) = Ty (fs)= Iz X 1.25 (nominal) Ry = Vx (peak)/Ix (fs) Ry = Vy (peak) /Ty (fs) Ixy = Ixy = Ix (fs) X ly (fs)/IzX 2) (xy ~ Igy) = Ix (fs) X Ty (fs)/Iz (See Figure 10) (See Figure 11) (See Figure 6) (See Figure 7) Me 31329557 0003314 11h 4-54General Operating Information Contd. rameters and, to some extent, bandwidth while improving the signal to noise performance, feed- through and control range. The EL4083/4084 is fundamentally different from conventional voltage mode multipliers in that the available input range can be tailored to accommodate voltage sources of almost any size by selecting appropriate input series resistor val- ues. If desired, one can interface with voltages that are much greater than the supplies from which the part is powered. Current source signals can be connected directly to the multiplier in- puts. The parts dynamic range can also be tai- lored to a large extent for a current signal by the appropriate selection of Iz. These inputs act in the same manner as a virtual ground input of an operational amplifier and thus can serve as a summing node for any number of voltage and/or current signals. Outputs of components such as current output DACs, transconductance amplifi- ers and current conveyors can be directly con- nected to the inputs. Ideally, a multiplier should give zero output if either one of its multiplying inputs is zero. A nonzero output under these conditions is caused by a combination of input and output referred offsets. An output referred offset can be thought of as a fixed value added to the output and thus only affects D.C. accuracy. An input referred off- set at a multiplying input allows signal to feed- through from the other multiplying input to the output(s). The EL4083/4084 is trimmed during testing at Elantec for X and Y input referred off- set for Iz = 1.6 mA. The 4084 is trimmed in package and is the premium D.C. accuracy part. The internal trim networks provide a current to each input which nulls the feedthrough caused by internal device mismatches. These current values are ratioed to the value of Iz so that the input referred nulls are largely maintained at different values of Iz. However, there will be some mis- tracking in the trim networks so that the input referred null point will deviate away from zero at values of Iz lower than 1.6 mA. Figure 9 shows optional external input and output referred offset trim networks which can be used as needed to improve performance. As mentioned, the output referred offset only affects D.C. accuracy which may not be an issue in A.C. applications. In gain control applications one may only need to null feedthrough with respect to the gain control in- put. The usable untrimmed gain control range of the 4084 is in excess of 50 dB. In gain control (VCA) applications the X input should be used as the control input and the signal applied to the Y input since it has slightly higher bandwidth and better linearity and distortion performance. Current Outputs (Ixy, Ixy), Feedthrough and Distortion Another unique feature of the EL4083/4084 is the differential ground referenced current output structure. These outputs can drive 509 terminat- ed lines and reactive loads such as transformers, baluns, and LC tank and filter circuits directly.* Unlike low impedance follower buffers, these out- puts do not interact with the load to produce ringing or instability. If a high level low imped- ance output is required, the outputs can be recov- ered differentially and converted to a single end- ed output with a fast op amp such as the EL2075 (see Figure 23). The outputs can also drive cur- rent input devices such as CMF amps, current conveyors and its own inputs directly by simple connection. Figures 12 and 14 show the nulled gain and feed- through characteristics of the Ixy and Ixy out- puts which are virtually identical and differ only in phase. Figure 12 is with the A.C. signal applied to the X input with Y used as the gain control and in Figure 14 these signals are reversed. Note that in both cases the signal feedthrough rolls up and peaks near the cutoff frequency. This is quite typical of the performance of all previous four quadrant multipliers. Figures 13 and 15 show the corresponding gain/feedthrough characteristics for the differentially recovered output signal Ixy-Ixy. Note that in this case the peak feed- through at high frequencies is lower by more than 40 dB. * See EL2082 Data SheetReceiver IF Amplifier (Figure 19). The EL2082 also has a current output. 4-55 Me 3129557? 0003315 0Se v80r TH /E80V 1A cicadas aaaEL4083/EL4084 General Operating Information Contd. Figures 16 and 17 show the total harmonic dis- tortion for the single-ended and differential re- covered outputs for a full scale A.C. input signal on one input and a full scale D.C. control signal on the other. Note that above about one mega- hertz to the cutoff frequency the THD of the dif- ferentially recovered signal is as much as 10 dB lower than the single-ended signals. Switch Control and Off Isolation (On EL4084 Only) The switch control can change the outputs be- tween full on and a high isolation off state in 20 ns. The switch pin appears as a 5002 resist- ance to ground that is internally loaded by a 500 A current source to the negative supply. The D.C. voltage at the open pin is about 250 mV. Also connected internally to the pin are one base each of two complementary differen- tial pairs with the other bases connected to ground. This input has been designed so that the outputs are on if the pin is left unconnected. Also, the required on/off switching voltage at the pin is only about 500 mV to prevent package feedthrough of the switching signal. The recom- mended interface is a series resistor from the pin to the switch control voltage source whose cho- sen value will source about 1 mA into the 5000 pin resistance when the source voltage is high. This will force the outputs to their off state. The current consumption of the part in the off state is higher by about 650 pA. Lad nh (xy - YX)/X in dB 10M 100M (Hz) Figure 18 and 19 shows the full level, full gain input to single ended output isolation of the EL4084 with the outputs switched off. Also shown is the off isolation under the same condi- tions for the differentially recovered output sig- nal. Note that at high frequencies there is about a 40 dB improvement that is similar to the signal feedthrough improvement in Figures 13 and 15. The fact that the multiplier inputs are virtual grounds prevents package feedthrough from ru- ining these effects in practice. The switch glitch or feedthrough is also greatly improved by recovering the output signal differ- entially. The switching transients on the single- ended outputs can be as much as 50% of full scale with about a 5 ns duration. For the differential output, the amplitude is less than one fifth of this. In general the switching transient for the single-ended outputs can be large enough so that a system may need to ignore the output during the switching interval so that the glitch is not confused with signal. For the differentially recov- ered output, this may not be necessary. Figures 20 and 21 show the on/off/on switching response for a 100 MHz signal driving the Ix input. The two single ended outputs are shown in Figure 20 while Figure 21 is the differentially recovered output. The waveforms for the signal driving the ly input are very similar. Y (XY - YX) /X in dB ~< 1 10M 100M (Hz) 4083-17 4083-18 Figure 12. Nulled Iyy and Ixy Frequency Figure 13. Nulled (Ixy-Ixy) Frequency Response Response (Signal on XIN, (Signal on XIN, Gain Controlled by YIN) Gain Controlled by YIN) 4-56 Me 3129557 0003316 T95General Operating Information Contd. x = 2, IXOS = 9U x upusatuqoqn XY/Y, XY/Y in dB Pad 10M 100M 1G (Hz) 4063-19 Figure 14. Nulled Iyy and Iyy Frequency Response (Signal on YIN, Gain Controlled by XIN) -20dB -30dB = XY /X, XY/X -40dB -50dB (XY-YX)/X THD in dB -600B -70dB 1M 3.2M 10M 32M 100M X INPUT FREQUENCY (Hz) 4083-22 Figure 16. (Full Level XIN THD vs Frequency) 5048 oda a X/X, XY/X; @ X = FS SIG, Y = +2mA -50dB -100 dB ~1504B (XY-XY)/X; @ X = FS SIG, Y = +2mA -200 dB -250d8 1M 10M 100M 1G (Hz) 4083-29 Figure 18. XIN to Outputs Switch Off Isolation H N teu gn ia (XY - YX) /Y in dB 10M 100M 1G (Hz) 4083-20 Figure 15, Nulled Ixy-Iyy) Frequency Response (Signal on YIN, Gain Controlled by XIN) ~20dB -30dB XY/Y, XY/Y -40d8 -50dB (XY-XY)/Y THD in dB -60dB -70dB 1M 3.2M 10M 32M 100M Y INPUT FREQUENCY (Hz) 4083-21 Figure 17. (Full Level YIN THD vs Frequency) 50 4B O48 = xY/Y, XY/Y; @ = FS SIG, X = +2mA -50 dB ~100dB -150dB (xY-X)/Y; @ Y = FS SIG, X = +2mA -200dB 1M 10M 100M 16 (Hz) 4083-24 Figure 19. YIN to Outputs Switch Off Isolation 4-57 Mm 3129557 0003317 3cS b80V' 10 /E80r THEL4083/EL4084 12 0 20 40 60 80 100 120 140 TIME (ns) 4083-25 Figure 20. Ixy and Ixy ON/OFF/ON Switching Response Applications Basic Product Functions Figures 22 and 23 are the basic schematics for many of the applications of the EL4083/4084. These can perform signal mixing, frequency dou- bling, modulation, demodulation, gain control/ voltage-controlled amplification, video switching, multiplication and squaring. Figure 22 has resis- tively terminated differential outputs and has the widest bandwidth. The figure also shows the op- tion of using the EL2260 dual CMF amplifier to recover the outputs differentially at very low im- pedance. This has a maximum 3 dB bandwidth of 130 MHz and settles to 1% in 25 ns. Figure 23 uses an EL2075 at the outputs as a differential to X@100 MHz, 4Vpp, Y= +2mA sw 0 20 40 60 80 100 120 140 TIME (ns) 4083-26 Figure 21. Iyy-Igy ON/OFF/ON Switching Response single ended converter with gain to take advan- tage of the performance enhancements of the dif- ferentially recovered output mentioned above and to provide a high level low impedance drive. The 3 dB bandwidth of this circuit is over 150 MHz using good layout techniques. Howev- er, to achieve this bandwidth one must restrict the output swing to little more than 1 Vpp to avoid running into the 500V/ps minimum slew rate of the EL2075. The EL2038 has a minimum slew rate of 750V/ps and, unlike the EL2075, will work on supplies up to +15V. However, it has only half the EL2075s gain bandwidth product. Table 2 shows the input signal assignments for the applications listed above. Table 2. Input Signal Assignments for Figures 22 and 23 Circuits Application Vx Vy Vsw* Mixer Signal 1 Signal 2 x Frequency Doubler Signal Signal x Modulator Modulating Signal Carrier x Demodulator Local Oscillator Modulated Signal X Gain Control/VCA Gain Control Signal x Video Switch Gain Voltage Signal Switch Control Multiplier Signal 1 Signal 2 x Squarer Signal Signal x * X means not connected if function is not used. M@e 31229557 0003318 6b) LL a ccc Lcb80F TH /E80P TA Applications Contd. t Yoo > 22 vx RX z AW, x XY ~~ Yout2 vY 7 > 2 Y XY RY swe a QO y RSW _ vsw ~ Your1 + >$ GND * = 1/2 EL2260 Vee Iz = Vec/Rz Rx = Vx (MAX) / (1.25 X Iz) + Ry = Vy (MAX) / (1.25 X Iz) 4089-27 RSW = VSW (HIGH) /1 mA 4 *1. 510 Resistors omitted when using EL2260 *2. Optimum value of RF determined by supplies and amount or tolerable peaking (-3 dB BW ~ 90 MHz @ Vs = +5V, BW ~ 150 MHz @ +15V) Figure 22. Basic Schematic (Dual Diff Outs) Voc f 23 470* AAA. Zz VY VX 500 WW RX, xy RE x cf > > eee eofz Iz = Voec/Rz 4083-28 Rx = Vx (MAX) / (1.25 X Iz) Ry = Vy (MAX) / (1.25 x Iz) RSW = VSW (HIGH) /1 mA *Optimized for Wide Bandwidth Figure 23, Basic Schematic (Single Ended Converted) (150 MHz VCA/Switch) 4-59 Me 3229557 0003319 775 aEL4083/EL4084 Other Applications Elantec has also published an applications note covering other applications of the EL4083/4084. These include dividers, squaring and square root- ing circuits, several RMS and power measure- ment circuits, and a wideband AGC circuit. Also presented are two polynomial computation exam- ples for video and some HDTV quality fader and summing circuits with switching capability. The EL4083/4084 have been found flexible enough to easily implement all of the classic four quadrant multiplier applications and also offer interesting new applications possibilities. EL4083/4084 Macromodel This macromodel is compatible with PSPICE (copywritten by Microsim Corporation) . It has been designed to work accurately for fixed values of Iz (bias) in the range of 200 A to 1.6 mA. The additional simulation burden imposed by includ- ing provision for a time varying Iz was thought not worthwhile. The value of Iz is specified to the model by the parameter NS. The relation be- Macromodel Circuit Name: MACMOD6C - START OF DECK IBGP 57 0 2.46m IBGN 0 58 2.2m TISWI 54 58 555u IISWB 30 58 629u IZSU 26 58 10u DD100__D12 27 23 MiMP5DIODE AREA = 1 ,MODEL M1MPS5DIODE D TT = 60p IS 300f VJ = 600m XTI = 3 EG = lil RS DD99__D15 32 56 MIMP5DIODE AREA = DD98__D11 24 25 MiIMP5DIODE AREA DD97__D19 55 33 MIMP5DIODE AREA DD96__D18 33 55 MIMPSDIODE AREA DD95__D10 0 24 MIMPS5DIODE AREA = 1 DD94__D13 0 29 MIMP5DIODE AREA = 1 DD93__D9 0 26 MiIMPSDIODE AREA = 1 DD92__D14 56 32 MIMP5DIODE AREA = 2 DD91__D3 0 11 MIMPS5DIODE AREA = 8 DD90__D4 47 12 MIMP5DIODE AREA = 8 DD89__D8 46 21 MIMP5DIODE AREA = 8 DD88__D7 0 20 MiIMPSDIODE AREA = 8 QQ87__Q5 44 62 37 58 M2MPNP1 AREA = 2 1f CJO = 80m ii NN Ft tween Iz and NS is; Iz = 200 pAXNS. All other inputs can accept time varying signals. The model will provide good transient and fre- quency response and settling time estimates as well as time domain switching results. Input and output impedance and overload responses are correctly modeled. The D.C. current drawn from supplies for a given value of Iz is also correct. Noise, PSRR and the temperature dependence of A.C. parameters such as frequency response and settling time are not modeled. Linearity and dis- tortion results from the model will be worse than the real part by about a factor of three and do not show the correct frequency dependence. Also the A.C. results of the switch off isolation do not show degradation with frequency. The macromodel is constructed from simple con- trolled sources, passive components and stripped transistor and diode models. As such it should be usable, perhaps with slight modification, on all but student or demonstration simulators where the models size may be a problem. MODEL M2MPNP1 PNP CJC 1.79p 50.16666666666 7p IS =1f BF = 90 CJS = 480f QQ86__Q6 45 61 37 58 M2MPNP1 AREA = 2 QQ85__Q14 0 32 49 58 M2MPNP1 AREA = 400m QQ84__Q13 0 32 48 58 M2MPNP1 AREA = 400m QQ83__Q1 0 9 61 58 M2MPNP1 AREA = QQ82__Q2 0 9 62 58 M2MPNP1 AREA = Q081__Q8 45 62 36 58 M2MPNP1 AREA = 2 QQ80__Q7 44 61 36 58 M2MPNP1 AREA = 2 Q079__Q11 45 59 35 58 M3MNPN1 AREA = 2 .MODEL M3MNPN1 NPN CJC = 13p TF = 120p IS = 1.3f BF = 150 CJS = 480f QQ78__Q16 0 33 5158 M3MNPN1 AREA QO077__Q15 0 33 50 58 M3MNPN1 AREA QQ76__Q3 0 18 59 58 M3MNPN1 AREA = 2 QOQ75__Q4 0 18 60 58 M3MNPN1 AREA = 2 QQ74__99 45 60 34 58 M3MNPN1 AREA = 2 QQ73__Q10 44 59 34 58 M3MNPN1 AREA = 2 QQ72__Q12 44 60 35 58 M3MNPN1 AREA = 2 TF ww il 400m 400m MB 3129557 9003320 417 4-60Macromodel Contd. FI71 57 58 VFI7I 21 VFI7I1 73 58 0.0 F170 59 58 VFI70 1 VFI70 72 41 0.0 FI69 60 58 VFI69 1 VFI69 41 42 0.0 F168 43 58 VFI68 1 VFI68 42 73 0.0 FI67 33 32 VFI67 1 VFI67 31 0 0.0 FI66 57 40 VFI66 1 VFI66 39 72 0.0 FI65 57 62 VFI65 1 VFI65 38 39 0.0 F164 26 65 VFI64 1 VFI164 74 24 0.0 F163 31 0 VFI63 1 VFI63 28 30 0.0 F162 0 31 VFI62 1 VFI62 29 30 0.0 FI61 34 58 VFI61 1 VFI61 70 71 0.0 FI60 35 58 VFI60 1 VFI60 69 70 0.0 FI59 57 36 VFI59 1 VFI59 67 68 0.0 FI58 57 37 VFI58 1 VFI58 68 69 0.0 FI57 57 61 VFI57 1 VFI57 71 38 0.0 FI56 61 62 VFI56 500m VFI56 1 2 0.0 FI55 59 60 VFI55 500m VFI55 2 3 0.0 FI54 36 37 VFI54 500m VFI54 5 6 0.0 FI53 35 34 VFI53 500m VFI53 6 7 0.0 FI52 0 10 VFI52 1 VFI52 11 13 0.0 FI51 10 0 VFI51 1 VFI51 12 13 0.0 FI50 13 0 VFI50 2 VFI50 65 66 0.0 FI49 22 0 VFI49 2 VFI49 66 67 0.0 FI48 19 0 VFI48 1 VFI48 21 22 0.0 FI47 0 19 VFI47 1 VFI47 20 22 0.0 RR46_ LOCATION 48 36 35 TC 00 RR45__LOCATION 49 37 35 TC = 00 RR44_ LOCATION 53 34.5 TC = 00 RR43__RSU 58 0 16K TC = 00 il RR42_LOCATION 45 4 100 TC = 00 RR41__LOCATION 44 8 100 TC = 00 RR40_LOCATION 34 51 35 TC = 00 RR39_LOCATION 35 50 35 TC = 00 RR38_LOCATION 64 15 100 TC = 00 RR37_LOCATION 15 16 450 TC = 00 RR36_LOCATION 165 45 TC = 00 RR35__LOCATION 7 17 45 TC = 00 RR34_LOCATION 19 7 6.25 TC = 00 RR33__LOCATION 63 52 100 TC = 00 RR32_LOCATION 52 115K TC = 00 RR31_LOCATION 10 3 6.25 TC = 00 DD30__D6 23 0 M4MDCAP AREA = 6 -MODEL M4MDCAP D TT = 100n CJO = Ip VJ = 800m RS = 200 DD29__D5 0 23 M4MDCAP AREA = 6 DD28_D1 0 14 M4MDCAP AREA = 12 DD27_.D2 14 0 M4MDCAP AREA = 12 DD26_D16 0 32 M4MDCAP AREA = 12.5 DD25__D17 33 0 M4MDCAP AREA = 12.5 DD24__D23 18 43 M4MDCAP AREA = 4 DD23__D22 0 18 M4MDCAP AREA = 4 DD22__D21 9 0 M4MDCAP AREA = 4 DD21__D20 40 9 M4MDCAP AREA = 4 LL20__LOCATION 45 4 4n LL19__LOCATION 44 8 4n LL18__ LOCATION 64 15 4n LL17__LOCATION 15 5 71in LLi6 LOCATION 63 52 4n LL15_LOCATION 52 1 71in RR14_R6 23 15 156 TC = 824u 7.67u RR13_R1 14 52 60 TC = 824u 7.67u RR12_R12 0 54 500 TC = 824u 7.67u EVi1 055 0 43 1 EV10 270 5401 EV9 25 0 2601 EvV8 56 0 400 1 EV7 47 0 10 0 650m EV6 46 0 19 0 650m XC5__XC4 15 0 CAPSM -SUBCKT CAP5M 1 2 CC1 1 2 3.5e-13 TC = 0 -ENDS CAP5M XC4_XC3 17 15 CAP6M -SUBCKT CAP6M 1 2 CC1 12 9e-12 TC = 0 ENDS CAP6M XC3_XC2 52 0 CAP5SM XC2__XC1 53 52 CAP6M :TEMP 50 OP -_END @@ 3129557 0003321 356 ccc ccs ccc 1c ...cccc cc cccccaaAccaaaaaaaaaaaaamaaamaaaaaaaaaaaasaaaaaamaaaaaasacaaaaaaaamaaaaaaaaaaaaaaaamaaaaaaasamaaaaaaaaaaaamamaaamaaaasaammmmmaaaaa 4-61 b80r Ia /80P THEL4083/EL4084 sce a aaaaaaaaaaaaaaaaaaasaaaaaaaaaaaaasasaaasaaaaaaaaaaaaasaaaaaaaaaaasaaaamamaamaaaasaaaaaaamaaaaaaaaaaaaaaaaaaaaaaaaaadaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaasasaaaaaasaaaaaaaaaaaaaaasaaaaaaaaaaaaasasaadaaaaaaaaaaaaaaaaaaassscccsccciaa EL4083/EL4084 Current Mode Four Quadran ies Me 3129557 00033e2e 25 Yoo aga ixcT gn BGP Se (XA e Fw No O 12 1 R1 60 o ~ 2.46M ot0 b! AN 2 =z 2 _ DCAP RPBASE 3} e323 pp ON26 SAIN = 1 a KY oP OSE 3 gsblone. = BO S VY e& oF 9 12 02 N55 GAIN = 0.65 3 5S + 5 Find] 7) # fe Neo ao GAIN = 1.0% er Qa + 5 3 a ov o> YN | z GND N27 aos 2a 5 o vik + Sie = | vie ZIN 781 - a - a ~ uw = "1 XIN wig {Gain = tT tt N13 ve a= OH oy g 750 L if Tin san =2 25 o N14 ZB2 ve GAIN = 21] Yee GND - N33 500 az] N29 oT GAIN = 1.0 2 RPBASE o|2 vin vo N lu : 0 Wa myws oTy7T Go RB 45 nto | eo w N30 | aL GND Tal] N31 pe = Heol fod] YA new bs 6 N25 RE 156 a C2 7 GAIN = 1.0 GAIN = 1.9 >} AW 2) DCAP RPBASE nea NE CLa {a N32 DCAP N21 ese 25% s 255 DE 6 N54 GAIN = 0.65 a4 Se N16. 3 bs in wt sy 8 shi] = 55764 Bova x Se 2sr 2 0 2 a - Pe BN) 32 = = ~ o s4 {)se sa a" yin 2.2u\iJ2 $2 w22[cain = 1] | | N23 eo) ae r N24 5 las Iswi D) Iswa qd 703 MARZ 555U 629U oO GND = Vee 4083-29 Figure 24. Macromodel 4-62N38 oe? wbe r YA 1B Ope Fe (ea N56 NS7 = Mee JQ13 Vee N39 3 min aie at 8 o4 wo yet GAIN = 0.5 +12 Vee Y aks Vee ce Vee a VBP VP+ * pet O7 Qs vp- PNP1 PNP1 PNP1 PNP4 N40 Nat ae 2.0 2.0 2.0 2.0 (o K Q : 4 lin ote) | Faxtp HQ) GAIN = 1 So] w GAIN =1 AIN = 1 oh 2 GAIN = 0.5 as xe CV xa a a zs oO > aye N34 _ 2 N33 GAIN = 1.0] | VP+ vP- * = hs ; . Oh ox" 3 a a L5 = 2 N46 JAN ay ~~ GND o + S R17 100 = eee NEN a. R18 100 3 NG 2.0 & a a N47 AN GAIN = 0.5 L IXY XCM xB . zt La 3 aye ima aye Ya = o Oo a ~ oi 4 C LN4 7B9 N4 io ]) [Fin]: | 5 ar Shes fx) GAIN = 1 GAIN = 1 AIN = vEN S 1 ag. qo VN+ git ai2 oa} w Vee NPN NPNA NPNt NPN1 a 8 a 2.0 . . . 2.0 [vNe ove Vee Vee Vee Oo wy wns YB IYC a iS GAIN = 0.5 Figure 24, Macromodel Contd. 4083-30 4-63 Me 3229557 0003323 129 80rd /E80F 1A