598-8450-20-7CF - DIALIGHT

±60V Fault Tolerant 3.0V to 5.5V

TIA-485/TIA-422 Transceivers

XR33152/56/58

1/19

REV1A

FEATURES

 3.0V to 5.5V operation

 ±60V fault tolerance on analog bus pins

 Extended ±25V common mode operation

 Robust ESD protection:

±15kV HBM (bus pins)

± 4kV HBM (non-bus pins)

 1.65V to 5.5V logic Interface VL pin

(full-duplex package option)

 Invert control to correct for reversed

bus pins

 Enhanced receiver fail-safe protection for

open, shorted or terminated but idle

data lines

 Hot swap glitch protection on DE and

RE pins

 Driver short-circuit current limit and

thermal shutdown for overload protection

 Reduced unit loads allows up to 320

devices on bus

 Industry standard 8 and 14-pin

NSOIC packages

 -40°C to 85°C ambient operating

temperature range

APPLICATIONS

 Industrial control networks

 HVAC networks

 Building and process automation

 Remote utility meter reading

 Energy monitoring and control

 Long or unterminated transmission lines

Typical Application

Description

The XR33152, XR33156 and XR33158 family of high performance

TIA-485/TIA-422 devices are designed for improved performance

in noisy industrial environments and increased tolerance to system

faults.

The analog bus pins can withstand direct shorts up to ±60V and are

protected against ESD events up to ±15kV HBM. An extended ±25V

common mode operating range allows for more reliable operation in

noisy environments.

The receivers include full fail-safe circuitry, guaranteeing a logic

high receiver output when the receiver inputs are open, shorted

or undriven. The XR33152 receiver input impedance is at least

120kΩ (1/10 unit load), allowing more than 320 devices on the bus.

The XR33156/58 receiver input impedance is at least 30kΩ (1/2.5

unit load), allowing more than 80 devices on the bus.

The drivers are protected by short circuit detection as well as thermal

shutdown and maintain high impedance in shutdown or when powered

off. The XR33152 driver is slew limited for reduced EMI and error-free

communication over long or unterminated data cables.

The XR33152/56/58 family of high performance TIA-485/TIA-422

devices are designed for improved performance in noisy industrial

environments and increased tolerance to system faults.

The devices with DE and RE pins include hot swap circuitry to prevent

false transitions on the bus during power up or live insertion and can

enter a 1nA low current shutdown mode for extreme power savings.

Figure 1. Typical Application

5V 5V

60V POWER BUS

FAULT TOLERANT UP TO 60V

XR33152/56/58

2/19

REV1A

Absolute Maximum Ratings

These are stress ratings only and functional operation of the device at these ratings or any other above those indicated

in the operation sections to the specifications below is not implied. Exposure to absolute maximum rating conditions for

extended periods of time may affect reliability and cause permanent damage to the device.

VCC -0.3V to 7.0V

VLVL ≤ VCC

Input voltage at control and driver input (DE, DI and INV) XR33152/58 -0.3V to (VCC + 0.3V)

Receiver output voltage (RO) XR33152/58 -0.3V to (VCC + 0.3V)

Input voltage at control (RE) XR33156 -0.3V to (VL + 0.3V)

Input voltage at control and driver input (DE, DI, RINV, DINV, and INV)

XR33156 -0.3V to 7.0V

Receiver output voltage (RO) XR33156 -0.3V to (VL + 0.3V)

Driver output voltage (A, B, Y and Z) ±60V

Receiver input voltage (A and B, half or full duplex) ±60V

Transient voltage pulse, through 100Ω (Figure 7) ±100V

Driver output current ±250mA

Storage temperature range -65°C to 150°C

Lead temperature (soldering, 10s) 300°C

Package power dissipation

8-pin NSOIC θJA = 128.4°C/W

14-pin NSOIC θJA = 86°C/W

Maximum junction temperature = 150°C

CAUTION:

ESD-sensitive (electrostatic discharge) device. Permanent damage may occur on unconnected devices subject to high energy electrostatic fields. Unused devices must be

stored in conductive foam or shunts. Personnel should be properly grounded prior to handling this device. The protective foam should be discharged to the destination socket

before devices are removed.

XR33152/56/58

3/19

REV1A

Pin Configuration

Pin Functions

Half Duplex Full Duplex

Pin Name Type Pin Function

XR33152 XR33156

XR33158

Pin Number

- 1 RINV In

Receiver invert control (active high). When enabled, the polarity of the receiver bus

pins (A & B) is reversed: A = inverting and B = non-inverting. When disabled, the

receiver bus pins (A & B) operate normally: A = non-inverting and B = inverting.

The RINV pin has a 150KΩ pull-down resistor.

1 2 RO Out

Receiver output, when RE is low and if (A-B) ≥ 200mV, RO is high. If (A-B) ≤ -200mV,

RO is low If inputs are left floating, shorted together or terminated and undriven for

more than 2μs the output is high.

2 - INV In

Driver and receiver invert control (active high). When enabled, the polarity of the driver

input and receiver input bus pins is inverted. When disabled, the driver input and

receiver inputs operate normally: A = non-inverting and B = inverting. The INV pin has

a 150kΩ pull-down resistor.

- 3 RE In

Receiver output enable (hot swap). When RE is low, RO is enabled. When RE is high,

RO is high impedance. RE should be high and DE should be low to enter

shutdown mode.

3 4 DE In

Driver output enable (hot swap). When DE is high, outputs are enabled. When DE is

low, outputs are high impedance. DE should be low and RE should be high to enter

shutdown mode.

4 5 DI In

Driver input. With DE high, a low level on DI forces non-inverting output low and

inverting output high. Similarly, a high level on DI forces non-inverting output high and

inverting output low.

5 6, 7 GND Power Ground.

6 - A/Y I/O Non-inverting receiver input and non-Inverting driver output.

7 - B/Z I/O Inverting receiver input and Inverting driver output.

RINV 1

RO 2

RE 3

DE 4

DI 5

GND 6

GND 7

VCC

A12

B11

Z10

DINV

RO1

INV 2

DE3

DI4

VCC

B/Z7

A/Y6

GND5

XR33152/56/58

4/19

REV1A

Pin Functions

Half Duplex Full Duplex

Pin Name Type Pin Function

XR33152 XR33156

XR33158

Pin Number

8 14 VCC Power 3.0V to 5.5V power supply input bypass to ground with 0.1μF capacitor.

- 12 A In Non inverting receiver input.

- 11 B In Inverting receiver input.

- 9 Y Out Non-inverting driver output.

- 10 Z Out Inverting driver output.

- 8 DINV In

Driver invert control (active high). When enabled, the polarity of the driver input pin is

inverted causing the driver output (Y & Z) polarities to be inverted. When disabled, the

driver bus pins (Y & Z) operate normally: Y = non-inverting and Z = inverting. The DINV

pin has a 150kΩ pull-down resistor.

- 13 VLPower Logic interface power supply.

XR33152/56/58

5/19

REV1A

Pin Functions

XR33156 (Full Duplex - 14 Pins)

Transmitting

Inputs Outputs

DINV RE DE DI Y Z

0 X 1 1 1 0

0 X 1 0 0 1

1 X 1 1 0 1

1 X 1 0 1 0

X 0 0 X High-Z

X 1 0 X High-Z (shutdown)

XR33152 and XR33158 (Half Duplex - 8 Pins)

Transmitting

Inputs Outputs

INV DE DI A/Y B/Z

0 1 1 1 0

0 1 0 0 1

1 1 1 0 1

1 1 0 1 0

X 0 X High-Z

XR33156 (Full Duplex - 14 Pins)

Receiving

Inputs Output

RINV RE DE VA - VBRO

0 0 X ≥ 200mV 1

0 0 X ≤ -200mV 0

0 0 X Open/shorted 1

1 0 X ≥ 200mV 0

1 0 X ≤ -200mV 1

1 0 X Open/shorted 1

X 1 1 X High-Z

X 1 0 X High-Z (shutdown)

XR33152 and XR33158 (Half Duplex - 8 Pins)

Receiving

Inputs Output

INV DE VA - VBRO

0 0 ≥ 200mV 1

0 0 ≤ -200mV 0

1 0 Open/shorted 1

1 0 ≥ +200mV 0

1 0 ≤ -200mV 1

1 0 Open/shorted 1

XR33152/56/58

6/19

REV1A

Electrical Characteristics

Unless otherwise noted: VCC = 3.0V to 5.5V, TA = TMIN to TMAX. Typical values are at VCC = 5.0V, TA = 25°C.

Symbol Parameter Conditions Min Typ Max Units

Driver DC Characteristics

VCC Supply voltage range 3.0 5.5 V

VLI/O logic supply voltage range VL ≤ VCC 1.65 5.5 V

VOD Differential driver output,

4.5V ≤ VCC ≤ 5.5V

RL = 100Ω (TIA-422), Figure 4 2 VCC V

RL = 54Ω (TIA-485), Figure 4 1.5 VCC V

-25V ≤ VCM ≤ 25V, Figure 5 1.5 VCC V

VOD Differential driver output,

3.0V ≤ VCC ≤ 4.5V

RL = 100Ω (TIA-422), Figure 4 0.85 VCC V

RL = 54Ω (TIA-485), Figure 4 0.65 VCC V

∆VOD

Change in magnitude of

differential output voltage, Note 1

RL = 100Ω (TIA-422) or

RL = 54Ω (TIA-485), Figure 4

±0.2 V

VCM Driver common-mode output

voltage (steady state) 1 3 V

∆VCM

Change in magnitude of common-mode

output voltage, Note 1 ±0.2 V

VIH Logic high input thresholds

(DI, DE and INV)

VCC = 3.3V, for XR33152/58 2.0 V

VCC = 5.0V, for XR33152/58 2.4 V

VIL Logic low input thresholds

(DI, DE and INV) For XR33152/58 0.8 V

VIH Logic high input thresholds

(DI, DE, RE, DINV and RINV)VL ≤ VCC, for XR33156 (2/3)VLV

VIL Logic low input thresholds

(DI, DE, RE, DINV and RINV)VL ≤ VCC, for XR33156 (1/3)VLV

VHYS Input hysteresis

(DI, DE, RE, DINV, RINV and INV) 100 mV

IIN

Logic input current (DI, DE and RE) 0V ≤ VIN ≤ VCC, for XR33152/58

After first transition, Note 2 ±1 μA

Logic input current (INV) VIN = VCC = 5.5V, for XR33152/58 25 33 55 μA

Logic input current (DI, DE and RE) 0V ≤ VIN ≤ VL = VCC = 5.5V, for XR33156

After first transition, Note 2 ±1 μA

Logic input current (DINV and RINV) VIN = VL = VCC = 5.5V, for XR33156 25 33 55 μA

IINHS Logic input current hot swap (DE and RE) Until first transition, Note 2 100 ±200 μA

IA, B Input current (A and B)

VCC = 0V or 5.5V, VOUT = 12V,

DE = 0V, for XR33152 100 μA

VCC = 0V or 5.5V, VOUT = -7V,

DE = 0V, for XR33152 -80 μA

VOUT = 12V, DE = 0V,

VCC = 0V or 5.5V, for XR33156/58 400 μA

VOUT = -7V, DE = 0V,

VCC = 0V or 5.5V, for XR33156/58 -320 μA

NOTES:

1. Change in magnitude of differential output voltage and change in magnitude of common mode output voltage are the changes in output voltage when DI input

changes state.

2. The hot swap feature disables the DE and RE inputs for the first 10μs after power is applied. Following this time period, these inputs are weakly pulled to their disabled

state (low for DE, high for RE) until the first transition, after which they become high impedance inputs.

XR33152/56/58

7/19

REV1A

Electrical Characteristics

Unless otherwise noted: VCC = 3.0V to 5.5V, TA = TMIN to TMAX. Typical values are at VCC = 5.0V, TA = 25°C.

Symbol Parameter Conditions Min Typ Max Units

IOL Output leakage (Y and Z)

Full duplex

VOUT = 12V, DE = 0V, VCC = 0V or 5.5V 100 μA

VOUT = -7V, DE = 0V, VCC = 0V or 5.5V -80 μA

IOSD Driver short-circuit output current -60V ≤ VOUT ≤ 60V, Figure 6 ±250 μA

Driver Thermal Characteristics

TTS Thermal shutdown temperature Junction temperature, Note 1 175 °C

TTSH Thermal shutdown hysteresis Note 1 15 °C

Receiver DC Characteristics

VSTH Receiver differential input signal threshold

voltage (VA - VB)-25V ≤ VOUT ≤ 25V ±85 ±200 mV

∆VSTH

Receiver differential input

signal hysteresis 170 mV

VFSTH- Negative going receiver differential input

failsafe threshold voltage (VA - VB)-25V ≤ VOUT ≤ 25V -200 -125 -40 mV

VFSTH+ Positive going receiver differential input

failsafe threshold voltage (VA - VB)-25V ≤ VOUT ≤ 25V -100 -10 mV

∆VFSTH

Receiver differential input

failsafe hysteresis 25 mV

VOH Receiver output high voltage (RO) IOUT = -4mA, for XR33152/58 VCC - 0.6 V

VOL Receiver output low voltage (RO) IOUT = 4mA, for XR33152/58 0.4 V

VOH Receiver output high voltage (RO)

3.0V ≤ VL ≤ 5.5V, IOUT = -4mA,

1.6V ≤ VL ≤ 3.0V, IOUT = -1mA,

for XR33156

VL - 0.6 V

VOL Receiver output low voltage (RO)

3.0V ≤ VL ≤ 5.5V, IOUT = 4mA,

1.6V ≤ VL ≤ 3.0V, IOUT = 1mA,

for XR33156

0.4 V

IOZR High-Z receiver output current 0V ≤ VOUT ≤ VCC, for XR33152/58

0V ≤ VOUT ≤ VL, for XR33156 ±1 μA

RIN RX input resistance

-25V ≤ VCM ≤ 25V, for XR33152 120 kΩ

-25V ≤ VCM ≤ 25V, for XR33156/58 30 kΩ

IOSC

RX output short-circuit current 0V ≤ VRO ≤ VCC, for XR33152/58 110 mA

RX output short-circuit current 0V ≤ VRO ≤ VL, for XR33156 110 mA

Supply Current

ICC Supply current No load, RE = 0V or VCC,

DE = VCC, DI = 0V or VCC 4 mA

ISHDN Supply current in shutdown mode RE = VCC, DE = 0V 0.001 1 μA

ESD Protection

ESD protection for A, B, Y, and Z Human body model ±15 kV

ESD protection for all other pins Human body model ±4 kV

NOTES:

1. This spec is guaranteed by design and bench characterization.

XR33152/56/58

8/19

REV1A

Electrical Characteristics

Driver AC Characteristics - XR33152 (250kbps)

Unless otherwise noted: VCC = 3.0V to 5.5V, TA = TMIN to TMAX. Typical values are at VCC = 5.0V, TA = 25°C.

Symbol Parameter Conditions Min Typ Max Units

tDPLH Driver prop. delay (low to high)

CL = 50pF, RL = 54Ω,

Figure 8

350 1500 ns

tDPHL Driver prop. delay (high to low) 350 1600 ns

|tDPLH-tDPHL|Differential driver output skew 20 200 ns

tDR, tDF Driver differential output

rise or fall time 400 1500 ns

Maximum data rate 1/tUI, duty cycle 40% to 60% 250 kbps

tDZH Driver enable to output high

CL = 50pF, RL = 500Ω,

Figure 9

200 2500 ns

tDZL Driver enable to output low 200 2500 ns

tDHZ Driver disable from output high 250 ns

tDLZ Driver disable from output low 250 ns

tRZH(SHDN) Driver enable from shutdown to

output high CL = 50pF, RL = 500Ω,

Figure 9

5500 ns

tRZL(SHDN) Driver enable from shutdown to

output low 5500 ns

tSHDN Time to shutdown Notes 1 and 2 50 200 600 ns

Receiver AC Characteristics - XR33152 (250kbps)

Unless otherwise noted: VCC = 3.0V to 5.5V, TA = TMIN to TMAX. Typical values are at VCC = 5.0V, TA = 25°C.

Symbol Parameter Conditions Min Typ Max Units

tRPLH Receiver prop. delay (low to high)

CL = 15pF, VID = ±2V,

VID rise and fall times < 15ns,

Figure 10

200 ns

tRPHL Receiver prop. delay (high to low) 200 ns

|tRPLH-tRPHL|Receiver propagation delay skew 30 ns

Maximum data rate 1/tUI, duty cycle 40% to 60% 250 kbps

NOTES:

1. The transceivers are put into shutdown by bringing RE high and DE low simultaneously for at least 600ns. If the control inputs are in this state for less than 50ns,

the device is guaranteed to not enter shutdown. If the enable inputs are held in this state for at least 600ns, the device is ensured to be in shutdown. Note that the receiver

and driver enable times increase significantly when coming out of shutdown.

2. This spec is guaranteed by design and bench characterization.

XR33152/56/58

9/19

REV1A

Electrical Characteristics

Driver AC Characteristics - XR33156 and XR33158 (20Mbps)

Unless otherwise noted: VCC = 3.0V to 5.5V, TA = TMIN to TMAX. Typical values are at VCC = 5.0V, TA = 25°C.

Symbol Parameter Conditions Min Typ Max Units

tDPLH Driver prop. delay (low to high)

CL = 50pF, RL = 54Ω,

Figure 8

25 ns

tDPHL Driver prop. delay (high to low) 25 ns

|tDPLH-tDPHL|Differential driver output skew 5 ns

tDR, tDF Driver differential output

rise or fall time 15 ns

Maximum data rate 1/tUI, duty cycle 40% to 60% 20 Mbps

tDZH Driver enable to output high

CL = 50pF, RL = 500Ω,

Figure 9

60 ns

tDZL Driver enable to output low 60 ns

tDHZ Driver disable from output high 250 ns

tDLZ Driver disable from output low 250 ns

tDZH(SHDN) Driver enable from shutdown to

output high CL = 50pF, RL = 500Ω,

Figure 9

2200 ns

tDZL(SHDN) Driver enable from shutdown to

output low 2200 ns

tSHDN Time to shutdown Notes 1 and 2 50 200 600 ns

Receiver AC Characteristics - XR33156 and XR33158 (20Mbps)

Unless otherwise noted: VCC = 3.0V to 5.5V, TA = TMIN to TMAX. Typical values are at VCC = 5.0V, TA = 25°C.

Symbol Parameter Conditions Min Typ Max Units

tRPLH Receiver prop. delay (low to high)

CL = 15pF, VID = ±2V,

VID rise and fall times < 15ns,

Figure 10

60 ns

tRPHL Receiver prop. delay (high to low) 60 ns

|tRPLH-tRPHL|Receiver propagation delay skew 5 ns

Maximum data rate 1/tUI, duty cycle 40% to 60% 20 Mbps

tRZH Receiver enable to output high

CL = 15pF, RL = 1kΩ,

Figure 11, for XR33156

50 ns

tRZL Receiver enable to output low 50 ns

tRHZ Receiver disable from output high 50 ns

tRLZ Receiver disable from output low 50 ns

tRZH(SHDN) Receiver enable from shutdown to

output high CL = 15pF, RL = 1kΩ,

Figure 11, for XR33156

2200 ns

tRZL(SHDN) Receiver enable from shutdown to

output low 2200 ns

tSHDN Time to shutdown Notes 1 and 2, for XR33156 50 200 600 ns

NOTES:

1. The transceivers are put into shutdown by bringing RE high and DE low simultaneously for at least 600ns. If the control inputs are in this state for less than 50ns,

the device is guaranteed to not enter shutdown. If the enable inputs are held in this state for at least 600ns, the device is ensured to be in shutdown. Note that the receiver

and driver enable times increase significantly when coming out of shutdown.

2. This spec is guaranteed by design and bench characterization.

XR33152/56/58

10/19

REV1A

Figure 4. Differential Driver Output Voltage

DDI = OV or VCC

DE = VCC

VOD VCM

Figure 5. Differential Driver Output Voltage Over Common Mode

DDI = OV or VCC

DE = VCC

375Ω

60Ω

VOD VCM

Applications Information

Figure 2. Half Duplex (XR33152, and XR33158)

RO1

INV 2

DE3

DI4

VCC

B/Z7

A/Y6

GND5

RRINV 1

RO 2

RE 3

DE 4

DI 5

GND 6

GND 7

VCC

A12

B11

Z10

DINV

Figure 3. Full Duplex (XR33156)

XR33152/56/58

11/19

REV1A

Figure 7. Transient Overvoltage Test Circuit

DEVICE POWERED

ON/OFF

A OR Z

B OR Y

VTEST

15 US DURATION

15 DUTY CYCLE

100

TRANSCEIVER,

GENERATOR,

RECEIVER

Figure 8. Driver Propagation Delay Test Circuit and Timing Diagram

DVOD RLCL

DE = VCC

DI 1.5V 1.5V tSKEW = tDPLH – tDPHL

VOD

(VY - VZ)

10% 90% 10%

90%

tDF

tDR

tDPLH tDPHL

VOD

VOD–

VOD+

Figure 6. Driver Output Short Circuit Current

DDI = OV or VCC

DE = OV or VCC

Y -60V to 60V

IOSD

Applications Information

XR33152/56/58

12/19

REV1A

Applications Information

Figure 9. Driver Enable and Disable Timing Test Circuits and Timing Diagrams

D VOUT

RLCL

TESTING Z: DI = OV

TESTING Y: DI = VCC Y

D VOUT

VCC

TESTING Z: DI = VCC

TESTING Y: DI = OV Y

VOUT

DE 1.5V 1.5V

tDZH

VOH + VOL VOH – 0.25V

tDHZ

VOH

VOL

VOUT

DE 1.5V 1.5V

tDZL

VOH + VOL VOL + 0.25V

tDLZ

VOH

VOL

XR33152/56/58

13/19

REV1A

Applications Information

Figure 10. Receiver Propagation Delay Test Circuit and Timing Diagram

R RO

RE = OV

tRPLH

tRPHL

VOH

–1V

+1V

VOL

VCC/2 VCC/2

VID

XR33152/56/58

14/19

REV1A

Applications Information

Figure 11. Receiver Enable and Disable Test Circuits and Timing Diagrams

R RO

RLCL

VCC

R RO

1.5V 1.5V

tRZH

VOH VOH – 0.25V

VA = VCC

VB = OV

tRHZ

VOH

1.5V 1.5V

tRZL

VCC + VOL VOL + 0.25V

tRLZ

VCC

VOL

VA = OV

VB = VCC

XR33152/56/58

15/19

REV1A

Applications Information

The XR33152/56/58 TIA-485/TIA-422 devices are part

of Exar’s high performance serial interface product line.

The analog bus pins can survive direct shorts up to ±60V

and are protected against ESD events up to ±15kV.

Enhanced Failsafe

Ordinary TIA-485 differential receivers will be in an

indeterminate state whenever the data bus is not being

actively driven. The enhanced failsafe feature of the

XR33152/56/58 family guarantees a logic-high receiver

output when the receiver inputs are open, shorted or when

they are connected to a terminated transmission line with

all drivers disabled. In a terminated bus with all transmitters

disabled, the receivers’ differential input voltage is pulled to

0V by the termination. The XR33152/56/58 family interprets

0V differential as a logic high with a minimum 50mV noise

margin while maintaining compliance with the TIA-485

standard of ±200mV. Although the XR33152/56/58 family

does not need failsafe biasing resistors, it can operate

without issue if biasing is used.

Receiver Input Filtering

The XR33152 receivers incorporate internal filtering in

addition to input hysteresis. This filtering enhances noise

immunity by ignoring signals that do not meet a minimum

pulse width of 30ns. Receiver propagation delay increases

slightly due to this filtering. The high speed XR33156 and

XR33158 devices do not have this input filtering.

Hot Swap Capability

When VCC is first applied the XR33152/56/58 family

holds the driver enable and receiver enable inactive for

approximately 10μs. During power ramp-up, other system

ICs may drive unpredictable values or tristated lines may

be influenced by stray capacitance. The hot swap feature

prevents the XR33152/56/58 family from driving any output

signal until power has stabilized. After the initial 10μs, the

driver and receiver enable pins are weakly pulled to their

disabled states (low for DE and high for RE) until the first

transition. After the first transition, the DE and RE pins

operate as high impedance inputs.

If circuit boards are inserted into an energized backplane

(commonly called “live insertion” or “hot swap”) power

may suddenly be applied to all circuits. Without the hot

swap capability, this situation could improperly enable the

transceiver’s driver or receiver, driving invalid data onto

shared buses and possibly causing driver contention or

device damage.

Driver Output Protection

Two mechanisms prevent excessive output current and

power dissipation caused by faults or by bus contention.

First, a driver current limit on the output stage provides

immediate protection against short circuits over the whole

common-mode voltage range. Second, a thermal shutdown

circuit forces the driver outputs into a high impedance state

if junction temperature becomes excessive.

Line Length

The TIA-485/TIA-422 standard covers line lengths up to

4000ft. Maximum achievable line length is a function of

signal attenuation and noise. Termination prevents signal

reflections by eliminating the impedance mismatches on

a transmission line. Line termination is generally used if

rise and fall times are shorter than the round trip signal

propagation time. Higher output drivers may allow longer

cables to be used.

±15kV ESD Protection

ESD protection structures are incorporated on all pins

to protect against electrostatic discharges encountered

during handling and assembly. The driver outputs and

receiver inputs of the XR33152/56/58 family has extra

protection against static electricity. Exar uses state-of-the-

art structures to protect these pins against ESD of ±15kV

without damage. The ESD structures withstand high ESD in

all states: normal operation, shutdown and powered down.

After an ESD event, the XR33152/56/58 keep operating

without latch up or damage.

ESD protection can be tested in various ways. The transmitter

outputs and receiver inputs of the XR33152/56/58 are

characterized for protection to the following limits:

 ±15kV using the Human Body Model, TIA-485

bus pins

 ±4kV using the Human Body Model, all other pins

ESD Test Conditions

ESD performance depends on a variety of conditions.

Contact Exar for a reliability report that documents test

setup, methodology and results.

Maximum Number of Transceivers on the Bus

The standard TIA-485 receiver input impedance is 12kΩ (1

unit load). A standard driver can drive up to 32 unit loads.

The XR33152 transceiver has a 1/10th unit load receiver

input impedance of 120kΩ, allowing up to 320 transceivers

to be connected in parallel on a communication line. The

XR33156/58 transceivers have a 1/2.5 unit load receiver

input impedance of 30kΩ, allowing up to 80 transceivers

to be connected in parallel on a communication line. Any

combination of these devices and other TIA-485 transceivers

up to a total of 32 unit loads may be connected to the line.

XR33152/56/58

16/19

REV1A

Product Selector Guide

Part Number Operation Data Rate Shutdown Receiver/Driver

Enable

Nodes

On Bus Footprint

XR33152 Half duplex 250kbps No No/Yes 320 8-NSOIC

XR33156 Full duplex

20Mbps

Yes Yes/Yes 80 14-NSOIC

XR33158 Half duplex No No/Yes 80 8-NSOIC

Applications Information

Low Power Shutdown Mode

The XR33156 has a low-power shutdown mode that is

initiated by bringing both RE high and DE low simultaneously.

While in shutdown the XR33156 draws less than 1μA of

supply current. DE and RE may be tied together and driven

by a single control signal. Devices are guaranteed not to

enter shutdown if RE is high and DE is low for less than

50ns. If the inputs are in this state for at least 600ns, the

parts will enter shutdown.

XR33156 enable times, tZH and tZL, apply when the part is

not in low power shutdown state. Enable times, tZH(SHDN)

and tZL(SHDN) apply when the part is shutdown. The driver

and receiver take longer to become enabled from low

power shutdown tZH(SHDN) and tZL(SHDN) than from driver

or receiver disable mode (tZH and tZL).

XR33152/56/58

17/19

REV1A

Package Description

8-Pin NSOIC Package

8-Pin NSOIC (JEDEC MS-012)

Symbols

Dimension in mm

(Control unit)

Dimension in inches

(Reference unit)

Min Nom Max Min Nom Max

A 1.35 - 1.75 0.053 - 0.069

A1 0.10 - 0.25 0.004 - 0.010

A2 1.25 - 1.65 0.049 - 0.065

b 0.31 - 0.51 0.012 - 0.020

c 0.17 - 0.25 0.007 - 0.010

E 6.00 BSC 0.236 BSC

E1 3.90 BSC 0.154 BSC

e 1.27 BSC 0.050 BSC

h 0.25 - 0.50 0.010 - 0.020

L 0.40 - 1.27 0.016 - 0.050

L1 1.04 Ref 0.041 Ref

L2 0.25 BSC 0.010 BSC

R 0.07 - - 0.003 - -

R1 0.07 - - 0.003 - -

θ0° - 8° 0° - 8°

θ15° - 15° 5° - 15°

θ20° - - 0° - -

D 4.90 BSC 0.193 BSC

N 8 8

INDEX AREA

(D/2 x E1/2)

TOP VIEW

RECOMMENDED PCB LAND PATTERN

FRONT VIEW

4.93 mm

0.53 mm

1.27 mm

1.98 mm

SIDE VIEW

(L1)

GAUGE PLANE

SEATING PLANE

h x 45°

INDEX AREA

(D/2 x E1/2)

TOP VIEW

RECOMMENDED PCB LAND PATTERN

FRONT VIEW

4.93 mm

0.53 mm

1.27 mm

1.98 mm

SIDE VIEW

(L1)

GAUGE PLANE

SEATING PLANE

h x 45°

XR33152/56/58

18/19

REV1A

Package Description

14-Pin NSOIC Package

14-Pin NSOIC (JEDEC MS-012)

Symbols

Dimension in mm

(Control unit)

Dimension in inches

(Reference unit)

Min Nom Max Min Nom Max

A 1.35 - 1.75 0.053 - 0.069

A1 0.10 - 0.25 0.004 - 0.010

A2 1.25 - 1.65 0.049 - 0.065

b 0.31 - 0.51 0.012 - 0.020

c 0.17 - 0.25 0.007 - 0.010

E 6.00 BSC 0.236 BSC

E1 3.90 BSC 0.154 BSC

e 1.27 BSC 0.050 BSC

h 0.25 - 0.50 0.010 - 0.020

L 0.40 - 1.27 0.016 - 0.050

L1 1.04 Ref 0.041 Ref

L2 0.25 BSC 0.010 BSC

R 0.07 - - 0.003 - -

R1 0.07 - - 0.003 - -

θ0° - 8° 0° - 8°

θ15° - 15° 5° - 15°

θ20° - - 0° - -

D 8.65 BSC 0.341 BSC

N 14 14

INDEX AREA

(D/2 x E1/2)

TOP VIEW

FRONT VIEW

21 3

SIDE VIEW

(L1)

GAUGE PLANE

SEATING PLANE

h x 45°

INDEX AREA

(D/2 x E1/2)

TOP VIEW

FRONT VIEW

21 3

SIDE VIEW

(L1)

GAUGE PLANE

SEATING PLANE

h x 45°

XR33152/56/58

48760 Kato Road

Fremont, CA 94538

USA

Exar Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. Exar Corporation conveys

no license under any patent or other right and makes no representation that the circuits are free of patent infringement. While the information in this publication has been

carefully checked, no responsibility, however, is assumed for inaccuracies.

Exar Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected

to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Exar Corporation

receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of

Exar Corporation is adequately protected under the circumstances.

Reproduction, in part or whole, without the prior written consent of Exar Corporation is prohibited. Exar, XR and the XR logo are registered trademarks of Exar Corporation.

All other trademarks are the property of their respective owners.

XR33152/56/58_DS_121015

Tel.: +1 (510) 668-7000

Fax: +1 (510) 668-7001

Email: support@exar.com

www.exar.com

19/19

REV1A

Order Information

Part Number Operation Data Rate Package Environmental

Rating

Operating

Temperature Range

XR33152ID-F

Half duplex 250kbps 8-pin SOIC

Green/RoHS -40°C to 85°C

XR33152IDTR-F

XR33156ID-F

Full duplex

20Mbps

14-pin SOIC

XR33156IDTR-F

XR33158ID-F

Half duplex 8-pin SOIC

XR33158IDTR-F