LP211, LP311
LOW-POWER DIFFERENTIAL COMPARATORS
WITH STROBES
SLCS003D − JUNE 1987 − REVISED SEPTEMBER 2003
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
DLow Power Drain . . . 900 μW Typical With
5-V Supply
DOperates From ±15 V or From a Single
Supply as Low as 3 V
DOutput Drive Capability of 25 mA
DEmitter Output Can Swing Below Negative
Supply
DResponse Time . . . 1.2 μs Typ
DLow Input Currents:
Offset Current ...2 nA Typ
Bias Current . . . 15 nA Typ
DWide Common-Mode Input Range:
−14.5 V to 13.5 V Using ±15-V Supply
DOffset Balancing and Strobe Capability
DSame Pinout as LM211, LM311
DDesigned To Be Interchangeable With
Industry-Standard LP311
description/ordering information
The LP211 and LP311 devices are low-power versions of the industry-standard LM211 and LM311 devices.
They take advantage of stable, high-value, ion-implanted resistors to perform the same function as the LM311
series, with a 30:1 reduction in power consumption, but only a 6:1 slowdown in response time. They are well
suited for battery-powered applications and all other applications where fast response times are not needed.
They operate over a wide range of supply voltages, from ±18 V down to a single 3-V supply with less than 300-μA
current drain, but are still capable of driving a 25-mA load. The LP211 and LP311 are quite easy to apply free
of oscillation if ordinary precautions are taken to minimize stray coupling from the output to either input or to the
trim pins. In addition, offset balancing is available to minimize input offset voltage. Strobe capability also is
provided to turn off the output (regardless of the inputs) by pulling the strobe pin low.
The LP211 is characterized for operation from −25°C to 85°C. The LP311 is characterized for operation from
0°C to 70°C.
ORDERING INFORMATION
TA
VIO max
AT 25°CPACKAGEORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP (P) Tube of 50 LP311P LP311P
0°Cto70°C
75mV
SOIC (D)
Tube of 75 LP311D
LP311
−0°C to 70°C7.5 mV SOIC (D) Reel of 2500 LP311DR LP311
SOP (PS) Reel of 2000 LP311PSR L311
25°Cto85°C
75mV
SOIC (D)
Tube of 75 LP211D
LP211
−25°C to 85°C7.5 mV SOIC (D) Reel of 2500 LP211DR LP211
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Copyright © 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
2
3
4
8
7
6
5
EMIT OUT
IN+
IN−
VCC−
VCC+
COL OUT
BAL/STRB
BALANCE
LP211 ...D PACKAGE
LP311 . . . D, P, OR PS PACKAGE
(TOP VIEW)
LP211, LP311
LOW-POWER DIFFERENTIAL COMPARATORS
WITH STROBES
SLCS003D − JUNE 1987 − REVISED SEPTEMBER 2003
2POST OFFICE BOX 655303 DALLAS, TEXAS 75265
functional block diagram
EMIT OUT
COL OUT
IN+
IN−
BAL/STRB
BALANCE
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage (see Note 1): VCC+ 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VCC− −18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage, VID (see Note 2) ±30 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI (either input, see Notes 1 and 3) ±15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage from emitter output to VCC− 30 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage from collector output to VCC− 40 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage from collector output to emitter output 40 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Duration of output short circuit (see Note 4) 40 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Notes 5 and 6): D package 97°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . .
P package 85°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . .
PS package 95°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature, TJ 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated in the recommended operating conditions section of this
specification is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, unless otherwise noted, are with respect to the midpoint between VCC+ and VCC−.
2. Differential input voltages are at IN+ with respect to IN−.
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage of ±15 V, whichever is less.
4. The output may be shorted to ground or to either power supply.
5. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
6. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
MIN MAX UNIT
(|VCC±| 15 V) Input voltage VCC− + 0.5 VCC+ − 1.5 V
VCC+ − VCC− Supply voltage 3.5 30 V
LP211, LP311
LOW-POWER DIFFERENTIAL COMPARATORS
WITH STROBES
SLCS003D − JUNE 1987 − REVISED SEPTEMBER 2003
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VCC± = ±15 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TAMIN TYPMAX UNIT
V
Input offset voltage
RS 100 kΩ
See Note 7
25°C 2 7.5
mV
VID Input offset voltage RS < 100 kΩ, See Note 7 Full range 10 mV
VID < −10 mV, I
O
L = 25 mA,
25°C
VID
<
10
mV
,
See Note 8
IOL
=
25
mA
,25°C0.4 1.5
VOL Low-level output voltage VCC = 4.5 V,
V<10mV
VCC− = 0,
I16mA
Full range
V
VID < −10 mV,
See Note 8
IOL = 1.6 mA, Full range 0.1 0.4
I
Input offset current
See Note 7
25°C 2 25
nA
IIO Input offset current See Note 7 Full range 35 nA
I
Input bias current
25°C 15 100
nA
IIB Input bias current Full range 150 nA
Low level strobe current
V
(st
r
obe)
= 0.3 V, VID < −10 mV,
25°C
A
Low-level strobe current
V(strobe)
=
0
.
3
V
,
See Note 9
VID
<
10
mV
,25°C100 300 μA
IO(off) Output off-state current VID > 10 mV, VCE = 35 V 25°C 0.2 100 nA
A
Lar
g
e-si
g
nal differential-volta
g
e
R5kΩ
25°C
V/mV
AVD
Large signal
differential voltage
amplification RL = 5 kΩ25°C 40 100 V/mV
ICC+ Supply current from VCC+ VID = −50 mV, RL = Full range 150 300 μA
ICC− Supply current from VCC− VID = 50 mV, RL = Full range − 80 − 180 μA
All typical values are at VCC± = ±15 V, TA = 25°C.
NOTES: 7. The offset voltages and offset currents given are the maximum values required to drive the output within 1 V of either supply with
a 1-mA load. Thus, these parameters define an error band and take into account the worst-case effects of voltage gain and input
impedance.
8. Voltages are with respect to EMIT OUT and VCC− tied together.
9. The strobe should not be shorted to ground; it should be current driven at 100 μA to 300 μA.
switching characteristics, VCC± = ±5 V, TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS TYP UNIT
Response time See Note 10 1.2 μs
NOTE 10: The response time is specified for a 100-mV input step with 5-mV overdrive.
LP211, LP311
LOW-POWER DIFFERENTIAL COMPARATORS
WITH STROBES
SLCS003D − JUNE 1987 − REVISED SEPTEMBER 2003
4POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL APPLICATION CIRCUIT
NOTE: If offset balancing is not used,
the BALANCE and BAL/STRB
pins should be shorted together.
Figure 1. Offset Balancing
3 kΩ
3 kΩ
VCC+
BALANCE BAL/
STRB
Figure 2. Strobing
15 kΩ
BAL/STRB
TTL
Strobe 2N2222
NOTE: Do not connect strobe pin
directly to ground, because the
output is turned off whenever
current is pulled from the strobe
pin.
PACKAGE OPTION ADDENDUM
www.ti.com 7-Jun-2010
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
LP211D ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor
or Sales Office
LP211DE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor
or Sales Office
LP211DG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor
or Sales Office
LP211DR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples
LP211DRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples
LP211DRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples
LP211P OBSOLETE PDIP P 8 TBD Call TI Call TI Samples Not Available
LP311D ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples
LP311DE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples
LP311DG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Purchase Samples
LP311DR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor
or Sales Office
LP311DRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor
or Sales Office
LP311DRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Contact TI Distributor
or Sales Office
LP311P ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type Contact TI Distributor
or Sales Office
LP311PE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type Contact TI Distributor
or Sales Office
LP311PWLE OBSOLETE TSSOP PW 8 TBD Call TI Call TI Samples Not Available
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
PACKAGE OPTION ADDENDUM
www.ti.com 7-Jun-2010
Addendum-Page 2
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LP211DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
LP311DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 29-Jul-2009
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LP211DR SOIC D 8 2500 340.5 338.1 20.6
LP311DR SOIC D 8 2500 340.5 338.1 20.6
PACKAGE MATERIALS INFORMATION
www.ti.com 29-Jul-2009
Pack Materials-Page 2
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