HIGH VOLTAGE MONOLITHIC IC ECN30204 Brushless DC (BLDC) Single-Chip Motor Drive IC The ECN30204 is a fully integrated, single-chip BLDC motor driver that facilitates a rapid design process and low part count solution. The chip integrates BLDC Logic with a 3-Phase Inverter containing six (6) 500V rated IGBTs and a Charge Pump TOP Arm bias. To reduce motor current losses, a BLDC motor can now be driven directly from rectified 220VAC (up to 450VDC) power lines, or from any DC power bus down to 20VDC. On-Chip Brushless (electronic) commutation logic is fully integrated with analog OSC/PWM functions that permit an analog (VSP) voltage to control motor speed. Description * Integrated, Single-Chip Direct BLDC Motor Driver IC * Integrated 3-Phase BLDC motors operating from a 450VDC (down to 20VDC) voltage bus * Integrated Charge Pump - Constant TOP Arm bias independent of motor speed * Integrated 3-Phase Brushless (Electronic) commutation via external Hall ICs * Integrated 3-Phase 6-IGBT Motor Bridge with on-chip free-wheeling diodes * Pinout and Board Layout are compatible with the existing Hitachi ECN3022 * Breakdown, Max rated 500VDC/1.5A * Latch-Up free monolithic IC built with a high voltage Dielectrically Isolated (DI) process * Available in 3 package types with built-in heat sink (Tab) Functions and Features * Simple Variable Speed Control via a single (VSP) analog input * PWM Speed Control without requiring a MicroController * PWM duty cycle generator provides a 0% to 100% speed control range * Tachometer - Generates a (RPM/60)x(P/2) x 3 Hertz speed signal (FG) * BOTTOM Arms switch at up to 20kHz via an on-chip OSC/PWM * On-Chip 7.5VDC regulator (CB) with a guaranteed external Min load (25mA) * Over-Current protection is set by an external Sense Resistor (RS) * Under-Voltage protection for TOP and BOTTOM IGBT Arms * An all output IGBT Shut-OFF function * Low stand-by power 1 ECN30204 Block Diagram RU D1 D2 VS RV VCC(15V) + C1 - C2 RW + - C0 CB HU HV HW C+ CL C- VS1 VS2 VB VCC VB supply Clock Charge Pump FG FG Op Amp MicroController or or Micro OpController Amp DM VSP Hall ICs Top Arm Driver Motor Rotating Direction MV 3-Phase Distributor PWM Comparator + CMP Analog output MU All off + CMP SAW wave Generator MW Bottom arm off LVSD Bottom Arm Driver BLDC Motor Motor Over Current Sense Clock + Vref CR VTR GL RTR CTR RS GH1 GH2 RS Note : Inside of bold line shows ECN30204 Figure 1 Block Diagram NOTE: A Speed Reverse Function for Single Chip BLDC Motor Drive ICs (such as this ECN30204) is discussed in Motor Control Tech Tips, Volume 1, Issue 9 (Oct `02). "Implementing Single Chip Safe Direction Reversal and TACH Pulse" (see our web pages). Part Names and Packaging ECN30204SP (Package Type:SP-23TA) 2 ECN30204SPV (Package Type:SP-23TB) ECN30204SPR (Package Type:SP-23TR) ECN30204 1. Maximum Allowable Ratings NO. Items 1 Output Device Breakdown Voltage 2 Analog Supply voltage 3 Input voltage 4 5 6 7 8 Output current Pulse DC VB supply current Junction Operating Temperature Storage temperature Symbol VSM VCC VIN IP IDC IBMAX Tjop Terminals Ratings VS1, VS2 250 500 MU, MV, MW VCC 18 VSP, RS -0.5 to VB+0.5 HU, HV, HW 1.5 MU, MV, MW 1.2 0.7 CB 50 -20 to +135 Ta = 25 oC Unit Condition V V V A Note 1 mA o C Note 2 o Tstg - -40 to +150 C General Note: To determine appropriate deratings for these absolute maximum ratings, see pages 13 and 14 (the Appendix) paragraphs 1.1, 1.2, 1.3 and 1.4. Please refer to the "Precautions for Use" on our website. Note 1: Output IGBTs can handle this peak motor current at up to 25 oC junction operating temperature (see Appendix Figure 8). Motor current transients (during Start & Speed-Up) may require a Soft Start circuit to limit these initial currents. See: Motor Control Tech Tips, Volume 1, Issue 1 (Feb'02), "Motor Soft-Start" on our website. Note 2: Thermal resistance 1) Between junction and IC case (Tab): Rj-c = 4 oC/W 2) Between junction and air: Rj-a = 40 oC/W The ECN30204 should never be used outside the SOA shown, where the current and voltage are at the MU, MV and MW pins (motor coils) when the phase is changed (turned-OFF). Output pin current (A) 1.1 Safe Operating Area (SOA) and Derating VCC = 15V Tj = 25 oC 1.5 1.0 1.0 1.0 SOA SOA region 0 0 400 450 Output pin voltage (V) 3 ECN30204 2. Electrical characteristics Suffix (T: Top arm, B: Bottom arm) NO . 1 Items Supply Voltage 2 3 Standby Current 4 5 IGBT FVD 6 7 Output Delay Time Turn ON Symbols Ta = 25C Terminals VSop VS1, VS2 VCCop VCC MIN TYP MAX Unit 20 325 450 V 13.5 15 16.5 V Conditions ISH VS1, VS2 - 0.5 1.5 mA VSP=0V, VS=325V ICC VCC - 10 20 mA VSP=0V, VCC=15V, IB=0A VONT MU, MV, MW - 2.2 I=0.35A, VCC=15V MU, MV, MW - 2.2 3.0 3.0 V VONB V I=0.35A, VCC=15V TdONT MU, MV, MW 0.5 1.0 2.5 s VS=325V, VCC=15V TdONB MU, MV, MW 1.0 2.0 3.0 s I=0.35A TdOFFT MU, MV, MW 1.0 2.0 3.0 s Resistive Load 10 TdOFFB MU, MV, MW 1.0 2.0 3.0 s 11 Free wheel VFDT MU, MV, MW - 2.2 2.8 V 12 Diode FVD VFDB MU, MV, MW - 2.4 3.0 V VTR - 200 400 VCC=15V 4.9 5.4 6.1 V 8 9 Turn OFF 13 Output Resistance RVTR 14 SAW 15 Wave H or Low Level VSAWH 16 Amplitude VSAWL 17 Reference voltage 18 19 Hall 20 Signal Inputs Voltage 21 22 Vref RS VIH VIL Current CR VSAWW HU, HV, HW 1.7 2.1 2.5 V VCC=15V Note 1 2.8 3.3 3.8 V VCC=15V Note 2 0.45 0.5 0.55 V VCC=15V 3.5 - - V VCC=15V - - 1.5 V -100 - - A HU, HV, HW=0V VCC=15V -30 - - A HU, HV, HW=5V VCC=15V 5 - 100 A VSP=5V, VCC=15V Note 4 Pull Down Resistor SPCOMOF -40 10 60 mV VCC=15V Refer to CR terminal IIL IIH Current I=0.35A IVSPH VSP Pull up resistor Note 3 23 VSP Input Offset Voltage 24 All OFF operation Voff 0.85 1.23 1.6 V VCC=15V 25 Voltage VB 6.8 7.5 8.2 V VCC=15V, IB=0A 25 - 25 - mA 50mA Max Allowable Rating - - -100 mV VCC = 15V, IB = 25mA Supply 26 VB Output 26a Current IB Regulation VB 27 FG, DM Output Pins Voltage 28 and Resistance ROL 29 30 LVSD Detect voltage LVSDON Recover Voltage LVSDOFF 31 Hysteresis Vrh 32 RS terminal Input current CB VOL IILRS - 1.0 - V IOL = - 5mA - 200 400 IFG = - 10mA VCC, 10.0 11.5 12.9 V MU, MV, MW 10.1 12.0 13.0 V 0.1 - 0.9 V -100 - - A FG, DM RS Note 5 Note 6 VCC=15V, VSP=0V, RS=0V Note 7 Note 1. See Standard Applications in Section 4, page 8 to set the SAW wave frequency. Note 2. The amplitude of SAW (i.e., VSAWW) is determined by the following equation: VSAWW = VSAWH - VSAWL Note 3. Internal Pull Up resistors are typically 200 k. The equivalent circuit is shown in Fig. 2. Note 4. Internal Pull Down resistors are typically 200 k. The equivalent circuit is shown in Fig. 3. Note 5. The equivalent circuit is shown in Fig. 4. Note 6. The LVSD (Low Voltage Shut Down) function Detects and Shuts-Down at lower VCC. Note 7. Internal Pull Up resistor is typically 200 k. The equivalent circuit is shown in Fig. 5. 4 ECN30204 VB typ 200k HU HV HW typ 15 0 Figure Equivalentcircuit circuit around Figure 2 2 Equivalent around HU,HU, HV,HV, HWHW VB Comparator typ 150 VSP typ 200k From CR terminal Figure 3 Equivalent VSP Figure 3 Equivalentcircuit circuitaround around VSP VB FG FG, DM Figure 4 Equivalent circuit around FG, DM typ. 220k Figure 5 Equivalent circuit around RS 5 ECN30204 3. IGBT Motor Bridge Commutation and Logic Functions 3.1 Truth table stage (1) (2) (3) (4) (5) (6) - Hall signal Input HU HV HW H H H L L L L H L L H H H L L H H L L L H H L H U V Top arm Bottom arm Top arm Bottom arm Top arm OFF OFF OFF ON ON OFF OFF OFF ON ON OFF OFF OFF OFF OFF OFF ON OFF OFF OFF OFF ON OFF OFF OFF OFF ON ON OFF OFF OFF OFF OFF ON ON OFF OFF OFF OFF OFF W Bottom arm OFF OFF OFF OFF ON ON OFF OFF 3.2 Timing chart Stage HU Hall signal HV Input HW MU Output voltage MV Output voltage MW Output voltage FG Output voltage 6 (6) (1) (2) (3) (4) (5) (6) (1) (2) (3) (4) FG Output H L H L H L L H ECN30204 3.3 PWM operation The PWM signal is generated by comparing the input voltage at the VSP pin with an internal SAW wave voltage (available at the CR pin). The Duty Cycle of the resulting PWM signal is thus directly, linearly controlled by VSP pin voltage: from the Min of VSAWL to the Max of VSAWH. That is, when VSP is below VSAWL, the PWM duty cycle is at the Minimum value of 0%. When VSP is above VSAWH, the PWM duty is at the Maximum value of 100%. ECN30204 operates in 2 quadrants by chopping the BOTTOM Arms with this PWM duty cycle during the appropriate commutation times (phases). Thus, the duty cycle controls motor torque and speed. 3.4 Motor Over-Current limiting operation Over-Current is monitored via the voltage drop across an external resistance RS. If the input voltage at the RS pin exceeds the internal Reference voltage (Vref is typically 0.5V), all BOTTOM Arms are Turned-OFF. Following an Over Current event, reset is automatically attempted during each period of the on-chip OSC. This on-chip OSC signal is available at the VTR pin. If the Over-Current function is not used, the RS pin must be connected to the GL pin with less than 100. 3.5 Rotating Direction Output Signal DM The Rotation Direction of the motor is output as a Logic Signal on the DM pin. The table below shows the DM output signal polarity for the two (2) possible rotation directions: The DM output pin signal polarity Rotation Direction UVW UWV DM output Low High 3.6 VCC Under-Voltage Detection If VCC drops below LVSDON (11.5V typ), all IGBTs (TOP and BOTTOM Arms) Turn-OFF. Normal operation returns when VCC rises above LVSDOFF: the value of LVSDOFF is LVSDON + Vrh. 3.7 The all output IGBT Shut-OFF function When the VSP pin drops below Voff (1.23V typ), all IGBTs (TOP and BOTTOM Arms) Shut-OFF VSP input voltage TOP Arm outputs BOTTOM Arm outputs 0V VSP < Voff Voff VSP < VSAWL VSP VSAWL All IGBTs are OFF Following the 3.1 Truth Table Following the 3.1 Truth Table All IGBTs are OFF All IGBTs are OFF Following the 3.1 Truth Table While the motor is rotating, if the VSP pin drops below Voff, the motor stops. Under this condition, the VS voltage could rise but, in all cases, VS must not exceed the 500VDC Breakdown Voltage. 7 ECN30204 4. Standard application 4.1 External components Components Standard value 0.22F C0 0.22 _F 20% 20% C1, C2 D1, D2 RS CTR RTR Usage Filters the internal power supply (VB) The Charge Pump The Charge Pump 1.0F 1.0 _F20% 20% HitachiDFG1C6 DFG1C4(Glass (Glass Hitachi mold DFM1F6 mold type), type), DFM1F4 (Resin type) (Resin mold mold type) or or equivalent equivalent Note 1 Sets Over-Current limit 1800 pF 5% Sets PWM frequency 22 k 5% Sets PWM frequency Remarks Stress voltage is VB (=8.2V) Stress voltage is VCC 600 1A 400V, trr 100ns Stress voltage is VB (=8.2V) Note 2 Stress voltage is VB (=8.2V) Note 2 Note 1: Peak Start-Up current (IO) is fixed by the Over-Current limit detection/protection function. This requires the user to provide a sense resistor (RS) scaled to detect the desired Peak Start-Up current. The value of RS can be calculated by substituting the maximum Vref value (0.55V) and the Peak current desired. Recognize that the resultant value of RS is the minimum value of the required resistor, which is the worst case value. RS = Vref / IO Where: IO is in Amps, Vref = 0.55V and RS is the low tolerance value of the required resistor. Since this triggers Over-Current protection, IO represents the Peak (MAX) desired current in a given design. To determine the Sense Resistor RS, refer to the above comments and Appendix paragraphs 1.2 and 1.3. Note 2: The PWM frequency is approximated by the following equation: PWM Frequency (in Hertz) 0.494 / ( CTR x RTR ) Note: CTR is in Farads, RTR is in Ohms. Note 3: A standard value for the Hall resistors RU, RV, RW is 5.6 k 5% 8 ECN30204 RU D1 D2 VS RV VCC(15V) + C1 - C2 RW + - C0 CB HU HV HW C+ CL C- VS1 VS2 VB VCC VB supply Clock Charge Pump FG FG Op Amp MicroController or or Micro OpController Amp DM VSP Hall ICs Top Arm Driver Motor Rotating Direction PWM Comparator + CMP Analog output MU MV 3-Phase Distributor All off + CMP SAW wave Generator MW Bottom arm off LVSD Bottom Arm Driver BLDC Motor Motor Over Current Sense Clock + Vref CR VTR GL RS RTR CTR GH1 GH2 RS Note : Inside of bold line shows ECN30204 Figure 6. Block Diagram NOTE: A Speed Reverse Function for Single Chip BLDC Motor Drive ICs (such as this ECN30204) is discussed in Motor Control Tech Tips, Volume 1, Issue 9 (Oct `02). "Implementing Single Chip Safe Direction Reversal and TACH Pulse" (see our web pages). 4.2 Input Pins In some applications, input pins may be noise sensitive due to their high impedance. This can be minimized with the use of external resistance and/or capacitance as follows: - A pull down resistor of 5.6 k 5% from the VSP pin to ground (the GL pin). - A 500 pF 20% ceramic capacitor from HU, HV, HW and VSP pins to ground (the GL pin). 9 ECN30204 23 22 5. Pinout 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 6. Pin Definitions Pin No. Symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 VS2 MW NC GH2 VCC GL C+ CCL CB CR VTR VSP FG DM HW HV HU RS GH1 MU VS1 MV (Marking side) MV VS1 MU GH1 RS HU HV HW N.C. DM FG VSP VSP VTR CR CB CL CC+ GL VCC GH2 N.C. MW VS2 *N.C. ; No Connection Fig.3 Pin Connection Definition V and Power Supply for Upper IGBT of phases U and W V W phase output (to BLDC motor coil W) No Connection W phase emitter of IGBT and anode of FWD. Connect RS Analog/Logic power supply Analog/Logic ground For the Charge Pump circuit, power supply for TOP Arm drive circuit For the Charge Pump circuit For the Charge Pump circuit Internally regulated (VB) power supply output Connect resistance & capacitance to generate the PWM clock frequency Connect resistance to generate the PWM clock frequency Input analog voltage that varies the PWM duty cycle from 0% to 100% Tachometer output signal whose frequency is (RPM/60) x(P/2)x3 Hertz DM (Motor rotation Direction) logic output signal Input signal from the Hall IC of phase W Input signal from the Hall IC of phase V Input signal from the Hall IC of phase U RS voltage detect input for the on-chip Over Current limit detection U and V phase emitters of IGBT and anode of FWD. Connect RS. U phase output (to BLDC motor coil U) Power Supply for Upper IGBT of phase U V phase output (to BLDC motor coil V) Remarks Note1, Note2 Note1 Note4 Note3 Note1 Note1, Note2 Note1 Note 5 Note 5 Note 6 Note 7 Note3 Note1 Note1, Note2 Note1 Note 1: This is a High Voltage pin. Note 2: The VS1, VS2 and C- pins are connected within the IC but, VS1 and VS2 must both be connected to the VS Supply Voltage by external wiring. Note 3: GH1 and GH2 are not connected within the IC and must be connected by external wiring. Note 4: Not connected. Note 5: See paragraph 4. Note 6: Can also Turn-OFF all IGBTs. See paragraph 3.7. Note 7: See paragraph 3.5. 10 ECN30204 7. Quality Assurance 7.1 Appearance and dimension ANSI Z1.4-1993 General inspection levels II AQL 1.0% 7.2 Electrical characteristics ANSI Z1.4-1993 General inspection levels II AQL 0.65% 8. Do's and Don'ts 8.1 The tab should be attached to a heat sink by applying a torque of 0.39 to 0.78 N-m. 8.2 The tab should not be soldered. 8.3 To protect this chip from Electrical Static Discharge (ESD), the ECN 30204 should be handled in accordance with normal industry standard procedures for protection against damage due to ESD. For a more detailed discussion of this area, please refer to the web, "Precautions for Use" Section 5. 8.4 Depending on local industry/market regulations, conformal coating may be required for the following pin-to-pin spacings: 1-2, 2-4, 6-7, 8-9, 9-10, 20-21, 21-22, 22-23. 8.5 Protective function against short circuit (ex. load short, line-to-ground short or TOP/BOTTOM Arm shorts) is not built into this IC. External protection may be needed to prevent IC breakdown under these potential application conditions. 8.6 Hitachi high voltage ICs are manufactured to meet standard industrial grade reliability specifications. In cases where extremely high reliability is required (such as nuclear power control, aerospace and aviation, traffic equipment, life-support-related medical equipment, fuel control equipment and various kinds of safety equipment) system integrity must be achieved via fail-safe system design. Additionally, it is the responsibility of the designer to insure that any IC failure does not damage property or human life. Users should evaluate and consider employing the following design precautions: a) Sufficient derating of the specifications should be utilized to minimize the possibility of failures based on the maximum ratings, operating temperature and environmental conditions. b) Design redundancy should be applied so that application performance will be maintained even in a case of IC failure. c) The system design should implement fail-safe design techniques to protect property and human life even where incorrect system operation is experienced. 11 ECN30204 9. Precautions for Safe Use If semiconductor devices are handled in an inappropriate manner, failure may result. For this reason, be sure to read "Precautions for Use" on our website before use. ! CAUTION (1). Regardless of changes in external conditions during use, "absolute maximum ratings" should never be exceeded in designing electronic circuits that employ semiconductors. Furthermore, in the case of pulse use, "safe operating area (SOA)" precautions should be observed. (2). Semiconductor devices may experience failures due to accident or unexpected surge voltages. Accordingly, adopt safe design features and practices, such as redundancy or prevention of erroneous action, to avoid extensive damage in the event of failure. (3). In cases where extremely high reliability is required (such as use in nuclear power control, aerospace and aviation, traffic equipment, life-support related medical equipment, fuel control equipment and various kinds of safety equipment), safety should be ensured by using semiconductor devices that feature assured safety or by means of user's fail-safe precautions or other arrangement. Or consult Hitachi's sales department staff. (If a semiconductor device fails, there may be cases in which the semiconductor device, wiring or wiring pattern will emit smoke or cause a fire or in which the semiconductor device will burst.) 10. Notices 1. This publication contains the specifications, characteristics (in figures and tables), dimensions and handling notes concerning power semiconductor products (hereinafter called "products" to aid in the selection of suitable products. 2. The specifications and dimensions, etc. stated in this publication are subject to change without prior notice to improve product's characteristics. Before ordering, purchasers are advised to contact Hitachi's sales department for the latest version of this publication and specifications. 3. In no event shall Hitachi be liable for any damage that may result from an accident or any other cause during operation of the user's units according to this publication. Hitachi asumes no responsibility for any intellectual property claims or any other problems that may result from applications of information, products or circuits described in this publication. 4. In no event shall Hitachi be liable for any failure in a semiconductor device or any secondary damage resulting from use at a value exceeding the absolute maximum rating. 5. No license is granted by this publication under any patents or other rights of any third party, or Hitachi, Ltd. 6. This publication may not be reproduced or duplicated, in any form, in whole or in part, without the expressed written permission of Hitachi, Ltd. 7. The products (technologies) described in this publication are not to be provided to any party whose purpose in their application will hinder maintenance of international peace and safety nor are they to be applied to that purpose by their direct purchasers or any third party. When exporting these products (technologies), the necessary procedures are to be taken in accordance with related laws and regulations. 12 ECN30204 Appendix - Supplementary and Reference Data Refer to the derating information below when designing with the ECN30204. This information is provided for reference purposes only. Output pin current (A) 1. Safe Operating Area (SOA) and Derating 1.1 SOA The ECN30204 should never be used outside the SOA shown below in Figure 7, where the current and voltage are at the MU, MV and MW pins (motor coils) when the phase is changed (turned-OFF). VCC = 15V Tj = 25 oC 1.5 1.0 1.0 1.0 SOA SOA region 0 0 400 450 Output pin voltage (V) Figure 7. SOA Over-Current Limit Value (A) 1.2 Derating output current based on Junction Operating temperature SOA has a dependence on Junction Operating temperature (Tjop). Determine the RS value (see paragraph 4, Note 1) according to the derating curve of Figure 8, include the MAX value of Vref and the LOW side tolerance of RS. For general reliability reasons, Junction Operating Temperature must not exceed 115 oC. Junction Operating Temperature Tjop (C) Figure 8. Derating Curve 13 ECN30204 Over-Current Limit Value (A) 1.3 Power supply power-on sequence and derating for VCC Power supply sequence of power-on should be VCC on first, then VS on, then VSP on. For power-off, it should be VSP off first, then VS off, then VCC off. If the value on the VSP pin is less than Voff, the power-on supply sequencing is not required. In the event power sequencing can not be assured, such as during a sudden power supply failure, the following will occur: When IGBTs are forced to operate with lower gate voltages, the possibility of thermal failure arises because the IGBT saturation voltage rapidly increases. This is especially true if the VCC voltage is in the range between LVSDON Min and VCCop Min, that is in the range of 10.0V to 13.5V. To avoid this occurrence, apply the VCC derating curve shown below in Figure 9. Figure 9. Current Derating with respect to VCC pin 1.4 General Design Derating Standards a) Temperature - Junction Operating Temperature must be kept under 115oC. b) Supply Voltage - VS power supply voltage must be kept under 450V. 2. Package Dimensions 1) ECN30204SP 14 ECN30204 2) ECN30204SPV 3) ECN30204SPR 31MAX (30) 28 r0.3 20 r0.2 3.5 r0.3 I3.6 0.6 r0.1 r0.24 1.27 r0.5 2.54 r0.5 2.54 10q 0q 0q 0.25 typ 1.8 typ 7.1r0.5 4.9r0.5 23.97r0.3 10q 0q 0q 23 r0.25 12.3r0.5 2.2r0.3 (9) (7.7) 1 1.23 1.26 3.6 r0.2 4.1 r0.3 11.2 r0.3 14.7MAX 0.5 r0.2 r0.2 r0.5 15