General Description
The MAX3643 burst-mode laser driver provides bias and
modulation current drive for PON burst-mode ONT appli-
cations. It is specifically designed for use with a low-cost
external controller for the APC (and if desired, AMC) loop.
A high-speed differential burst-enable input enables the
driver to switch the laser from a dark (output off) condition
to full on-condition in less than 2ns. When BEN is inac-
tive, typical modulation and bias currents are 5µA each.
Laser modulation current can be set from 10mA to
85mA and bias current can be set from 1mA to 70mA
using the MODSET and BIASSET inputs. A sample-and-
hold circuit is provided to capture the monitor diode
output during short PON bursts, if needed, and the BEN
high-speed signal is mirrored on an LVCMOS output to
be used by the controller operating the APC/AMC loop.
The MAX3643 burst-mode laser driver is packaged in a
4mm x 4mm, 24-pin thin QFN package. It operates from
-40°C to +85°C.
Applications
A/B/G/XGPON ONT Modules Up to 2.5Gbps
1.25Gbps IEEE EPON ONT Modules
Features
♦10mA to 85mA Modulation Current
♦1mA to 70mA Bias Current
♦Monitor Diode Sample and Hold
♦45ps Output Transition Time
♦2ns Turn-On/-Off Time
♦Reference Voltage Generator
♦LVPECL High-Speed Inputs (Data, Burst Enable)
155Mbps to 2.5Gbps Burst-Mode Laser Driver
MAX3643
For pricing, delivery, and ordering information, please contact Maxim Direct at
1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
EVALUATION KIT AVAILABLE
Ordering Information
OUT-
BMD
MON1
VCC
FILTER+3.3V
3.3V
10nH
75Ω1kΩ
BENOUT
BIASSET
MODSET
VBSET
+3.3V
3.3V
VMSET
3kΩ
IMAX
1kΩ
BCMON
1kΩ
IN-
IN+
SERIAL
DATA
SOURCE
EN
GND
VREF
BEN
BIAS
MOD
130Ω130Ω
15Ω
82Ω82Ω
Z0 = 50Ω
Z0 = 50Ω
3.3V
BEN-
BEN+
BURST
CONTROL
130Ω130Ω
82Ω82Ω
Z0 = 50Ω
Z0 = 50Ω
MAX3643
PON TRIPLEXER AND SFP
CONTROLLER
DS1875
15Ω
OUT+
5.6Ω
BIAS+
5.6Ω
BIAS-
10Ω
MDOUT
MDIN
27pF
10pF
Typical Application Circuit
19-3848; Rev 4; 12/12
+
Denotes a lead(Pb)-free/RoHS-compliant package.
*
EP = Exposed paddle.
Pin Configuration appears at end of data sheet.
PART TEMP RANGE PIN-PACKAGE
MAX3643ETG -40°C to +85°C 24 TQFN-EP*
MAX3643ETG+ -40°C to +85°C 24 TQFN-EP*
155Mbps to 2.5Gbps Burst-Mode Laser Driver
2 Maxim Integrated
MAX3643
ABSOLUTE MAXIMUM RATINGS
OPERATING CONDITIONS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage VCC ..............................................-0.5V to +4.0V
Current into BIAS-, BIAS+, OUT-, OUT+ .......-20mA to +150mA
Voltage at VMSET, VBSET, IN+, IN-, BEN+, BEN-, EN, MDIN,
MDOUT, BENOUT, BCMON ...................-0.5V to (VCC + 0.5V)
Voltage at MODSET, BIASSET, VREF, IMAX ........-0.5V to +3.0V
Voltage at OUT-, OUT+, BIAS-, BIAS+ .....+0.3V to (VCC + 0.5V)
Continuous Power Dissipation (TA= +85°C)
24-Pin TQFN, Multilayer Board
(derate 27.8mW/°C above +85°C)............................1807mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range ............................-55°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow)
Lead(Pb)-free..............................................................+260°C
Containing lead(Pb) ....................................................+240°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Supply Turn-On Time 10% to 90% 0.001 1000 ms
Ambient Temperature -40 +85 °C
Data Rate 2500 Mbps
Voltage at VMSET, VBSET 0 1.4 V
Voltage at BCMON 0 1.4 V
Voltage at MDIN 0 2.56 V
ELECTRICAL CHARACTERISTICS
(VCC = 3.0V to 3.6V, TA = -40°C to +85°C. Typical values are at VCC = 3.3V, TA= +25°C, IBIAS = 20mA, IMOD = 30mA, unless other-
wise noted.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Supply Current ICC Excluding laser bias and mode currents,
max at IMOD = 85mA, IBIAS = 70mA 32 51 mA
I/O SPECIFICATIONS
LVPECL Differential Input VIN V
IN = (VIN+) - (VIN-) 200 1600 mVP-P
LVPECL Common-Mode Input
Voltage VCM VCC -
1.49
VCC -
1.32
VCC -
VIN / 4 V
LVCMOS Output High Voltage IOH = -100μA VCC -
0.2 V
LVCMOS Output Low Voltage IOL = 100μA 0.2 V
BENOUT Propagation Dela y TdCL = 20pF, from BEN zero crossing to 67%
CMOS level 30 ns
LVCMOS Input Pullup 75 k
LVCMOS Input Current VIN = 0V or VIN = VCC 50 μA
LVCMOS Input High Voltage 2.0 VCC V
LVCMOS Input Low Voltage 0.2 0.8 V
BIAS GENERATOR SPECIFICATIONS
Bias Current Range IBIAS VBIAS+, VBIAS- 0.6V 1 70 mA
Bias Current, Burst Off IBIAS, OFF BEN = low or EN = high 5 50 μA
1mA IBIAS < 2mA, VBSET = VREF 88
2mA IBIAS < 10mA, VBSET = VREF 70 88 110
BIASSET Current Gain GBIAS
10mA IBIAS < 70mA, VBSET = VREF 82.5 88 94.5
mA/mA
155Mbps to 2.5Gbps Burst-Mode Laser Driver
Maxim Integrated 3
MAX3643
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 3.0V to 3.6V, TA = -40°C to +85°C. Typical values are at VCC = 3.3V, TA= +25°C, IBIAS = 20mA, IMOD = 30mA, unless other-
wise noted.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
BIASSET Current Gain Stability 5mA IBIAS 70mA (Note 13) -4.4 +4.4 %
BIASSET Current Gain Linearity 5mA IBIAS 70mA (Note 14) -3.75 +3.75 %
Bias Current Overshoot VCC turn-on/-off < 1s 10 %
Bias Current Monitor Gain GBSM 2mA IBIAS 70mA, VBSET = VREF 11 14 17 mA/A
1mA IBIAS < 5mA ±4
Bias Current Monitor Gain
Stability 5mA IBIAS 70mA -5 +5
%
BIASSET Resistor RBIAS 40 50 60
MODULATOR SPECIFICATIONS
Modulation Current Range IMOD 10 85 mA
Modulation Current Off IMOD, OFF BEN = low or EN = high or VIN = low 5 120 μA
10mA IMOD < 60mA 0.6
Instantaneous Voltage at OUT+ 60mA IMOD 85mA 0.75 V
MODSET Current Gain GMOD 10mA < IMOD < 85mA, VMSET = VREF 82.5 88 94.5 mA/mA
MODSET Current Gain Stability (Note 13) -4.4 +4.4 %
MODSET Current Gain Linearity (Note 14) -2.2 +2.2 %
IBIASSET = 0.15mA, IMODSET = 0.7mA 0.5
IMODSET = IBIASSET = 0.15mA 1.7
IMODSET = IBIASSET = 0.4mA 1
MODSET, BIASSET Gain
Matching (Note 15)
IMODSET = IBIASSET = 0.55mA 1
%
Modulation Current Rise Time tR 20% to 80% 45 85 ps
Modulation Current Fall Time tF 20% to 80% 45 85 ps
Deterministic Jitter (Note 3) 17 45 psP-P
Random Jitter (Note 4) 0.8 1.4 psRMS
MODSET Resistor RMOD 40 50 60
MODSET, BIASSET OPERATIONAL AMPLIFIER SPECIFICATIONS
MODSET, BIASSET Voltage
Range 0.005 1.4 V
Voltage Error (Note 5) ±5 mV
Input Leakage VMSET and VBSET pins 0.1 1.5 μA
TURN-OFF/-ON SPECIFICATIONS
Burst-Enable Time (Notes 2, 6, 7) 2.3 ns
Burst-Disable Time (Notes 2, 6, 8) 2.0 ns
SAMPLE/HOLD SPECIFICATIONS
MDIN Voltage Range 0.05 2.56 V
MDOUT Settling Relative to final value at 3μs, CL < 20pF ±1 mV
Sample/Hold Droop After 100μs (Note 9) ±2.56 mV
VCC turn-on/-off < 1s, IBIAS 20mA 10 %
Bias Current Overshoot IBIAS <20mA 2 mA
155Mbps to 2.5Gbps Burst-Mode Laser Driver
4 Maxim Integrated
MAX3643
Note 1: Electrical specifications are production tested at TA= +25°C. Specifications over the entire operating temperature range
are guaranteed by design and characterization. Typical specifications are at TA= +25°C, 3.3V.
Note 2: For 10mA ≤IMOD ≤85mA and 4mA ≤IBIAS ≤70mA.
Note 3: Deterministic jitter measured with a continuous pattern of 27-1 PRBS, 80 ones, 27-1 PRBS, 80 zeros at 1.25Gbps, and both
LVPECL inputs terminated by the network shown in Figure 3.
Note 4: Random jitter, rise time, fall time measured with 0000011111 pattern at 1.25Gbps.
Note 5: Voltage difference between VMSET and MODSET or VBSET and BIASSET excluding IR drops. The maximum operating
voltage at VMSET or VBSET must be less than 1.4V for proper operation.
Note 6: Turn-on/-off time is when the BEN+/BEN- LVPECL inputs are used to control modulation and bias currents.
Note 7: Burst-enable delay is measured between the time at which the rising edge of the differential burst-enable input reaches the
midpoint, and the time at which the combined output currents (bias plus modulation) reach 90% of their final level.
Note 8: Burst-disable delay is measured between the time at which the falling edge of the differential burst-enable input reaches the
midpoint, and the time at which the combined output currents (bias plus modulation) fall below 10% of the bias-on current.
Note 9: Droop measured with sample/hold output load of 10MΩ.
Note 10: Enable delay is measured between the time at which the falling edge of the EN input reaches ≤0.8V, and the time at which
the combined output currents (bias plus modulation) reach 90% of their final level.
Note 11: Disable delay is measured between the time at which the rising edge of the EN input reaches ≥2V, and the time at which
the combined output currents (bias plus modulation) fall below 10% of the bias-on current.
Note 12: Excelight SLT2886-LR laser.
Note 13: Current gain stability = [(Gain – nominal Gain) / nominal Gain], nominal Gain at VCC = 3.3V, TA= +25°C.
Note 14: Gain linearity = (Gainmax – Gainmin), Gainavg = Gainmax + Gainmin
Gainavg 2
Note 15: Gain matching = , nominal at VCC = 3.3V, TA= +25°C.
mod / mod /
mod /
Gain Gainbias Gain nom Gainbiasnom
Gain nom Gainbiasnom
−
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 3.0V to 3.6V, TA = -40°C to +85°C. Typical values are at VCC = 3.3V, TA= +25°C, IBIAS = 20mA, IMOD = 30mA, unless other-
wise noted.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Sampling Error Final value measured after 10μs
(MDOUT - MDIN), burst width > 576ns 3 ±14 mV
BANDGAP VOLTAGE REFERENCE SPECIFICATIONS
VREF Output RL > 10k, CL < 50pF 1.175 1.235 1.295 V
MODULATION/BIAS CURRENT DISABLE
Enable Time 5mA < IBIAS, 10mA < IMOD (Note 10) 5.5 μs
Disable Time (Notes 2, 11) 375 ns
RIMAX Range 3 15 k
RIMAX = 3k155
RIMAX = 5k100 150
Current Limit (Tested with IBIAS
= IMOD)IBIAS+IMOD
RIMAX = 10k50 75
mA
OPTICAL EVALUATION
155.52Mbps 49
622.08Mbps 45
1.24416Gbps 38
Eye Margin (Note 12)
2.48832Gbps 18
%
155Mbps to 2.5Gbps Burst-Mode Laser Driver
OPTICAL EYE DIAGRAM
(155.52Mbps, 117MHz FILTER,
PATTERN = 223 - 1 PRBS)
MAX3643 toc01
EXCELIGHT SLT2886-LR LASER
AVERAGE OPTICAL POWER = -6dBm
EXTINCTION RATIO = 15dB
MASK MARGIN = 49%
OPTICAL EYE DIAGRAM
(622.08Mbps, 467MHz FILTER,
PATTERN = 223 - 1 PRBS)
MAX3643 toc02
EXCELIGHT SLT2886-LR LASER
AVERAGE OPTICAL POWER = -6dBm
EXTINCTION RATIO = 15dB
MASK MARGIN = 45%
OPTICAL EYE DIAGRAM
(1.24416Gbps, 933MHz FILTER,
PATTERN = 223 - 1 PRBS)
MAX3643 toc03
EXCELIGHT SLT2886-LR LASER
AVERAGE OPTICAL POWER = -6dBm
EXTINCTION RATIO = 14dB
MASK MARGIN = 38%
OPTICAL EYE DIAGRAM
(2.48832Gbps, 2.3GHz FILTER,
PATTERN = 223 - 1 PRBS)
MAX3643 toc04
EXCELIGHT SLT2886-LR LASER
AVERAGE OPTICAL POWER = -6dBm
EXTINCTION RATIO = 10dB
MASK MARGIN = 18%
ELECTRICAL EYE DIAGRAM
(2.5Gbps, IMOD = 30mA,
PATTERN = PRBS 27 - 1 + 80 CID)
MAX3643 toc05
100ps/div
Maxim Integrated 5
MAX3643
Typical Operating Characteristics
(Typical values are at VCC = 3.3V, TA= +25°C, data pattern = 27-1 PRBS + 80 ones + 27-1 PRBS + 80 zeros, unless otherwise
noted.)
SUPPLY CURRENT vs. TEMPERATURE
(IBIAS = 20mA, IMOD = 30mA)
MAX3643 toc06
TEMPERATURE (°C)
ICC (mA)
80
60
20 400
-20
15
20
25
30
35
40
45
50
55
60
10
-40
EXCLUDES BIAS AND
MODULATION CURRENT
155Mbps to 2.5Gbps Burst-Mode Laser Driver
DETERMINISTIC JITTER
vs. MODULATION AMPLITUDE
MAX3643 toc07
IMOD (mA)
DJ (psP-P)
807050 60
30 4020
3
6
9
12
15
18
21
24
27
30
0
10
RANDOM JITTER
vs. MODULATION AMPLITUDE
MAX3643 toc08
IMOD (mA)
RANDOM JITTER (psRMS)
80
70
50 60
30 40
20
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
0.2
10
IMOD vs. IMODSET
MAX3643 toc09
IMODSET (μA)
IMOD (mA)
800600400200
10
20
30
40
50
60
70
80
90
0
0 1000
IBIAS vs. IBIASSET
MAX3643 toc10
IBIASSET (μA)
IBIAS (mA)
800600400200
10
20
30
40
50
60
70
80
90
0
0 1000
BIAS CURRENT MONITOR GAIN
(IBCMON/IBIAS) vs. TEMPERATURE
MAX3643 toc11
TEMPERATURE (°C)
GAIN (mA/A)
8060
40200
-20
13
14
15
16
17
12
-40
IMOD vs. VMSET
(RMODSET = 1kΩ)
MAX3643 toc12
VMSET (V)
IMOD (mAP-P)
0.80.40.2 0.6 1.0
10
20
30
40
50
60
70
80
90
0
0 1.2
6 Maxim Integrated
MAX3643
Typical Operating Characteristics (continued)
(Typical values are at VCC = 3.3V, TA= +25°C, data pattern = 27-1 PRBS + 80 ones + 27-1 PRBS + 80 zeros, unless otherwise
noted.)
155Mbps to 2.5Gbps Burst-Mode Laser Driver
Maxim Integrated 7
MAX3643
Typical Operating Characteristics (continued)
(Typical values are at VCC = 3.3V, TA= +25°C, data pattern = 27-1 PRBS + 80 ones + 27-1 PRBS + 80 zeros, unless otherwise
noted.)
IBIAS vs. VBSET
(RBIASSET = 1kΩ)
MAX3643 toc13
VBSET (V)
IBIAS (mA)
0.6 0.80.2 0.4
10
20
30
40
50
60
70
80
90
0
0 1.0
TIMING DIAGRAM, BURST-ON
(933MHz FILTER ON OUT+)
MAX3643 toc15
500ps/div
VOUT+
VBIAS+
VBEN+
IBIAS + IMOD CURRENT
THRESHOLD vs. RIMAX
MAX3643 toc14
RIMAX (kΩ)
CURRENT THRESHOLD (mA)
25205 10 15
20
40
60
80
100
120
140
160
0
030
TIMING DIAGRAM, BURST-OFF
(933MHz FILTER ON OUT+)
MAX3643 toc16
500ps/div
VOUT+
VBIAS+
VBEN+
SAMPLE/HOLD
(10MΩ LOAD, 2.8μs SAMPLE
AND 100μs HOLD, MDIN = 1.56V)
MAX3643 toc17
20μs/div
MDOUT
1.56V
1.22V
BEN+
155Mbps to 2.5Gbps Burst-Mode Laser Driver
8 Maxim Integrated
MAX3643
Pin Description
PIN NAME FUNCTION
1 VCCA Analog Supply Voltage
2 IN+ Noninverted Data Input, LVPECL Compatible
3 IN- Inverted Data Input, LVPECL Compatible
4 VCCS Signal Supply Voltage
5 BEN+ Noninverted Burst-Enable Input, LVPECL Compatible
6 BEN- Inverted Burst-Enable Input, LVPECL Compatible
7 BENOUT Burst-Enable Output, LVCMOS. Signal replicates BEN input.
8EN Enable Input LVCMOS. Active low enables BIAS± and OUT± outputs.
9 BCMON
Bias Current Monitor. Current out of this pin develops a ground-referenced voltage across an
external resistor proportional to the bias current.
10 IMAX Current-Limit Reference. Connect a resistor from IMAX to GND to set maximum IBIAS plus IMOD.
11 MDOUT Monitor Diode Out. Analog Output for sample/hold.
12 MDIN Monitor Diode In. Analog Input for sample/hold.
13 BIAS- Connect BIAS- to VCC Through a 10 Resistor and Switching Diode
14 BIAS+ Laser Bias Current Output. Modulation current flows into this pin when BEN input is high.
15, 18 VCCO Output Supply Voltage
16 OUT+
Laser Modulation Current Output. Modulation current flows into this pin when both BEN and IN
inputs are high.
17 OUT- Connect OUT- to Laser Diode Anode Through a 15 Resistor and Switching Diode
19 GND Supply Ground. This pin must be connected to ground.
20 MODSET Modulation Current Set. Current from this pin to ground sets the laser modulation current.
21 VMSET MODSET Reference. A ground-referenced voltage at this point establishes the MODSET reference.
22 VREF Reference Voltage Output. May be used for VMSET, VBSET.
23 VBSET BIASSET Reference. A ground-referenced voltage at this point establishes the BIASSET reference.
24 BIASSET Bias Current Set. Current from this pin to ground sets the laser bias current.
— EP
Exposed Paddle (Ground). The exposed pad must be soldered to the circuit board ground for proper
thermal and electrical operation.
155Mbps to 2.5Gbps Burst-Mode Laser Driver
Maxim Integrated 9
MAX3643
OUT+
OUT-
RD
10Ω
15Ω
VCC
RP
LP
BIAS+
RCOMP
CCOMP
BIAS-
BENOUT
CMOS
CMOS
LIMIT
MDIN
BIASSET
MODSET VBSET
VCC
VCC VCC
IM = 88 x I1
I1
VCC
VMSET BCMON
VREF
RD
LVPECL
LVPECL
LIMIT
EN
IMAX
BEN-
IN-
BEN+
IN+
IB = 88 x I2
I2
IBCMON = IB x 0.014
MDOUT
MAX3643
RMOD RBIAS
1.2V
Figure 1. Functional Diagram
155Mbps to 2.5Gbps Burst-Mode Laser Driver
10 Maxim Integrated
MAX3643
Detailed Description
The MAX3643 laser driver includes a bias current gen-
erator, bias current monitor, modulation current genera-
tor, laser drive outputs, and monitor diode sample and
hold. LVPECL-compatible inputs are provided for both
high-speed data and burst enable. The high-speed
burst-enable input signal is replicated on an LVCMOS
output for use by the controller.
Laser Diode Modulation and
Bias Current Generators
Laser diode modulation current amplitude is controlled
by the current out of the MODSET pin, and bias current
by the current out of the BIASSET pin, according to:
IMOD = IMODSET x 88
IBIAS = IBIASSET x 88
A voltage source and two op amps are provided to
enable IMODSET and IBIASSET to be set using either a
resistor to ground or a current digital-to-analog convert-
er (DAC). The high-impedance op amp reference input
can be externally controlled, so that the modulation and
bias currents can also be set using voltage DACs.
Laser Diode Modulation and
Bias Current Limiter
Typical laser diodes have an absolute maximum rating
of 150mA. To reduce the possibility of laser damage,
the modulation current and bias current are shut off if
the sum IMOD + IBIAS attempts to exceed the limit set
by RIMAX; see the
Typical Operating Characteristics
.
Bias Current Monitor
The laser diode bias current can be monitored by measur-
ing the voltage across an external load resistor connected
from BCMON to ground. For example, a 1kΩresistor from
BCMON to ground gives the following relationship:
The voltage at BCMON must be below 1.4V for proper
operation.
Output Drivers
The modulation current ranges from 10mA to 85mA, as
set by the current through MODSET. The laser modula-
tion current output OUT+ is optimized to drive a 15Ω
load, and must be DC-coupled. A series damping resis-
tor, RD, provides impedance matching to the laser
diode. The combined value of the series damping resis-
tor and the laser diode equivalent series resistance
should be close to 15Ω. An RC shunt compensation
network, RCOMP/CCOMP, connected between the laser
diode cathode and ground should also be provided to
reduce optical output aberrations and duty-cycle dis-
tortion caused by laser diode parasitic inductance. The
values of RCOMP and CCOMP can be adjusted to match
the laser diode and PCB layout characteristics for opti-
mal optical eye performance (refer to Application
Note 274:
HFAN-02.0: Interfacing Maxim Laser Drivers
with Laser Diodes
). The OUT- pin is connected through
a 15Ωresistor and switching diode to the laser diode
anode. The switching diode at OUT- improves the opti-
cal output eye and burst-enable delay by better match-
ing the laser diode characteristics.
For data rates greater than 1Gbps, a parallel RL peak-
ing network, RP/LP, connected between the laser diode
anode and VCC is recommended. This network creates
a differential drive for the laser diode to improve rise/fall
times and reduce jitter. The values of RPand LPare
also adjusted to match the laser diode and PCB layout
characteristics for optimal optical eye performance.
The bias current ranges from 1mA to 70mA, as set by
the current through BIASSET. Current in the BIAS out-
put switches at high speed when bursting; therefore,
the BIAS+ pin should be connected directly through a
resistor, equal to RDas determined above, to the laser
cathode. The BIAS- pin is connected through a 10Ω
resistor and switching diode to VCC.
When the BEN input is high, the laser driver sinks bias
and modulation current according to the settings at
MODSET and BIASSET. When the BEN input is low, the
BIAS+ and OUT+ currents both shut off within 2ns.
Note that when BEN is low, the bias current is shunted
through the BIAS- output and the modulation current
through the OUT- output.
Monitor Diode Sample and Hold
Laser monitor diode current is only generated when
there is an optical output (BEN is active). When BEN is
inactive, the monitor current is zero, reflecting the fact
that the laser is off. A sample-and-hold circuit, trig-
gered by the state of the BEN input, is provided in the
MAX3643. During the burst-enable active period, the
voltage present at MDIN is stored on an internal sam-
ple-and-hold capacitor; and during the burst-enable
inactive period, that voltage is output on MDOUT; see
the timing diagram in Figure 2.
While the internal sample-and-hold is sampling (BEN
active), MDOUT voltage takes a 1.2V reference level.
VIGk
BCMON BIAS BSM
=× ×1Ω
155Mbps to 2.5Gbps Burst-Mode Laser Driver
Maxim Integrated 11
MAX3643
< 2.56mV
BURST-ENABLE (BEN±) IN
≤ 125μs FOR BPON/GPON
INTERNAL MDIN VOLTAGE SAMPLER
BENOUT OUTPUT
100μs
3μs
1.2V
MDOUT
Figure 2. Sample-and-Hold Timing Diagram
Enable Input
An LVCMOS input, EN, is provided to disable both bias
and modulation currents under external control. The
maximum time to disable laser current with the EN con-
trol is 375ns.
Setting the Current Limit
A current limiter is provided to protect the laser diode
by shutting down both bias and modulation currents
when total current exceeds a value set by the resistor
connected from IMAX to ground. Do not use less than
3kΩRIMAX. See the IBIAS + IMOD Current Threshold vs.
RIMAX graph in the
Typical Operating Characteristics.
Programming the MODSET and
BIASSET Inputs
To program the laser modulation current using a cur-
rent DAC, connect VMSET to VREF, attach the DAC to
the MODSET pin and set the current according to:
IMOD = IMODSET x 88
To program the laser modulation current using a resis-
tor or digital potentiometer, connect VMSET to VREF,
attach a resistor from the MODSET pin to ground, and
set the current according to:
To program the laser modulation current using a PWM
voltage DAC (requiring a high-impedance load), attach
a DAC output to the VMSET pin, connect a resistor from
the MODSET pin to ground as shown in the
Typical
Applications Circuit
, and set the current according to:
IV
RR
MOD DAC
MODSET MOD
=+×88
IV
RR
MOD MODSET MOD
=+×
12 88
.
155Mbps to 2.5Gbps Burst-Mode Laser Driver
12 Maxim Integrated
MAX3643
This approach can also be used for a conventional volt-
age DAC output, if desired. In all cases, the voltage at
MODSET must be kept ≤1.4V, which limits the range of
acceptable values for RMODSET depending on the maxi-
mum modulation current.
Laser diode bias current is set in the same manner as
modulation current.
LVPECL Data/Burst-Enable Inputs
The MAX3643 data and BEN inputs are biased with an
on-chip, high-impedance network. When DC-coupled,
the MAX3643 operates properly with signals that meet
the EC table input-swing and common-mode require-
ments, including LVPECL and most CML.
See Figure 3 for a termination network that can be used
to connect the data and BEN inputs to LVPECL data out-
puts. Other termination networks may also be used, as
long as both the input swing and common limits are met.
Sample-and-Hold Operation
When the MAX3643 internal sample-and-hold is not
required, the MDIN pin should be connected to ground
and the MDOUT pin unconnected. If the internal sample-
and-hold is required, then it is necessary to ensure that
the time constant resulting from the monitor diode load
resistance and the total load capacitance is compatible
with the desired minimum burst interval. It is also neces-
sary to make certain that the load at MDOUT does not
exceed the capability of the MDOUT pin.
Because the voltage at MDIN is not reflected to MDOUT
until after the end of the laser burst, systems using the
internal sample-and-hold alone cannot support continu-
ous mode operation, often a required feature for module
calibration. In this case, the voltage at MDIN can also
be connected directly to a controller mux input. As long
as the total capacitance (including monitor diode intrin-
sic capacitance, MDIN capacitance, mux off-capaci-
tance, and wiring parasitics) is less than 50pF, and the
monitor diode load resistor is less than 2kΩ, then the
sample-and-hold captures a 576ns minimum burst. The
MAX3643 typical MDIN capacitance is 5pF, typical
monitor diode maximum capacitance is 25pF, and the
typical capacitance of a mux input in the off-state is
3pF to 5pF. When the mux is in the on-state, the capac-
itance at the input is typically 10pF to 20pF.
If the minimum burst duration is longer than 576ns, it
may be useful to connect an external capacitor in par-
allel with the monitor diode load to limit the effects of
the data pattern on the monitor diode output.
MAX3643
130Ω
VCC
LVPECL
ZO = 50Ω
ZO = 50Ω
130Ω
IN+/BEN+
IN-/BEN-
82Ω82Ω
Figure 3. LVPECL High-Speed Inputs
Figure 4. Single-Ended Biasing for Burst Enable
IN+
IN-
BEN+
BEN-
VCMBEN + (100mV to 800mV)
VCMBEN - (100mV to 800mV)
VCMBEN
VCMBEN = +2.0V
3.3V
R1 = 1.65kΩ
R2 = 2.54kΩ
MAX3643
155Mbps to 2.5Gbps Burst-Mode Laser Driver
Maxim Integrated 13
MAX3643
Applications Information
Running Burst-Enable Single-Ended
See Figure 5 for setting up the single-ended LVTTL or
LVCMOS biasing for burst enable.
Layout Considerations
To minimize inductance, keep the connections
between the MAX3643 output pins and laser diode as
close as possible. Place a bypass capacitor as close
as possible to each VCC connection. Take extra care
to minimize stray parasitic capacitance on the BIAS
and MDIN pins. Use good high-frequency layout tech-
niques and multilayer boards with uninterrupted
ground planes to minimize EMI and crosstalk.
Laser Safety and IEC 825
Using the MAX3643 laser driver alone does not ensure
that a transmitter design is compliant with IEC 825. The
entire transmitter circuit and component selections must
be considered. Each user must determine the level of
fault tolerance required by the application, recognizing
that Maxim products are neither designed nor authorized
for use as components in systems intended for surgical
implant into the body, for applications intended to sup-
port or sustain life, or for any other application in which
the failure of a Maxim product could create a situation
where personal injury or death can occur.
Exposed-Paddle Package
The exposed paddle on the 24-pin TQFN provides a
very low thermal resistance path for heat removal from
the IC. The pad is also electrical ground on the
MAX3643 and must be soldered to the circuit board
ground for proper thermal and electrical performance.
Refer to Maxim Application Note 862:
HFAN-08.1:
Thermal Considerations of QFN and Other Exposed-
Paddle Packages
for additional information.
Figure 5. Single-Ended LVCMOS or LVTTL Biasing for Burst
Enable
IN+
IN-
BEN+
BEN-
LVTTL OR LVCMOS HIGH
LVTTL OR LVCMOS LOW VCC
R5 = 5kΩ
R4 = 3kΩ
R6 = 9kΩ
VCC
R3 = 5kΩ
MAX3643
Figure 6. Simplified Input Circuit Schematic
MAX3643
VCC
VCC
VCC
16kΩ
5kΩ
5kΩ
IN+/BEN+
IN-/BEN-
24kΩ
VCC
Interface Model
155Mbps to 2.5Gbps Burst-Mode Laser Driver
14 Maxim Integrated
MAX3643
Chip Information
TRANSISTOR COUNT: 2771
PROCESS: SiGe BiPOLAR
Package Information
For the latest package outline information and land patterns,
go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
THIN QFN (4mm x 4mm)
MAX3643
19
20
21
22
12 3456
*EP
18 17 16 15 14 13
23
24
12
11
10
9
8
7
GND
VMSET
MODSET
VREF
BIASSET
*THE EXPOSED PAD MUST BE CONNECTED TO GROUND FOR PROPER
THERMAL AND ELECTRICAL PERFORMANCE.
VCCA
IN+
IN-
VCCS
BEN+
BEN-
VCCO
OUT-
VCCO
BIAS+
BIAS-
VBSET
MDIN
IMAX
MDOUT
BCMON
BENOUT
EN
OUT+
TOP VIEW
+
Pin Configuration
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
24 TQFN-EP T2444-3 21-0139 90-0021
155Mbps to 2.5Gbps Burst-Mode Laser Driver
MAX3643
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and
max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
15
© 2012 Maxim Integrated Products, Inc. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 11/05 Initial release. —
Added “155Mbps to 2.5Gbps” to the data sheet/part title. All
Updated the Applications section. 1
In the Operating Conditions table, changed the data rate from 1250Mbps to 2500Mbps. 2
1 10/08
In the Typical Operating Characteristics, added the Electrical Eye Diagram graph. 6
2 7/10
Replaced the Typical Application Circuit; added the soldering temperature to the Absolute
Maximum Ratings section; updated the optical eye mask margins in the Electrical
Characteristics table; corrected equation in Note 14; added the optical eye diagrams to
the Typical Operating Characteristics section; updated the pin descriptions for the pins
with diodes (13, 17) in the Pin Description table; updated Figure 1; updated the Output
Drivers section; updated the Layout Considerations section; added the land pattern
number to the Package Information table.
1, 2, 4–10,
12, 13, 14
3 5/12
Updated Typical Application Circuit,Electrical Characteristics table, and Typical
Operating Characteristics global conditions, and added bias current overshoot parameter 1–7
4 12/12 Updated Note 1 in the Electrical Characteristics 4
