Ky/ SGS-THOMSON TS27C256Q 256K (32K x 8) CMOS UV ERASABLE PROM uw FAST ACCESS TIME: 150ns, 170ns, 200ns, 250ns, 300ns. m COMPATIBLE TO HIGH SPEED MICROPROCESSORS ZERO WAIT STATE a 28-PIN JEDEC APPROVED PIN-OUT a LOW POWER CONSUMPTION: ACTIVE 30mA MAX STANDBY 1mA MAX a PROGRAMMING VOLTAGE 12.5V a HIGH SPEED PROGRAMMING pinca gs ELECTRONIC SIGNATURE (Ceramic Bulls Eye) s ory PROPOSED IN PLASTIC PACKAGE {Ordering Information at the end of the datasheet) PIN CONNECTIONS DESCRIPTION NS Yep Qs 28} Yec The TS27C256 is a high speed 262,144 bit UV era- 12 fl2 27 sable and electrically reprogrammable EPROM A ) are ideally suited for applications where fast turn- Aq f 3 26]} ala around and pattern experimentation are important as fs 2s{) ae requirements. ( h 5 2 The TS27C256 is packaged in a 28-pin dual-in-line as p AS package with transparent lid. The transparent lid aa [6 23) an allows the user to expose the chip to ultraviolet light aa Qi? 22[) OE to erase the bit pattern. A new pattern can then be 2 fe aif) aro written into the device by following the program- A _ ming procedure. ar 9 20) TE Ao [fio 19f} 07 oo Qu 18[] 06 or fz inf) 05 oz fis vef} 04 GND [jis 1s] 03 PIN NAMES S- 7576 AOA14 ADDRESS CE CHIP ENABLE OE OUTPUT ENABLE O07 QUTPUTS June 1988 1/9 121TS27C256Q BLOCK DIAGRAM Yoc 0 GNO O* DATA DUTPUTS 00 - 07 Ypp O* nn _ _ [Hitt oE OE , CE } _ AND PROGRAM cE* LOGIC TT GUTPUT BUFFERS a y = v OECOOER ' GATING AO-A1L Po AOORESS) *Y INPUTS | 9 I __ x | | econ | ese, a S- 7597 ABSOLUTE MAXIMUM RATINGS() Symbol Parameter Value Unit Tamb Operating temperature range T, to Ty C TS27C256CQ 0 to+70 TS27C256VQ ~ 40 to+ 85 Tstg Storage temperature range 65 to+ 125 c Vpp Supply voltage -0.6 104+ 14 Vv Vin? Input voltages AQ 0.6 to+ 13.5 Vv Except Vpp, AQ 0.6 to+6.25 Pp Max power dissipation 1.5 Ww Lead temperature +300 C (Soldering: 10 seconds) Notes: 1. Maximum ratings are those values beyond which the safety of the device cannot be guaranteed. Except for Operating tem- perature range they are not meant to imply that the devices should be operated at these limits. The table of Etectricai charac- teristics provides conditions for actual device operation. 2. With respect to GND OPERATING MODES PINS CE OE AS Vpp Voc OUTPUTS MODE (20) (22) (24) (1) (28) (11-13 15-19) READ Vit Vit x Voc Vec Dout OUTPUT DISABLE VIL Vin x Vec Voc Hi-Z STANDBY Vin x xX Voc Veco Hi-Z HIGH SPEED PROGRAMMING VIL Vin x Vpp Vec Dw PROGRAM VERIFY Vin VIL x Vpp Voc Dout PROGRAM INHIBIT Vin Vin x Vpp Voc Hi-Z ELECTRONIC SIGNATURE() Vit ViL V2) Voc Vec CODE Notes: 1 - X can be either Vi_ or Vipy 2 - VY =12.0V40.5V 3 - All address lines at Vj, except A9 and AQ that is toggled from Vj, (manufacturer code: 9B) to Vj, (type code: 04). 2/9 {7 SGS-THOMSON YS. inckozveetaowics 122TS27C256Q READ OPERATION DCG CHARACTERISTICS (Tamb = TL to TH, Voc =5V+10%, Vgg = OV; Unless otherwise specified}) Values Symbol Parameter Test Conditions Unit Min. Typ.) Max. lu Input Load Current Vin = Voc or GND 10 pA ILo Output Leakage Current Vout =Vcc or Vss, CE=Viy 10 BA Vpp Vpp Read Voltage Voc - 0.7 Voc Vv Vit Input Low Voltage -01 0.8 Vv Vin Input High Voltage 2.0 Voc+1 Vv Vor Output Low Voltage loc =2.1 mA 0.45 Vv lor =9 pA 0.1 Vou | Output High Voltage loH = 400 pA 2.4 Vv lon =O pA Voc - 0.1 loce | Voc Supply Active Current CE=OE= ViL, Inputs = Vjy4 or 10 30 mA TTL Levels Vit, f=5 MHz, VO=0 mA locse1 | Yoo Supply Standby Current |[ Viq or Viv 0.05 1 mA Iccsa2 | Voc Supply Standby Current | Voc 0.1V or Vgg +0.1V 1 10 pA Ipp4 Vpp Read Current Vpp=Vcc =5.5V 10 pA Note: 1. Typical conditions are for operation at: Tamb = + 25C, Vcc = 5V, Vpp =Vocc, and Vgg =0V AC CHARACTERISTICS(Tamb = TL to TH) 27C256 | 27C256 | 27C256 | 270256 | 270256 Symbol Parameter Test Conditions 15 17 -20 -25 30 | Unit Min |Max| Min |Max|Min |Max|Min IMax|Min [Max tacc | Address to Output Delay | CE =OE=ViL 150 170 200 250 300) ns tce | CE to Output Delay OE =Vi 150 170 200 250/300] ns toe | Output Enable to CE=ViL 75 75 75 100 120} ns Output Delay tor!24) | OE or CE High to 0 | 50/ 0 | 50] 0 | 55! 0 | 60] O | 75] ns output float tou Output Hold from CE=0E=Vi_ 0 0 0 0 ) ns addresses, CE or OE whichever occured first CAPACITANCE Tampb= + 25C, f= 1 MHz (Note 3) Symbol Parameter Conditions Min. Typ. Max. Unit Cin Input Capacitance Vin = 0V 4 6 pF Cout Output Capacitance Vout = 0V 8 12 pF Notes: 1. must be applied at the same time or before Vpp and removed after or at the same time as Vpp*Vpp may be connected 2. The tor voc e to Voc except during program. compare level is determined as follows: High to THREE-STATE, the measured Wor{DO) -0.1V ( Low to THREE-STATE the measured Voi . Capacitance is guaranteed By periodic testing. Ta, . Tor. is specified from OE or GE whichever occurs first. This parameter is only sampled and not 100% tested. . All parameters are specified at Voc =5V 45% for 27C256-15X, 27C256-17X, 27C256-20X, 27C256-25X and 27C256-30X. onw C) +0.1V. = +25C, f= 1MHz. KY. SGS-THOMSON 3/9 MICKOELECTROMIES 123TS27C2560 AC TEST CONDITIONS Output Load: 1 TTL gate and CL=100 pF Input Rise and Fall Times <20 ns Input pulse levels: 0.45V to 2.4V Timing Measurement Reference Level Inputs, Outputs 0.8V and 2V AC TESTING INPUT/OUTPUT WAVEFORM AC TESTING LOAD CIRCUIT 24 20 20 > TEST POINTS < 0.8 oa $6507 DEVICE UNOER TEST CL=100pF Le CL INCLUDES JIG CAPACITANCE AC WAVEFORMS Yin ADDRESSES Vit Min Vin OUTPUT Mi ADDRESS VALID ---- y__ HIGH Z VALIO. OUTPUT by 3-6809 Notes: 1. Typical values are for Tamp = 25C and nominal supply voltage 2. This parameter is only sampled and not 100% tested. 3. OE may be delayed up to gece - tog after the falling edge CE without impact on tacc Ww 4. tpris specified form OE or hichever occurs first. 419 124 Sz SGS-THOMSON Tf. MICRGELECTROMCSTS27C256Q DEVICE OPERATION The seven modes of operation of the TS27C256 are listed in the Operating Modes table. A single 5V power supply is required in the read mode. All inputs are TTL levels except for Vpp- READ MODE The TS27C256 has two control functions, both of wich must be logically active in order to obtain da- ta at the outputs. Chip Enable (CE) is the power control and should be used for device selection. Output Enable (OE) is the output control and should be used to gate data to the output pins, indepen- dent of device selection. Assuming that addresses are stable, address access time (tacc) is equal to the delay from CE to Output (tcg). Data is available at the outputs after a delay of tog from the falling edge of OE, assuming that CE has been low and addresses have been stable for at least tacc-toe. STANDBY MODE The TS27C256 has a standby mode which redu- ces the maximum power dissipation to 5.5 mW. The TS27C256 is placed in the standby mode by ap- plying a TTL high signal to the CE input. When in standby mode, the outputs are in a high impedan- ce state, independent of the OE input. OUTPUT OR-TYING Because EPROMs are usually used in larger me- mory arrays, we have provided two control lines which accomodate this multiple memory connec- tion. The two control lines allow for: a) the lowest possible memory power dissipation, and b) complete assurance that output bus contention will not occur. To use these control lines most efficiently, CE (pin 20) should be decoded and used as the primary de- vice selecting function, while OE (pin 22} shouid be made a common connection to all devices in the array and connected to the READ line from the sy- stem control bus. This assures that all deselected memory devices are in their low power standby mo- des and that the output pins are active only when data is desired from a particular memory device. PROGRAMMING MODES Caution: Exceeding 14V on pin 1 (Vpp) will dama- ge the TS27C256. Initially, and after each erasure, ail bits of the TS27C256 are in the 1 state. Data is introduced by selectively programming Os inte the desired bit locations. Although only Os will be program- med, both 1s and Os can be presented in the data word. The only way to change a 0 toa 1 is by ultraviolet light erasure. The TS27C256 is in the programming mode when the Vpp input is at 12.5 V and CE is at TTL Low. It is required that a 0.1 zF capacitor be placed across Vpp, Vcc and ground to suppress spurious voltage transients which may damage the device. The data to be programmed is applied 8 bits in pa- rallel to the data output pins. The levels required for the address and data inputs are TTL. Programming of multiple TS27C256s in parallel with the same data can be easily accomplished due to the simplicity of the programming requirements. Like inputs of the parallel TS27C256s may be con- nected together when they are programmed with the same data. A low level TTL pulse applied to the CE input programs the paralleled TS27C256s. HIGH SPEED PROGAMMING The high speed programming algorithm described in the flow chart rapidly programs TS27C256 using an efficient and reliable method particularly suited to the production programming environment. Ty- pical programming times for individual devices are on the order of 5 minutes. PROGRAM INHIBIT Programming of multiple TS27C256s in parallel with different data is also easily accomplished_by using the program inhibit mode. A high level on CE input inhibits the other T$27C256s from being pro- grammed. Except for CE, alt like inputs (including OE) of the parallel TS27C256s may be common. A TTL low-level pulse applied to a TS27C256 CE input with Vpp at 12.5 V will program that TS27C256. PROGRAM VERIFY A verify may be performed on the programmed bits to determine that they were correctly programmed. The verify is performed with OE at Vj,, CE at Vin and Vpp at 12.5 V. ELECTRONIC SIGNATURE MODE Electronic signature mode allows the reading out of a binary code that will indentify the EPROM ma- nufacturer and type. This mode is intended for use by programming equipment for the purpose of au- tomatically matching the device to be programmed with its corresponding programming algorithm. This mode is functional in the 25C + 5C ambient tem- perature range that is required when programming the TS27C256. To activate this mode the program- ming equipment must force 11.5V to 12.5V on ad- dress line AQ (pin 24) of the TS27C256. Two bytes may then be sequenced from the device outputs by toggling address line AO (pin 10) from Vi_ to Vin. All other address lines must be held at Vj_ du- ting electonic signature mode. &77, SGS-THOMSON 5/8 ~ MICROELECTRONICS 125TS27C256Q ERASING The TS27C256 is erased by exposure to high in- tensity ultraviolet light through the transparent win- dow. This exposure discharges the floating gate to its initial state through induced photo current. It is recommended that the TS27C256 be kept out of direct sunlight. The UV content of sunlight may cause a partial erasure of some bits in a relatively short period of time. Direct sunlight can also cau- se temporary functional failure. Extended exposure to room level fluorescent lighting will also cause erasure. An opaque coating (paint, tape, label, etc.) should be placed over the package window if this product is to be operated under these lighting con- ditions. Covering the window also reduces ICC due to photodiode currents. An ultraviolet source of 2537A yielding a total in- tegrated dosage of 15 watt-seconds/cm? is requi- red. This will erase the part in approximately 15 to 20 minutes if a UV lamp with a 12,000 W/cm2 po- wer rating is used. The TS27C256 to be erased should be placed 1 inch from the lamp and no fil- ters should be used. An erasure system should be calibrated periodical- ly. The distance from lamp to unit should be main- tained at 1 inch. The erasure time is increased by the square of the distance (if the distance is dou- bled the erasure time goes up by a factor of 4). Lamps lose intensity as they age. When a lamp is changed, the distance is changed, or the lamp is aged, the system should be checked to make cer- tain full erasure is occuring. Incomplete erasure will cause symptoms that can be misleading. Program- mers, components, and system designs have been erroneously suspected when incomplete erasure was the basic problem. PROGRAMMING OPERATIONS()(Tamp = 25 +5C, Voc = 6.0V +0.25V, Vpp = 12.5V +0.3V) DC AND OPERATING CHARACTERISTICS Values Symbol Parameter Test Conditions Unit Min. Typ. Max. I Input Current (all inputs) Vi=Vic or Vin 10 BA Vit Input Low Level (ail inputs) -0.1 0.8 Vv Vin Input High Level 2.0 Voc +1 Vv VoL Output low voltage during verify | loL=2.1 MA 0.45 Vv Vou Output high voltage during verify | lou = 400 pA 2.4 v locs Voc Supply current 30 mA (Pragram & Verify) Ipp2 Vpp supply current (Program) CE=ViL 30 mA AC CHARACTERISTICS Values Symbol Parameter Test Conditions Unit Min. Typ. Max. tas Address Set-up Time 2 Ss toes GE Set-up Time 2 BS tos Data Set-up Time 2 ps taH Address Hold Time 0 BS tpH Data Hold Time 2 ps tpFP Output enable to output float delay 0 130 ns types Vpp set-up time 2 us tves Voc set-up time 2 Ss tpw PGM initial program pulse width 0.95 1.6 1.05 ms topw?) PGM overprogram pulse width 2.85 78.75 ms toe Data valid from OE 150 ns Notes: 1. Voc must be applied simultaneously or before Vpp and removed simultaneously or after Vpp. 2. topw is defined in flow chart. 6/9 126 SGS-THOMSON VF. MickeELecrRoMes.TS27C256Q AC TEST CONDITIONS Input rise and fall times (10% to 90%) <20ns Input pulse levels 0.45V to 2.4V Input timing reference level 0.8V and 2.0V Output timing reference level 0.8V and 2.0V HIGH SPEED PROGRAMMING WAVEFORMS PROGRAM PROGRAM YERIFY Vin ADDRESSES ADDRESS STABLE Vin Vin DATA DATA IN STABLE DATA OUT VALID Vit 12.5V Yep 5 6V Yoc 5V Yin ce Vin Yi OE Vie $-982371 1. The input timing reference level is 0.8 for Vj_ and 2.0V for ViHq 2. tog and tprp are characteristics of the device but must be accommodate by the programmer. 3. When programming the TS27C256, a 0.1 pF capacitor is required across Vpp and ground to suppress spurious voltage transiens which can damage the device. SGS-THOMSON 79 IF. menoguecrronies 127TS27C256Q HIGH SPEED PROGRAMMING FLOW CHART AODR-FIRST LOCATIGN Voc =6V Vpp-l2.5 PROGRAM VERIFY ONE BYTE DEVICE FAILED Pass INCREMENT ADDR OEVICE FAILED DEVICE PASSED 5-688) B/9 i SGS-THOMSON IS, micRoELECTROMICS 128TS27C256Q ORDERING INFORMATION Part Number Access Time Supply Voltage Temp. Range Package TS27C256-15XCQ 150 ns 5V+ 5% 0 to +70C DIP-28 TS27C256-17XCQ 170 ns 5V+ 5% 0 to +70C DIP-28 TS27C256-20XCQ 200 ns 5V+ 5% 0 to +70C DIP-28 TS27C256-25XCQ 250 ns 5V+ 5% 0 to +70C DIP-28 TS27C256-30XCQ 300 ns 5V+ 5% 0 to +70C DIP-28 TS27C256-17CQ 170 ns 5V+10% 0 to +70C DiP-28 TS27C256-20CQ 200 ns 5V+ 10% 0 to +70C DIP-28 TS27C0256-25CQ 250 ns 5V+10% 0 to +70C DIP-28 TS27C256-30CQ 300 ns 5V+10% 0 to + 70C DIP-28 TS27C256-15VQ 150 ns 5V+ 5% ~40 to + 85C DIP-28 TS827C256-17VQ 170 ns 5V+ 10% 40 to + 85C DIP-28 TS27C256-20VQ 200 ns 5V + 10% -40 to +85C DIP-28 TS27C256-25VQ 250 ns 5V + 10% -40 to +85C DIP-28 TS27C256-30VQ 300 ns 5V + 10% -40 to +85C DIP-28 PACKAGE MECHANICAL DATA 28-PIN CERAMIC DIP BULLS EYE mm inches Dim. FI Min | Typ | Max | Min | Typ | Max A 38.10 1.500 B [1305 13.36 | 0.514 0526 Cc | 390 5.08 | 0.154 0.200 M Tp | 300 0.118 | 050 1.78 | 0.020 0.070 e3 33.02 1.300 F | 229 2.79 | 0.090 a.tt0 G6 | 040 0.55 | 0.016 0.022 | 1417 1.42 | 0.048 0.056 L 0.22 0.31 | 0.008 0.012 a wm | 182 2.49 | 0.080 0.008 N | 1651 18.00 | 0.650 0.79 1 _ r P| 15.40 15.80 | 0.606 0.622 TooToo oo ooo 0 571 0205 PO5B-E/4 a | 686 7.36 |0.270 0.290 397, SES TOMson = 129