FQD2N60C / FQU2N60C — N-Channel QFET® MOSFET
©2003 Semiconductor Components Industries, LLC.
October-2017,Rev.2
Publication Order Number:
FQU2N60C/D
Absolute Maximum Ratings TC = 25°C unless otherwise noted.
Thermal Characteristics
Symbol Parameter FQD2N60CTM / FQU2N60CTU Unit
VDSS Drain-Source Voltage 600 V
ID
Drain Current - Continuous (TC = 25°C) 1.9 A
- Continuous (TC = 100°C) 1.14 A
IDM Drain Current - Pulsed (Note 1) 7.6 A
VGSS Gate-Source Voltage ± 30 V
EAS Single Pulsed Avalanche Energy (Note 2) 120 mJ
IAR Avalanche Current (Note 1) 1.9 A
EAR Repetitive Avalanche Energy (Note 1) 4.4 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns
PD
Power Dissipation (TA = 25°C)* 2.5 W
Power Dissipation (TC = 25°C) 44 W
- Derate above 25°C 0.35 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TL
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds 300 °C
Symbol Parameter FQD2N60CTM /
FQU2N60CTU Unit
RθJC Thermal Resistance, Junction-to-Case, Max. 2.87
°C/W
RθJA
Thermal Resistance, Junction-to-Ambient (minimum pad of 2 oz copper), Max. 110
Thermal Resistance, Junction-to-Ambient (* 1 in2 pad of 2 oz copper), Max. 50
FQD2N60C / FQU2N60C
N-Channel QFET® MOSFET
600 V, 1.9 A, 4.7 Ω
Features
• 1.9 A, 600 V, RDS(on) = 4.7 Ω (Max.) @ VGS = 10 V,
ID = 0.95 A
• Low Gate Charge (Typ. 8.5 nC)
• Low Crss (Typ. 4.3 pF)
• 100% Avalanche Tested
•RoHS Compliant
Description
This N-Channel enhancement mode power MOSFET is
produced using ON Semiconductor’s proprietary planar
stripe and DMOS technology. This advanced MOSFET
technology has been especially tailored to reduce on-state
resistance, and to provide superior switching performance
and high avalanche energy strength. These devices are
suitable for switched mode power supplies, active power
factor correction (PFC), and electronic lamp ballasts.
GDS
I-PAK
D-PAK
G
S
D
G
S
D
FQD2N60C / FQU2N60C — N-Channel QFET® MOSFET
www.onsemi.com
2
Package Marking and Ordering Information
Electrical Characteristics TC = 25°C unless otherwise noted.
NOTES:
1. Repetitive Rating : Pulse width limited by maximum junction temperature.
2. L = 56 mH, IAS = 2 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25°C.
3. ISD ≤ 2 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25°C.
4. Essentially independent of operating temperature.
Device Marking Device Package Reel Size Tape Width Quantity
FQD2N60C FQD2N60CTM D-PAK 330 mm 16 mm 2500 units
FQU2N60C FQU2N60CTU I-PAK Tube N/A 70 units
Symbol Parameter Test Conditions Min Typ Max Unit
Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 μA 600 -- -- V
ΔBVDSS
/ ΔTJ
Breakdown Voltage Temperature
Coefficient ID = 250 μA, Referenced to 25°C -- 0.6 -- V/°C
IDSS Zero Gate Voltage Drain Current VDS = 600 V, VGS = 0 V -- -- 1 μA
VDS = 480 V, TC = 125°C -- -- 10 μA
IGSSF Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA
On Characteristics
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 μA2.0--4.0V
RDS(on) Static Drain-Source
On-Resistance VGS = 10 V, ID = 0.95 A -- 3.6 4.7 Ω
gFS Forward Transconductance VDS = 40 V, ID = 0.95 A -- 5.0 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
-- 180 235 pF
Coss Output Capacitance -- 20 25 pF
Crss Reverse Transfer Capacitance -- 4.3 5.6 pF
Switching Characteristics
td(on) Turn-On Delay Time VDD = 300 V, ID = 2 A,
RG = 25 Ω
(Note 4)
-- 9 28 ns
trTurn-On Rise Time -- 25 60 ns
td(off) Turn-Off Delay Time -- 24 58 ns
tfTurn-Off Fall Time -- 28 66 ns
QgTotal Gate Charge VDS = 480 V, ID = 2 A,
VGS = 10 V
(Note 4)
-- 8.5 12 nC
Qgs Gate-Source Charge -- 1.3 -- nC
Qgd Gate-Drain Charge -- 4.1 -- nC
Drain-Source Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drain-Source Diode Forward Current -- -- 1.9 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 7.6 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 1.9 A -- -- 1.4 V
trr Reverse Recovery Time VGS = 0 V, IS = 2 A,
dIF / dt = 100 A/μs
-- 230 -- ns
Qrr Reverse Recovery Charge -- 1.0 -- μC
FQD2N60C / FQU2N60C — N-Channel QFET® MOSFET
www.onsemi.com
3
Typical Performance Characteristics
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics
Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage
Drain Current and Gate Voltage Variation vs. Source Current
and Temperatue
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
10-1 100101
10-2
10-1
100
VGS
Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
※ Notes :
1. 250μs Pulse Test
2. TC
= 25℃
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
246810
10-1
100
101
150oC
25oC
-55oC
※ Notes :
1. VDS = 40V
2. 250μs Pulse Test
ID, Drain Current [A]
VGS, Gate-Source Voltage [V]
012345
0
2
4
6
8
10
12
VGS = 20V
VGS = 10V
※ Note : T
J = 25℃
RDS(ON) [Ω],
Drain-Source On-Resistance
ID
, Drain Current [A]
0.2 0.4 0.6 0.8 1.0 1.2 1.4
10-1
100
150℃
※ Notes :
1. VGS = 0V
2. 250μs Pulse Test
25℃
IDR, Reverse Drain Current [A]
VSD, Source-Drain voltage [V]
10-1 100101
0
50
100
150
200
250
300
350
400
450
500 C
iss = Cgs + Cgd (Cds = shorted)
C
oss = Cds + Cgd
C
rss = Cgd
※ Notes ;
1. VGS = 0 V
2. f = 1 MHz
Crss
Coss
Ciss
Capacitance [pF]
VDS, Drain-Source Voltage [V]
0246810
0
2
4
6
8
10
12
VDS = 300V
VDS = 120V
VDS = 480V
※ Note : ID
= 2A
VGS, Gate-Source Voltage [V]
Q
G
, Total Gate Charge [nC]
FQD2N60C / FQU2N60C — N-Channel QFET® MOSFET
www.onsemi.com
4
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation
vs. Temperature vs. Temperature
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 11. Transient Thermal Response Curve
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
※ Notes :
1. VGS = 0 V
2. ID
= 250 μA
BVDSS, (Normalized)
Drain-Source Breakdown Voltage
T
J
, Junction Temperature [o
C]
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
※ Notes :
1. VGS = 10 V
2. ID
= 0.95 A
RDS(ON), (Normalized)
Drain-Source On-Resistance
T
J
, Junction Temperature [o
C]
25 50 75 100 125 150
0.0
0.4
0.8
1.2
1.6
2.0
ID, Drain Current [A]
TC
, Case Temperature [ ]℃
10-5 10-4 10-3 10-2 10-1 100101
10-1
100
※ N otes :
1. ZθJC(t) = 2.87 /W M ax.℃
2. D uty Fa ctor, D =t1/t2
3. TJM - TC = PDM * ZθJC(t)
single pulse
D=0.5
0.02
0.2
0.05
0.1
0.01
ZθJC
(t), Thermal Response
t1, Square W ave Pulse D uration [sec]
t
1
P
DM
t
2
ZθJC(t), Thermal Response [oC/W]
FQD2N60C / FQU2N60C — N-Channel QFET® MOSFET
www.onsemi.com
5
Figure 12. Gate Charge Test Circuit & Waveform
Figure 13. Resistive Switching Test Circuit & Waveforms
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
VGS
Charge
VGS
10V
Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
Charge
VGS
10V
Qg
Qgs Qgd
3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
IG = const.
EAS =LI
AS2
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
L
ID
t p
EAS =LI
AS2
----
2
1
EAS =LI
AS2
----
2
1
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
10V DUT
RG
LL
ID
ID
t p
VGS
VGS
FQD2N60C / FQU2N60C — N-Channel QFET® MOSFET
www.onsemi.com
6
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS • dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS • dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
D = Gate Pulse Width
Gate Pulse Period
--------------------------
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