OPA2677
OPA2677
OPA2677
Dual, Wideband, High Output Current
Operational Amplifier
OPA2677
SBOS126F – APRIL 2000 – REVISED MAY 2006
www.ti.com
Copyright © 2000-2006, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
FEATURES
●
WIDEBAND +12V OPERATION: 200MHz (G = +4)
●UNITY-GAIN STABLE: 220MHz (G = +1)
●HIGH OUTPUT CURRENT: 500mA
●OUTPUT VOLTAGE SWING: ±5V
●HIGH SLEW RATE: 1800V/µs
●LOW SUPPLY CURRENT: 18mA
●FLEXIBLE SUPPLY RANGE:
+5 to +12V Single Supply
±2.5 to ±6V Dual Supplies
APPLICATIONS
●xDSL LINE DRIVER
●CABLE MODEM DRIVER
●MATCHED I/Q CHANNEL AMPLIFIER
●BROADBAND VIDEO LINE DRIVER
●ARB LINE DRIVER
●POWER LINE MODEM
●HIGH CAP LOAD DRIVER
DESCRIPTION
The OPA2677 provides the high output current and low distortion
required in emerging xDSL and Power Line Modem driver
applications. Operating on a single +12V supply, the OPA2677
consumes a low 9mA/ch quiescent current to deliver a very high
500mA output current. This output current supports even the
most demanding ADSL CPE requirements with > 380mA mini-
mum output current (+25°C minimum value) with low harmonic
distortion. Differential driver applications will deliver < –85dBc
distortion at the peak upstream power levels of full rate ADSL.
The high 200MHz bandwidth will also support the most demand-
ing VDSL line driver requirements.
Specified on ±6V supplies (to support +12V operation), the
OPA2677 will also support a single +5V or dual ±5V supply.
Video applications will benefit from its very high output
current to drive up to 10 parallel video loads (15Ω) with
< 0.1%/0.1° dG/dP nonlinearity.
OPA2677 RELATED PRODUCTS
SINGLES DUALS TRIPLES NOTES
OPA691 OPA2691 OPA3691 Single +12V Capable
— THS6042 — ±15V Capable
— OPA2674 — Single +12V Capable
with current limit
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
OPA2677
2SBOS126F
www.ti.com
SPECIFIED
PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT
PRODUCT PACKAGE-LEAD DESIGNATOR RANGE MARKING NUMBER MEDIA, QUANTITY
OPA2677 SO-8 D –40°C to +85°C OPA2677U OPA2677U Rails, 100
" " " " " OPA2677U/2K5 Tape and Reel, 2500
OPA2677 PSO-8 DTJ –40°C to +85°C OPA2677H OPA2677H Rails, 100
" " " " " OPA2677H/2K5 Tape and Reel, 2500
OPA2677 SO-16 D –40°C to +85°C OPA2677T OPA2677T Rails, 48
OPA2677T/2K5 Tape and Reel, 2500
OPA2677 QFN-16 RGV –40°C to +85°C OPA2677 OPA2677IRGVT Tape and Reel, 250
OPA2677IRGVR Tape and Reel, 2500
ABSOLUTE MAXIMUM RATINGS(1)
Power Supply ............................................................................... ±6.5VDC
Internal Power Dissipation .......................... See Thermal Characteristics
Differential Input Voltage .................................................................. ±1.2V
Input Common-Mode Voltage Range ................................................. ±VS
Storage Temperature Range: U, H, T, E ......................–40°C to +125°C
Lead Temperature (soldering, 10s).............................................. +300°C
Junction Temperature (TJ ) ........................................................... +150°C
ESD Rating:
Human Body Model (HBM)(2) ....................................................... 2000V
Charge Device Model (CDM)....................................................... 1000V
Machine Model (MM) ..................................................................... 100V
NOTES: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability.
(2) Pins 2 and 6 on SO-8 package, pins 2 and 5 on SO-16 package,
and pins 2 and 11 on QFN-16 package > 500V HBM.
PIN CONFIGURATIONS
Top View
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
PACKAGE/ORDERING INFORMATION(1)
NOTE: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at
www.ti.com.
1
2
3
4
12
11
10
9
NC
–In B
+In B
NC
16 15 14 13
Out A
NC
+VS
Out B
5678
NC
NC
–VS
NC
OPA2677RGV
QFN-16
NC
–In A
+In A
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NC
–In A
+In A
NC
–In B
+In A
NC
NC
+VS
Out A
NC
+VS
Out B
–VS
NC
NC
OPA2677T
SO-16
(internally connected
to pin 16)
Ch A
Ch B
1
2
3
4
8
7
6
5
+V
S
Out B
–In B
+In B
OPA2677U, H
SO-8, PSO-8
Out A
–In A
+In A
–V
S
NOTE: Exposed thermal pad on PSO-8 and QFN-16 must be tied to –VS.
OPA2677 3
SBOS126F www.ti.com
OPA2677U, H, T, RGV
TYP
0°C to –40°C to MIN/
TEST
PARAMETER CONDITIONS +25°C +25°C(1) 70°C(2) +85°C(2) UNITS MAX
LEVEL
(3)
AC PERFORMANCE (see Figure 1)
Small-Signal Bandwidth (VO = 0.5VPP) G = +1, RF = 511Ω220 MHz min B
G = +2, RF = 475Ω200 170 168 165 MHz min B
G = +4, RF = 402Ω200 170 168 165 MHz min B
G = +8, RF = 250Ω250 225 205 200 MHz min B
Peaking at a Gain of +1 G = +1, RF = 511Ω0 dB typ C
Bandwidth for 0.1dB Gain Flatness G = +4, VO = 0.5VPP 80 36 32 30 MHz min B
Large-Signal Bandwidth G = +4, VO = 5VPP 200 MHz typ C
Slew Rate G = +4, 5V Step 2000 1500 1450 1400 V/µsminB
Rise-and-Fall Time G = +4, VO = 2V Step 1.75 ns typ C
Harmonic Distortion G = +4, f = 5MHz, VO = 2VPP
2nd-Harmonic RL = 100Ω–72 –70 –69 –68 dBc max B
RL ≥ 500Ω–82 –80 –79 –78 dBc max B
3rd-Harmonic RL = 100Ω–81 –80 –79 –78 dBc max B
RL ≥ 500Ω–93 –91 –90 –89 dBc max B
Input Voltage Noise f > 1MHz 2 2.6 2.9 3.1 nV/√Hz max B
Noninverting Input Current Noise f > 1MHz 16 20 21 22 pA/√Hz max B
Inverting Input Current Noise f > 1MHz 24 29 30 31 pA/√Hz max B
NTSC Differential Gain NTSC, G = +2, RL = 150Ω0.03 % typ C
NTSC, G = +2, RL = 37.5Ω0.05 % typ C
NTSC Differential Phase NTSC, G = +2, RL = 150Ω0.01 degrees typ C
NTSC, G = +2, RL= 37.5Ω0.04 degrees typ C
Channel-to-Channel Crosstalk f = 5MHz, Input Referred –92 dB typ C
DC PERFORMANCE(4)
Open-Loop Transimpedance Gain VO = 0V, RL = 100Ω135 80 76 75 kΩmin A
Input Offset Voltage VCM = 0V ±1.0 ±4.5 ±5±5.3 mV max A
Average Offset Voltage Drift VCM = 0V ±4±10 ±10 ±12 µV/°CmaxB
Noninverting Input Bias Current VCM = 0V ±10 ±30 ±32 ±35 µAmaxA
Average Noninverting Input Bias Current Drift VCM = 0V ±5±50 ±50 ±75 nA/°CmaxB
Inverting Input Bias Current VCM = 0V ±10 ±35 ±40 ±45 µAmaxA
Average Inverting Input Bias Current Drift VCM = 0V ±10 ±100 ±100 ±150 nA°/C max B
INPUT(4)
Common-Mode Input Range (CMIR)(5) ±4.5 ±4.1 ±4.0 ±3.9 V min A
Common-Mode Rejection Ratio (CMRR) VCM = 0V, Input Referred 55 51 50 49 dB min A
Noninverting Input Impedance 250 || 2 kΩ || pF typ C
Minimum Inverting Input Resistance Open-Loop 22 12 Ωmin B
Maximum Inverting Input Resistance Open-Loop 22 35 Ωmax B
OUTPUT(4)
Voltage Output Swing No Load ±5.1 ±4.9 ±4.8 ±4.7 V min A
RL = 100Ω±5.0 ±4.8 ±4.7 ±4.5 V min A
RL = 25Ω±4.8 V typ C
Current Output VO = 0 ±500 ±380 ±350 ±320 mA min A
Peak Current Output, Sourcing(6) VO = 0 1.2 A typ C
Peak Current Output, Sinking(6) VO = 0 –1.6 A typ C
Closed-Loop Output Impedance G = +4, f ≤ 100kHz 0.003 Ωtyp C
POWER SUPPLY
Specified Operating Voltage ±6 V typ C
Maximum Operating Voltage ±6.3 ±6.3 ±6.3 V max A
Minimum Operating Voltage ±2 V typ C
Maximum Quiescent Current VS = ±6V 18 18.6 18.8 19.5 mA max A
Minimum Quiescent Current VS = ±6V 18 17.4 16.5 16.0 mA min A
Power-Supply Rejection Ratio (PSRR) f = 100kHz, Input Referred 56 51 49 48 dB min A
THERMAL CHARACTERISTICS
Specification: U, H, T
–40 to +85
°C
Thermal Resistance,
θ
JA Junction-to-Ambient
USO-8 125 °C/W typ C
H PSO-8 Exposed Slug Soldered to Board 55 °C/W typ C
T SO-16 100 °C/W typ C
RGV QFN-16 Exposed Slug Soldered to Board 50(7) °C/W typ C
MIN/MAX OVER TEMPERATURE
ELECTRICAL CHARACTERISTICS: VS = ±6V
Boldface limits are tested at +25°C.
At TA = +25°C, G = +4, RF = 402Ω, and RL = 100Ω, unless otherwise noted. See Figure 1 for AC performance only.
NOTES: (1) Junction temperature = ambient for +25°C specifications.
(2) Junction temperature = ambient at low temperature limit; junction temperature = ambient +23°C at high temperature limit for over temperature
specifications.
(3) Test levels: (A) 100% tested at +25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation.
(C) Typical value only for information.
(4) Current is considered positive out of node. VCM is the input common-mode voltage.
(5) Tested < 3dB below minimum CMRR specifications at ±CMIR limits.
(6) Peak output duration should not exceed junction temperature +150°C for extended periods.
(7) Not connecting the exposed slug to the –VJ plane gives 75°C/W thermal impedance (
θ
JA).
OPA2677
4SBOS126F
www.ti.com
AC PERFORMANCE (see Figure 3)
Small-Signal Bandwidth (VO = 0.5VPP) G = +1, RF = 536Ω160 MHz min B
G = +2, RF = 511Ω150 120 118 115 MHz min B
G = +4, RF = 453Ω150 130 128 125 MHz min B
G = +8, RF = 332Ω160 130 128 125 MHz min B
Peaking at a Gain of +1 G = +1, RF = 511Ω0 dB typ C
Bandwidth for 0.1dB Gain Flatness G = +4, VO = 0.5VPP 70 23 20 19 MHz min B
Large-Signal Bandwidth G = +4, VO = 2VPP 100 MHz typ C
Slew Rate G = +4, 2V Step 1100 830 827 825 V/µsminB
Rise-and-Fall Time G = +4, VO = 2V Step 2 ns typ C
Harmonic Distortion G = +4, f = 5MHz, VO = 2VPP
2nd-Harmonic RL = 100Ω–67 –65 –64 –63 dBc max B
RL ≥ 500Ω–71 –68 –67 –66 dBc max B
3rd-Harmonic RL = 100Ω–72 –70 –69 –68 dBc max B
RL ≥ 500Ω–74 –71 –70 –69 dBc max B
Input Voltage Noise f > 1MHz 2 2.6 2.9 3.1 nV/√Hz max B
Noninverting Input Current Noise f > 1MHz 16 20 21 22 pA/√Hz max B
Inverting Input Current Noise f > 1MHz 24 29 30 31 pA/√Hz max B
Channel-to-Channel Crosstalk f = 5MHz, Input Referred –92 dB typ C
DC PERFORMANCE
Open-Loop Transimpedance Gain VO = 0V, RL = 100Ω110 72 70 68 kΩmin A
Input Offset Voltage VCM = 0V ±0.8 ±3.5 ±4.0 ±4.3 mV max A
Average Offset Voltage Drift VCM = 0V ±4±10 ±10 ±12 µV/°CmaxB
Noninverting Input Bias Current VCM = 0V ±10 ±30 ±32 ±35 µAmaxA
Average Noninverting Input Bias Current Drift VCM = 0V ±5±50 ±50 ±75 nA/°CmaxB
Inverting Input Bias Current VCM = 0V ±10 ±30 ±40 ±45 µAmaxA
Average Inverting Input Bias Current Drift VCM = 0V ±10 ±100 ±100 ±150 nA°/C max B
INPUT
Most Positive Input Voltage 3.7 3.3 3.2 3.1 V min A
Most Negative Input Voltage 1.3 1.7 1.8 1.9 V min A
Common-Mode Rejection Ratio (CMRR)
VCM = 2.5V, Input Referred 52 49 48 47 dB min A
Noninverting Input Impedance 250 || 2 kΩ || pF typ C
Minimum Inverting Input Resistance Open-Loop 25 15 kΩmin B
Maximum Inverting Input Resistance Open-Loop 25 40 kΩmax B
OUTPUT
Most Positive Output Voltage No Load 4.1 3.9 3.8 3.6 V min A
RL = 100Ω3.5 3.8 3.7 3.5 V min A
Least Positive Output Voltage No Load 0.8 1.0 1.1 1.3 V min A
RL = 100Ω1.0 1.1 1.2 1.5 V min A
Current Output VO = 0 ±300 ±200 ±180 ±100 mA min A
Closed-Loop Output Impedance G = +4, f ≤ 100kHz 0.02 Ωtyp C
POWER SUPPLY
Specified Operating Voltage +5 V typ C
Maximum Operating Voltage 12.6 12.6 12.6 V max A
Minimum Operating Voltage +4 V typ C
Maximum Quiescent Current VS = ±6V 13.6 14.8 15.2 15.6 mA max A
Minimum Quiescent Current VS = ±6V 13.6 12.0 11.7 11.4 mA min A
Power-Supply Rejection Ratio (PSRR) f = 100kHz, Input Referred 52 dB typ C
THERMAL CHARACTERISTICS
Specification: U, H, T
–40 to +85
°C
Thermal Resistance,
θ
JA Junction-to-Ambient
USO-8 125 °C/W typ C
H PSO-8 Exposed Slug Soldered to Board 55 °C/W typ C
T SO-16 100 °C/W typ C
RGV QFN-16 Exposed Slug Soldered to Board 50(4) °C/W typ C
OPA2677U, H, T, RGV
TYP
0°C to –40°C to MIN/
TEST
PARAMETER CONDITIONS +25°C +25°C(1) 70°C(2) +85°C(2) UNITS MAX
LEVEL
(3)
ELECTRICAL SPECIFICATIONS: VS = +5V
Boldface limits are tested at +25°C.
At TA = +25°C, G = +4, RF = 453Ω, and RL = 100Ω, unless otherwise noted. See Figure 3 for AC performance only.
MIN/MAX OVER TEMPERATURE
NOTES: (1) Junction temperature = ambient for +25°C specifications.
(2) Junction temperature = ambient at low temperature limit; junction temperature = ambient +9°C at high temperature limit for over temperature
specifications.
(3) Test levels: (A) 100% tested at +25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation.
(C) Typical value only for information.
(4) Not connecting the exposed slug to the –VJ plane gives 75°C/W thermal impedance (
θ
JA).
OPA2677 5
SBOS126F www.ti.com
TYPICAL CHARACTERISTICS: VS = ±6V
At TA = +25°C, G = +4, RF = 402Ω, and RL = 100Ω, unless otherwise noted.
NONINVERTING SMALL-SIGNAL
FREQUENCY RESPONSE
Frequency (MHz)
0 100 200 300 400 500
6
3
0
–3
–6
–9
–12
–15
–18
Normalized Gain (dB)
V
O
= 0.5V
PP
See Figure 1
G = +8
R
F
= 250Ω
G = +2
R
F
= 475Ω
G = +4
R
F
= 402Ω
G = +1
R
F
= 511Ω
INVERTING SMALL-SIGNAL
FREQUENCY RESPONSE
Frequency (MHz)
0 100 200 300 400 500
6
3
0
–3
–6
–9
–12
–15
–18
Normalized Gain (dB)
V
O
= 0.5V
PP
G = –1, R
F
= 475Ω
G = –2, R
F
= 422Ω
G = –8, R
F
= 280Ω
G = –4, R
F
= 383Ω
See Figure 2
NONINVERTING LARGE-SIGNAL
FREQUENCY RESPONSE
Frequency (MHz)
0 100 200 300 400 500
18
15
12
9
6
3
0
–3
–6
–9
–12
–15
Gain (dB)
G = +4, See Figure 1
VO = 10VPP
VO = 8VPP
VO = 2VPP
VO ≤ 1VPP
See Figure 1
INVERTING LARGE-SIGNAL
FREQUENCY RESPONSE
Frequency (MHz)
0 100 200 300 400 500
18
15
12
9
6
3
0
–3
–6
–9
–12
–15
Gain (dB)
G = –4
R
F
= 383Ω
V
O
= 8V
PP
V
O
= 10V
PP
V
O
= 5V
PP
V
O
≤ 1V
PP
See Figure 2
NONINVERTING PULSE RESPONSE
Time (5ns/div)
Output Voltage (1V/div)
Output Voltage (100mV/div)
4V
PP
G = +4
200mV
PP
Left Scale
Large Signal
Right Scale
Small Signal
See Figure 1
INVERTING PULSE RESPONSE
Time (5ns/div)
Output Voltage (1V/div)
Output Voltage (100mV/div)
4V
PP
Left Scale
Large Signal
Right Scale
G = –4
200mV
PP
Small Signal
See Figure 2
OPA2677
6SBOS126F
www.ti.com
TYPICAL CHARACTERISTICS: VS = ±6V (Cont.)
At TA = +25°C, G = +4, RF = 402Ω, and RL = 100Ω, unless otherwise noted.
HARMONIC DISTORTION vs FREQUENCY
Frequency (MHz)
0.1 1 2010
–60
–65
–70
–75
–80
–85
–90
–95
–100
Harmonic Distortion (dBc)
VO = 2VPP
RL = 100Ω
Single Channel—see Figure 1
2nd-Harmonic
3rd-Harmonic
HARMONIC DISTORTION vs OUTPUT VOLTAGE
Output Voltage (V
PP
)
0.1 1 10
–60
–65
–70
–75
–80
–85
–90
–95
–100
Harmonic Distortion (dBc)
F = 5MHz
R
L
= 100Ω2nd-Harmonic
3rd-Harmonic
Single Channel—see Figure 1
HARMONIC DISTORTION vs NONINVERTING GAIN
Gain Magnitude (V/V)
1
–60
–65
–70
–75
–80
–85
–90
–95
–100 10
Harmonic Distortion (dBc)
VO = 2VPP
f = 5MHz
RL = 100Ω2nd-Harmonic
3rd-Harmonic
Single Channel—see Figure 1
HARMONIC DISTORTION vs LOAD RESISTANCE
Load Resistance (Ω)
10 100 1000
–60
–65
–70
–75
–80
–85
–90
–95
–100
Harmonic Distortion (dBc)
Single Channel—see Figure 1
VO = 2VPP
f = 5MHz
2nd-Harmonic
3rd-Harmonic
2-TONE, 3rd-ORDER
INTERMODULATION SPURIOUS
Single-Tone Load Power (dBm)
–10 0 5–5 10
–60
–65
–70
–75
–80
–85
–90
–95
–100
3rd-Order Spurious Level (dBc)
See Figure 1 20MHz
5MHz 1MHz
Single Channel—see Figure 1
10MHz
HARMONIC DISTORTION vs INVERTING GAIN
Gain Magnitude |(V/V)|
1
–60
–65
–70
–75
–80
–85
–90
–95
–100 10
Harmonic Distortion (dBc)
V
O
= 2V
PP
f = 5MHz
R
L
= 100Ω
2nd-Harmonic
3rd-Harmonic
Single Channel—see Figure 2
OPA2677 7
SBOS126F www.ti.com
TYPICAL CHARACTERISTICS: VS = ±6V (Cont.)
At TA = +25°C, G = +4, RF = 402Ω, and RL = 100Ω, unless otherwise noted.
MAXIMUM OUTPUT SWING
vs LOAD RESISTANCE
Load Resistance (Ω)
10
6
5
4
3
2
1
0
–1
–2
–3
–4
–5
–6 100 1000
Output Voltage (V)
See Figure 1
OUTPUT VOLTAGE AND CURRENT LIMITATIONS
IO (mA)
–600
6
5
4
3
2
1
0
–1
–2
–3
–4
–5
–6 0 200 400–200–400 600
VO (V)
RL = 10Ω
RL = 25Ω
RL = 50Ω
RL = 100Ω
1W Internal Power
Single Ch
1W Internal Power
Single Ch
INPUT VOLTAGE AND CURRENT NOISE DENSITY
Frequency (Hz)
100
100
10
1100k 1M10k1k 10M
Voltage Noise nV/√Hz
Current Noise pA/√Hz
Inverting Current Noise 24pA/√Hz
16pA/√Hz
2nV/√Hz
Voltage Noise
Noninverting Current Noise
CHANNEL-TO-CHANNEL CROSSTALK
Frequency (Hz)
1M 10M 100M
–60
–65
–70
–75
–80
–85
–90
–95
–100
Crosstalk, Input Referred (dB)
Input Referred
RECOMMENDED R
S
vs CAPACITIVE LOAD
Capacitive Load (pF)
1 10 100 1000
90
80
70
60
50
40
30
20
10
0
R
S
(Ω)
FREQUENCY RESPONSE vs CAPACITIVE LOAD
Frequency (Hz)
1M
2
0
–2
–4
–6
–8
–10 10M 100M 1G
Normalized Gain to Capacitive
Load (dB)
CL = 10pF
CL = 22pF
CL = 100pF
CL = 47pF
1/2
OPA2677
402Ω
R
S
133Ω
1kΩC
L
1kΩ is optional.
OPA2677
8SBOS126F
www.ti.com
TYPICAL CHARACTERISTICS: VS = ±6V (Cont.)
At TA = +25°C, G = +4, RF = 402Ω, and RL = 100Ω, unless otherwise noted.
CMRR AND PSRR vs FREQUENCY
Frequency (Hz)
1k
70
60
50
40
30
20
10
010k 100k 1M 10M 100M
Power-Supply Rejection Ratio (dB)
Common-Mode Rejection Ratio (dB)
CMRR
–PSRR
+PSRR
OPEN-LOOP TRANSIMPEDANCE GAIN AND PHASE
Frequency (Hz)
10k 100k 1M 10M 100M 1G
120
100
80
60
40
20
0
Transimpedance Gain (20dBΩ/div)
0
–45
–90
–135
–180
–225
–270
Transimpedance Phase (45°/div)
CLOSED-LOOP OUTPUT IMPEDANCE
vs FREQUENCY
Frequency (Hz)
10k 100k 1M 10M 100M 1G
100
10
1
0.1
0.01
0.001
Output Impedance Magnitude (Ω)
COMPOSITE VIDEO dG/dφ
Number of 150Ω Loads
12345678910
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
dG/dφ (%/°)
G = +2
RF = 475Ω
VS = ±5V dφ, Negative Video
dφ, Positive Video
dG, Positive Video
dG, Negative Video
8
6
4
2
0
–2
–4
–6
–8
NONINVERTING OVERDRIVE RECOVERY
Time (20ns/div)
Output Voltage (2V/div)
4
3
2
1
0
–1
–2
–3
–4
Input Voltage (1V/div)
G = +4
R
L
= 100Ω
See Figure 1
Input
Output
8
6
4
2
0
–2
–4
–6
–8
INVERTING OVERDRIVE RECOVERY
Time (20ns/div)
Output Voltage (2V/div)
4
3
2
1
0
–1
–2
–3
–4
Input Voltage (1V/div)
Input
Output See Figure 2
G = –4
R
L
= 100Ω
OPA2677 9
SBOS126F www.ti.com
TYPICAL CHARACTERISTICS: VS = ±6V (Cont.)
At TA = +25°C, G = +4, RF = 402Ω, and RL = 100Ω, unless otherwise noted.
TYPICAL DC ERROR DRIFT
vs TEMPERATURE
Ambient Temperature (°C)
–55
10
8
6
4
2
0
–2
–4
–6
–8
–10 –35 –15 5 25 45 65 85 105 125
Input Offset Voltage (mV)
Input Bias Current (µA)
Noninverting Bias Current
Input Offset Voltage
Inverting Bias Current
SUPPLY AND OUTPUT CURRENT
vs TEMPERATURE
Temperature (°C)
–55
600
550
500
450
400
350
300
250
200
150
100 –35 –15 5 25 45 65 85 105 125
Output Current (mA)
50
40
30
20
10
0
Output Current (mA)
Sourcing Output Current
Sinking Output Current
Supply Current
CMIR AND OUTPUT VOLTAGE
vs SUPPLY VOLTAGE
Supply Voltage (±V)
2345
6
5
4
3
2
1
06
Voltage Range (±V)
± Output Voltage
No Load
+V Input Voltage
–V Input Voltage
OPA2677
10 SBOS126F
www.ti.com
TYPICAL CHARACTERISTICS: VS = ±6V (Cont.)
At TA = +25°C, Differential Gain = +9, RF = 300Ω, and RL = 70Ω, unless otherwise noted. See Figure 5 for AC performance only.
DIFFERENTIAL SMALL-SIGNAL
FREQUENCY RESPONSE
Frequency (MHz)
5 10010 500
3
0
–3
–6
–9
Normalized Gain (dBc)
R
L
= 70Ω
V
O
= 200mV
PP
G
D
= +2,
R
F
= 442Ω
G
D
= +5,
R
F
= 383Ω
G
D
= +9,
R
F
= 300Ω
See Figure 5
DIFFERENTIAL LARGE-SIGNAL
FREQUENCY RESPONSE
Frequency (MHz)
410010 400
20
19
18
17
16
15
14
Gain (dB)
0.2V
PP
R
L
= 70Ω
G
D
= +9
5V
PP
2V
PP
1V
PP
See Figure 5
HARMONIC DISTORTION vs LOAD RESISTANCE
Load Resistance (Ω)
10 1k100
–65
–70
–75
–80
–85
–90
–95
Harmonic Distortion (dB)
2nd-Harmonic
3rd-Harmonic
f = 5MHz
GD = +9
VO = 2VPP
See Figure 5
HARMONIC DISTORTION vs FREQUENCY
Frequency (MHz)
0.1 101 100
–60
–65
–70
–75
–80
–85
–90
–95
–100
Harmonic Distortion (dB)
2nd-Harmonic
3rd-Harmonic
G
D
= +9
R
L
= 70Ω
V
O
= 2V
PP
See Figure 5
HARMONIC DISTORTION vs OUTPUT VOLTAGE
Output Voltage (Vp-p)
0.1 101 100
–64
–66
–68
–70
–72
–74
–76
–78
–80
Harmonic Distortion (dB)
f = 5MHz
G = +9
RL = 70Ω
2nd-Harmonic
3rd-Harmonic
See Figure 5
MULTITONE POWER RATIO
(V
S
= ±6V, 13dBm Output Power)
Frequency (kHz)
0 20 40 60 80 100 120 140 160
10
0
–10
–20
–30
–40
–50
–60
–70
–80
Power (dB)
See Figure 5
OPA2677 11
SBOS126F www.ti.com
TYPICAL CHARACTERISTICS: VS = +5V
At TA = +25°C, G = +4, RF = 453Ω, and RL = 100Ω to VS/2, unless otherwise noted.
NONINVERTING SMALL-SIGNAL
FREQUENCY RESPONSE
Frequency (MHz)
0 50 100 150 200 250
6
3
0
–3
–6
–9
–12
–15
–18
Normalized Gain (dB)
See Figure 3
G = +1
R
F
= 536Ω
G = +2
R
F
= 511Ω
G = +4
R
F
= 453ΩG = +8
R
F
= 332Ω
INVERTING SMALL-SIGNAL
FREQUENCY RESPONSE
Frequency (MHz)
0 50 100 150 200 250
6
3
0
–3
–6
–9
–12
–15
–18
Normalized Gain (dB)
G = –8
R
F
= 332Ω
G = –4
R
F
= 453Ω
G = –2
R
F
= 511Ω
G = –1
R
F
= 536Ω
See Figure 4
400
300
200
100
0
–100
–200
–300
–400
SMALL-SIGNAL PULSE RESPONSE
Time (5ns/div)
Output Voltage (100mV/div)
VO = 500mVPP
See Figure 3
1.6
1.2
0.8
0.4
0
–0.4
–0.8
–1.2
–1.6
LARGE-SIGNAL PULSE RESPONSE
Time (5ns/div)
Output Voltage (400mV/div)
V
O
= 2V
PP
See Figure 3
RECOMMENDED R
S
vs CAPACITIVE LOAD
Capacitive Load (pF)
1 10 100 1000
50
45
40
35
30
25
20
15
10
5
0
R
S
(Ω)
FREQUENCY RESPONSE vs CAPACITIVE LOAD
Frequency (Hz)
1M
2
0
–2
–4
–6
–8
–10 10M 100M 1G
Normalized Gain to Capacitive
Load (dB)
CL = 10pF
CL = 22pF
CL = 47pF
453Ω
150Ω
804Ω
804Ω
1kΩ
1kΩ Load Optional.
1/2
OPA2677
V
I
+5V
0.1µF
V
O
R
S
C
L
0.1µF
CL = 100pF
OPA2677
12 SBOS126F
www.ti.com
TYPICAL CHARACTERISTICS: VS = +5V (Cont.)
At TA = +25°C, G = +4, RF = 453Ω, and RL = 100Ω to VS/2, unless otherwise noted.
HARMONIC DISTORTION vs FREQUENCY
Frequency (MHz)
0.1 1 2010
–50
–55
–60
–65
–70
–75
–80
–85
–90
Harmonic Distortion (dBc)
VO = 2VPP
RL = 100Ω to VS/2
Single Channel—see Figure 3
2nd-Harmonic
3rd-Harmonic
HARMONIC DISTORTION vs NONINVERTING GAIN
Gain Magnitude (V/V)
1
–50
–55
–60
–65
–70
–75
–80
–85
–90 10
Harmonic Distortion (dBc)
2nd-Harmonic
3rd-Harmonic
VO = 2VPP
f = 5MHz
RL = 100Ω to VS/2
Single Channel—see Figure 3
HARMONIC DISTORTION vs OUTPUT VOLTAGE
Output Voltage (V
PP
)
0.1 1 2
–50
–55
–60
–65
–70
–75
–80
–85
–90
Harmonic Distortion (dBc)
f = 5MHz
R
L
= 100Ω to V
S
/2
Single Channel
—see Figure 3
3rd-Harmonic
2nd-Harmonic
HARMONIC DISTORTION vs INVERTING GAIN
Gain (V/V)
–1
–50
–55
–60
–65
–70
–75
–80
–85
–90 –10
Harmonic Distortion (dBc)
2nd-Harmonic
3rd-Harmonic
VO = 2VPP
f = 5MHz
RL = 100Ω to VS/2
Single Channel—see Figure 4
2-TONE, 3rd-ORDER SPURIOUS LEVEL
Single-Tone Load Power (dBm)
–10 0 5–5 10
–50
–55
–60
–65
–70
–75
–80
–85
–90
3rd-Order Spurious Level (dBc)
20MHz
5MHz
1MHz
Single Channel—see Figure 3
10MHz
HARMONIC DISTORTION vs LOAD RESISTANCE
Load Resistance (Ω)
10 100 1000
–50
–55
–60
–65
–70
–75
–80
–85
–90
Harmonic Distortion (dBc)
Single Channel—see Figure 3
V
O
= 2V
PP
f = 5MHz
2nd-Harmonic
3rd-Harmonic
OPA2677 13
SBOS126F www.ti.com
TYPICAL CHARACTERISTICS: VS = +5V (Cont.)
At TA = +25°C, Differential Gain = +9, RF = 316Ω, and RL = 70Ω, unless otherwise noted.
RL
RG
CG
VO
VI
GD = 1 + 2 • RF
RG
R
F
300Ω
R
F
300Ω
1/2
OPA2677
1/2
OPA2677
=V
O
V
I
DIFFERENTIAL SMALL-SIGNAL
FREQUENCY RESPONSE
Frequency (MHz)
10 100 200
3
0
–3
–6
–9
–12
Normalized Gain (dB)
R
L
= 70Ω
G
D
= +2
R
F
= 511Ω
G
D
= +5
R
F
= 422Ω
G
D
= +9
R
F
= 316Ω
DIFFERENTIAL LARGE-SIGNAL
FREQUENCY RESPONSE
Frequency (MHz)
10 100
20
19
18
17
16
15
14
Gain (dB)
R
L
= 70Ω
G
D
= +9
0.2V
PP
1V
PP
2V
PP
5V
PP
HARMONIC DISTORTION vs FREQUENCY
Frequency (MHz)
0.1 101 100
–60
–65
–70
–75
–80
–85
Harmonic Distortion (dBc)
3rd-Harmonic
2nd-Harmonic
G
D
= +9
R
L
= 70Ω
V
O
= 2V
PP
HARMONIC DISTORTION vs LOAD RESISTANCE
Load Resistance (Ω)
10 1k100
–65
–70
–75
–80
–85
–90
–95
Harmonic Distortion (dBc)
2nd-Harmonic
3rd-Harmonic
GD = +9
f = 5MHz
VO = 2VPP
HARMONIC DISTORTION vs OUTPUT VOLTAGE
Differential Output Voltage (VPP)
0.1 101
–65
–70
–75
–80
–85
Harmonic Distortion (dB)
f = 5MHz
G = +9
RL = 70Ω3rd-Harmonic
2nd-Harmonic
DIFFERENTIAL PERFORMANCE
TEST CIRCUIT
OPA2677
14 SBOS126F
www.ti.com
APPLICATION INFORMATION
WIDEBAND CURRENT-FEEDBACK OPERATION
The OPA2677 gives the exceptional AC performance of a
wideband current-feedback op amp with a highly linear, high-
power output stage. Requiring only 9mA/ch quiescent cur-
rent, the OPA2677 swings to within 1V of either supply rail
and delivers in excess of 380mA at room temperature. This
low-output headroom requirement, along with supply voltage
independent biasing, gives remarkable single (+5V) supply
operation. The OPA2677 delivers greater than 150MHz band-
width driving a 2VPP output into 100Ω on a single +5V supply.
Previous boosted output stage amplifiers typically suffer from
very poor crossover distortion as the output current goes
through zero. The OPA2677 achieves a comparable power
gain with much better linearity. The primary advantage of a
current-feedback op amp over a voltage-feedback op amp is
that AC performance (bandwidth and distortion) is relatively
independent of signal gain. Figure 1 shows the DC-coupled,
gain of +4, dual power-supply circuit configuration used as
the basis of the ±6V Electrical and Typical Characteristics.
For test purposes, the input impedance is set to 50Ω with a
resistor to ground and the output impedance is set to 50Ω
with a series output resistor. Voltage swings reported in the
electrical characteristics are taken directly at the input and
output pins, whereas load powers (dBm) are defined at a
matched 50Ω load. For the circuit of Figure 1, the total
effective load is 100Ω || 535Ω = 84Ω.
Figure 2 shows the DC-coupled, bipolar supply circuit con-
figuration used as the basis for the Inverting Gain ±6V
Typical Characteristics. Key design considerations of the
inverting configuration are developed in the
Inverting Ampli-
fier Operation
section.
Figure 3 shows the AC-coupled, gain of +4, single-supply
circuit configuration used as the basis of the +5V Electrical
and Typical Characteristics. Though not a rail-to-rail design,
the OPA2677 requires minimal input and output voltage
headroom compared to other very wideband current-feed-
back op amps. It will deliver a 3VPP output swing on a single
+5V supply with greater than 100MHz bandwidth. The key
requirement of broadband single-supply operation is to main-
tain input and output signal swings within the usable voltage
ranges at both the input and the output. The circuit of Figure 3
establishes an input midpoint bias using a simple resistive
divider from the +5V supply (two 806Ω resistors). The input
signal is then AC-coupled into this midpoint voltage bias. The
input voltage can swing to within 1.3V of either supply pin,
giving a 2.4VPP input signal range centered between the
supply pins. The input impedance matching resistor (57.6Ω)
used for testing is adjusted to give a 50Ω input match when
the parallel combination of the biasing divider network is
included. The gain resistor (RG) is AC-coupled, giving the
circuit a DC gain of +1—which puts the input DC bias voltage
(2.5V) on the output as well. The feedback resistor value is
adjusted from the bipolar supply condition to re-optimize for
a flat frequency response in +5V, gain of +4, operation.
Again, on a single +5V supply, the output voltage can swing
to within 1V of either supply pin while delivering more than
200mA output current. A demanding 100Ω load to a midpoint
bias is used in this characterization circuit. The new output
stage used in the OPA2677 can deliver large bipolar output
currents into this midpoint load with minimal crossover distor-
tion, as shown by the +5V supply, harmonic distortion plots.
1/2
OPA2677
+6V
+
–6V
50Ω Load
50Ω50ΩVO
VI
50Ω Source
RG
133Ω
RF
402Ω
+
6.8µF
0.1µF 6.8µF
0.1µF
+VS
–VS
1/2
OPA2677
+5V
–5V
50Ω Load
50ΩV
O
V
I
50Ω
Source
R
M
100Ω
R
F
402Ω
R
F
402Ω
Power-supply
decoupling
not shown.
FIGURE 1. DC-Coupled, G = +4, Bipolar Supply, Specifica-
tion and Test Circuit.
FIGURE 2. DC-Coupled, G = –4, Bipolar Supply, Specifica-
tion and Test Circuit.
OPA2677 15
SBOS126F www.ti.com
The last configuration used as the basis of the +5V Electrical
and Typical Characteristics is shown in Figure 4. Design
considerations for this inverting, bipolar supply configuration
are covered either in single-supply configuration (as shown
in Figure 3) or in the
Inverting Amplifier Operation
section.
where the input is brought into the OPA2677. Each has its
advantages and disadvantages. Figure 5 shows a basic
starting point for noninverting differential I/O applications.
DIFFERENTIAL INTERFACE APPLICATIONS
Dual op amps are particularly suitable to differential input to
differential output applications. Typically, these fall into either
Analog-to-Digital Converter (ADC) input interface or line
driver applications. Two basic approaches to differential I/O
are noninverting or inverting configurations. Since the output
is differential, the signal polarity is somewhat meaningless—
the noninverting and inverting terminology applies here to
1/2
OPA2677
+5V
V
S
/2
806Ω
V
I
100ΩV
O
806Ω
R
F
453Ω
R
M
88.7Ω
6.8µF
+
0.1µF
0.1µFR
G
113Ω
This approach provides for a source termination impedance
that is independent of the signal gain. For instance, simple
differential filters may be included in the signal path right up
to the noninverting inputs without interacting with the gain
setting. The differential signal gain for the circuit of Figure 5
is: AD = 1 + 2 • RF/RG
Since the OPA2677 is a current feedback (CFB) amplifier, its
bandwidth is principally controlled with the feedback resistor
value; Figure 5 shows a value of 300Ω for the AD = +9
design. The differential gain, however, may be adjusted with
considerable freedom using just the RG resistor. In fact, RG
may be a reactive network providing a very isolated shaping
to the differential frequency response.
Various combinations of single-supply or AC-coupled gain
can also be delivered using the basic circuit of Figure 5.
Common-mode bias voltages on the two noninverting inputs
pass on to the output with a gain of 1 since an equal DC
voltage at each inverting node creates no current through
RG. This circuit does show a common-mode gain of 1 from
input to output. The source connection should either remove
this common-mode signal if undesired (using an input trans-
former can provide this function), or the common-mode
voltage at the inputs can be used to set the output common-
mode bias. If the low common-mode rejection of this circuit
is a problem, the output interface may also be used to reject
that common-mode. For instance, most modern differential
input ADCs reject common-mode signals very well, while a
line driver application through a transformer will also attenu-
ate the common-mode signal through to the line.
RL
RF
300Ω
RF
300Ω
–6
+6
1/2
OPA2677
1/2
OPA2677
RG
75Ω
CG
VO
VI
GD = 1 + =
2 • RF
RG
VO
VI
FIGURE 3. AC-Coupled, G = +4, Single-Supply, Specifica-
tion and Test Circuit.
FIGURE 4. AC-Coupled, G = –4, Single-Supply, Specifica-
tion and Test Circuit.
FIGURE 5. Noninverting Differential I/O Amplifier.
1/2
OPA2677
+5V
+V
S
V
S
/2
806Ω100ΩV
O
V
I
57.6Ω
806Ω
R
F
453Ω
R
G
150Ω
0.1µF
0.1µF
6.8µF
+
0.1µF
OPA2677
16 SBOS126F
www.ti.com
SINGLE-SUPPLY ADSL UPSTREAM DRIVER
Figure 6 shows an example of a single-supply ADSL up-
stream driver. The dual OPA2677 is configured as a differen-
tial gain stage to provide signal drive to the primary winding
of the transformer (here, a step-up transformer with a turns
ratio of 1:1.7). The main advantage of this configuration is the
cancellation of all even harmonic distortion products. Another
important advantage for ADSL is that each amplifier needs
only to swing half of the total output required driving the load.
OPA2677 HDSL2 UPSTREAM DRIVER
Figure 7 shows an HDSL2 implementation of a single-supply
upstream driver.
The two designs differ by the values of their matching
impedance, the load impedance, and the ratio turns of the
transformers. All these differences are reflected in the higher
peak current and thus, the higher maximum power dissipa-
tion in the output of the driver.
The analog front end (AFE) signal is AC-coupled to the
driver, and the noninverting input of each amplifier is biased
to the mid-supply voltage (+6V in this case). In addition to
providing the proper biasing to the amplifier, this approach
also provides a high-pass filtering with a corner frequency,
set here at 5kHz. As the upstream signal bandwidth starts at
26kHz, this high-pass filter does not generate any problem
and has the advantage of filtering out unwanted lower fre-
quencies.
The input signal is amplified with a gain set by the following
equation:
GR
R
DF
G
=+ •
12
(1)
With RF = 324Ω and RG = 82.5Ω, the gain for this differential
amplifier is 8.85. This gain boosts the AFE signal, assumed
to be a maximum of 2VPP, to a maximum of 17.3VPP.
Refer to the
Setting Resistor Values to Optimize Bandwidth
section for a discussion on which feedback resistor value to
choose.
The two back-termination resistors (17.4Ω each) added at
each terminal of the transformer make the impedance of the
modem match the impedance of the phone line, and also
provide a means of detecting the received signal for the
receiver. The value of these resistors (RM) is a function of the
line impedance and the transformer turns ratio (n), given by
the following equation:
RZ
MLINE
n
=22(2)
R
G
82.5Ω
2kΩ
2kΩ
1µF
0.1µF
0.1µFR
M
17.4Ω100Ω
Z
LINE
AFE
2V
PP
Max
Assumed
R
F
324Ω
20Ω
20Ω
324Ω
R
F
1/2
OPA2677
1/2
OPA2677
+12V
1:1.7
17.7V
PP
I
P
= 128mA
I
P
= 128mA
R
M
17.4Ω
+6V
82.5Ω
2kΩ
2kΩ
1µF
0.1µF
0.1µFR
M
11.5Ω135Ω
Z
LINE
AFE
2V
PP
Max
Assumed
324Ω
20Ω
20Ω
324Ω
1/2
OPA2677
1/2
OPA2677
+12V
1:2.4
17.3V
PP
I
P
= 185mA
I
P
= 185mA
R
M
11.5Ω
+6V
LINE DRIVER HEADROOM MODEL
The first step in a transformer-coupled, twisted-pair driver
design is to compute the peak-to-peak output voltage from
the target specifications. This is done using the following
equations:
PV
mW R
LRMS
L
=•
(
)
•
10 1
2
log
(3)
with PL power at the load, VRMS voltage at the load, and RL
load impedance; this gives the following:
VmWR
RMS L
PL
=
(
)
••110
10 (4)
V Crest Factor V C V
PRMS FRMS
==•• (5)
with VP peak voltage at the load and CF Crest Factor.
VLPP = 2 • CF • VRMS (6)
with VLPP: peak-to-peak voltage at the load.
Consolidating Equations 3 through 6 allows expressing the
required peak-to-peak voltage at the load as a function of the
crest factor, the load impedance, and the power at the load.
Thus,
VCFmWR
LPP L
PL
=• •
(
)
••21 10
10
(7)
This VLPP is usually computed for a nominal line impedance
and may be taken as a fixed design target.
The next step in the design is to compute the individual
amplifier output voltage and currents as a function of VPP on
FIGURE 6. Single-Supply ADSL Upstream Driver. FIGURE 7. HDSL2 Upstream Driver.
OPA2677 17
SBOS126F www.ti.com
the line and transformer turns ratio. As this turns ratio
changes, the minimum allowed supply voltage changes along
with it. The peak current in the amplifier output is given by:
±=•••IV
nR
PLPP
M
1
221
4
(8)
with VPP as defined in Equation 7, and RM as defined in
Equation 2 and shown in Figure 8.
TOTAL DRIVER POWER FOR xDSL APPLICATIONS
The total internal power dissipation for the OPA2677 in an
xDSL line driver application will be the sum of the quiescent
power and the output stage power. The OPA2677 holds a
relatively constant quiescent current versus supply voltage—
giving a power contribution that is simply the quiescent
current times the supply voltage used (the supply voltage will
be greater than the solution given in Equation 10). The total
output stage power may be computed with reference to
Figure 10.
With the previous information available, it is now possible to
select a supply voltage and the turns ratio desired for the
transformer as well as calculate the headroom for the
OPA2677.
The model, shown in Figure 9, can be described with the
following set of equations:
1) As available output swing:
VPP = VCC – (V1 + V2) – IP • (R1 + R2) (9)
2) Or as required supply voltage:
VCC = VPP + (V1 + V2) + IP • (R1 + R2) (10)
The minimum supply voltage for a power and load require-
ment is given by Equation 10.
RM
RM
VLpp
nVLpp
RL
2VLpp
n
Vpp =
V
O
R
1
V
1
+V
CC
R
2
V
2
I
P
FIGURE 8. Driver Peak Output Voltage.
FIGURE 9. Line Driver Headroom Model.
V1R1V2R2
+5V 0.9V 5Ω0.8V 5Ω
+12V 0.9V 2Ω0.9V 2Ω
TABLE I. Line Driver Headroom Model Values.
V1, V2, R1, and R2 are given in Table I for both +12V and +5V
operation.
FIGURE 10. Output Stage Power Model.
The two output stages used to drive the load of Figure 8 can
be seen as an H-Bridge in Figure 10. The average current
drawn from the supply into this H-Bridge and load will be the
peak current in the load given by Equation 8 divided by the
crest factor (CF) for the xDSL modulation. This total power
from the supply is then reduced by the power in RT to leave
the power dissipated internal to the drivers in the four output
stage transistors. That power is simply the target line power
used in Equation 3 plus the power lost in the matching
elements (RM). In the examples here, a perfect match is
targeted giving the same power in the matching elements as
in the load. The output stage power is then set by Equation 11.
PI
CF VP
OUT PCC L
=×–2
(11)
The total amplifier power is then:
PIV
I
CF VP
TOT qCC PCC L
=× + × –2
(12)
For the ADSL CPE upstream driver design of Figure 6, the
peak current is 128mA for a signal that requires a crest factor
of 5.33 with a target line power of 13dBm into 100Ω (20mW).
With a typical quiescent current of 18mA and a nominal
supply voltage of +12V, the total internal power dissipation
for the solution of Figure 6 will be: (13)
PmAV
mA VmWmW
TOT
=
(
)
+
(
)
(
)
=18 12 128
533 12 2 20 464
.–
RT
+VCC IAVG = IP
CF
OPA2677
18 SBOS126F
www.ti.com
OPA2677T, HIGH OUTPUT LINE DRIVER
The OPA2677T, a 16-pin version of the OPA2677, is also
available. The specifications for this product are identical to
the OPA2677U, while the pinout has been defined to allow
a direct replacement of the LT1207CS in +12V single supply
xDSL modem designs. Though this product does not have
several of the optional features pinned out in the LT1207CS,
those features are generally not used in the target applica-
tions. Specifically, the LT1207CS provides for separate power
enable lines that must be asserted low for the amplifiers to
operate—those pins are no-connect pins on the OPA2677T.
Also, the two channels of the LT1207CS provide for external
compensation capacitors that are not used as compensation
pins on the OPA2677T. Finally, the LT1207CS requires
numerous power-supply connection pins, whereas the
OPA2677T has reduced these to only two pins, while also
using one of the LT1207 compensation pins as an internal
jumper pin for the positive power supply. For a pinout and
specification comparison, see Figure 11.
DESIGN-IN TOOLS
DEMONSTRATION FIXTURES
A printed circuit board (PCB) is available to assist in the initial
evaluation of circuit performance using the OPA2677. The
fixture is offered free of charge as unpopulated PCB, deliv-
ered with a user’s guide. The summary information for this
fixture is shown in Table II.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NC
–INA
+INA
NC
–INB
+INA
NC
NC
+VS
Out A
NC
+VS
Out B
–VS
NC
NC
OPA2677T
(internally connected
to pin 16)
Ch. A
Ch. B
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
+VS
–INA
+INA
Shutdown A
–INB
+INB
Shutdown B
+VS
+VS
Out A
–VS
Comp. A
Out B
–VS
Comp. B
+VS
LT1207CS
SO-16
PINOUT COMPARISON
SO-16
Ch. A
Ch. B
LT1207CS OPA2677T Comments
Max. IQ (25°V) 60mA (±15V) 18.6mA (±6V) Total Supply Current
Min. IO (0°C to 70°C) 250mA 350mA Output Current/Each Stage
Small Signal BW (G = +2) 60MHz 200MHz Bandwidth/100Ω Load
Slew Rate 900V/µs 2000V/µs
Input Noise Voltage 3.6nV/√Hz 2.0nV/√Hz
No Load Output Headroom 1.6V 1.0V
SPECIFICATION COMPARISON (on +12V or ±6V)
FIGURE 11. Pinout and Specification Comparison of the LT1207CS and OPA2677T.
TABLE II. Demonstration Fixtures by Package.
ORDERING LITERATURE
PRODUCT PACKAGE NUMBER NUMBER
OPA2677U SO-8 DEM-OPA-SO-2A SBOU003
OPA2677H PSO-8 Not Available Not Available
OPA2677T SO-16 Not Available Not Available
OPA2677IRGV QFN-16 Not Available Not Available
This demonstration fixture can be requested at the Texas
Instruments web site (www.ti.com) through the OPA2677
product folder.
OPA2677 19
SBOS126F www.ti.com
MACROMODELS AND APPLICATIONS SUPPORT
Computer simulation of circuit performance using SPICE is
often useful when analyzing the performance of analog
circuits and systems. This is particularly true for video and RF
amplifier circuits where parasitic capacitance and inductance
can have a major effect on circuit performance. A SPICE
model for the OPA2677 is available through the TI web site
(www.ti.com). This model does a good job of predicting
small-signal AC and transient performance under a wide
variety of operating conditions, but does not do as well in
predicting the harmonic distortion or dG/dP characteristics.
This model does not attempt to distinguish between the
package types in small-signal AC performance, nor does it
attempt to simulate channel-to-channel coupling.
OPERATING SUGGESTIONS
SETTING RESISTOR VALUES TO
OPTIMIZE BANDWIDTH
A current-feedback op amp like the OPA2677 can hold an
almost constant bandwidth over signal gain settings with the
proper adjustment of the external resistor values, which is
shown in the Typical Characteristics; the small-signal band-
width decreases only slightly with increasing gain. These
curves also show that the feedback resistor is changed for
each gain setting. The resistor values on the inverting side of
the circuit for a current-feedback op amp can be treated as
frequency response compensation elements, whereas their
ratios set the signal gain. Figure 12 shows the small-signal
frequency response analysis circuit for the OPA2677.
The key elements of this current-feedback op amp model are:
α → Buffer gain from the noninverting input to the inverting input
RI → Buffer output impedance
iERR → Feedback error current signal
Z(S) → Frequency dependent open-loop transimpedance
gain from iERR to VO
The buffer gain is typically very close to 1.00 and is normally
neglected from signal gain considerations. It sets the CMRR,
however, for a single op amp differential amplifier configura-
tion. For a buffer gain α < 1.0, the CMRR = –20 • log (1 – α)dB.
RI, the buffer output impedance, is a critical portion of the
bandwidth control equation. The OPA2677 inverting input
resistor is typically 22Ω.
A current-feedback op amp senses an error current in the
inverting node (as opposed to a differential input error volt-
age for a voltage-feedback op amp) and passes this on to the
output through an internal frequency dependent transimped-
ance gain. The Typical Characteristics show this open-loop
transimpedance response, which is analogous to the open-
loop voltage gain curve for a voltage-feedback op amp.
Developing the transfer function for the circuit of Figure 12
gives Equation 14:
V
V
R
R
RR R
R
Zs
NG
RRNG
Zs
NG R
R
O
I
F
G
FI F
G
FI
F
G
=+
+++
=++
=+
•
αα
1
111
1
()
()
(14)
This is written in a loop-gain analysis format where the errors
arising from a non-infinite open-loop gain are shown in the
denominator. If Z(s) is infinite over all frequencies, the
denominator of Equation 14 reduces to 1 and the ideal
desired signal gain shown in the numerator is achieved. The
fraction in the denominator of Equation 14 determines the
frequency response. Equation 15 shows this as the loop-gain
equation:
Zs
RRNG
Loop Gain
FI
()
+=
(15)
If 20log(R
F
+ NG • R
I
) is drawn on top of the open-loop
transimpedance plot, the difference between the two would
be the loop gain at a given frequency. Eventually, Z
(s)
rolls off
to equal the denominator of Equation 15, at which point the
loop gain has reduced to 1 (and the curves have intersected).
This point of equality is where the amplifier closed-loop
frequency response given by Equation 14 starts to roll off, and
is exactly analogous to the frequency at which the noise gain
equals the open-loop voltage gain for a voltage-feedback op
amp. The difference here is that the total impedance in the
denominator of Equation 15 may be controlled somewhat
separately from the desired signal gain (or NG). The OPA2677
is internally compensated to give a maximally flat frequency
response for R
F
= 402Ω at NG = 4 on ±6V supplies. Evaluat-
ing the denominator of Equation 15 (which is the feedback
transimpedance) gives an optimal target of 490Ω. As the
signal gain changes, the contribution of the NG • R
I
term in
the feedback transimpedance changes, but the total can be
held constant by adjusting R
F
. Equation 16 gives an approxi-
mate equation for optimum R
F
over signal gain:
RF = 490 – NG • RI(16)
V
O
R
G
V
I
R
I
Z
(S)
I
ERR
α
R
F
I
ERR
FIGURE 12. Current Feedback Transfer Function Analysis
Circuit.
OPA2677
20 SBOS126F
www.ti.com
As the desired signal gain increases, this equation eventually
predicts a negative RF. A somewhat subjective limit to this
adjustment can also be set by holding RG to a minimum value
of 20Ω. Lower values load both the buffer stage at the input
and the output stage if RF gets too low—actually decreasing
the bandwidth. Figure 13 shows the recommended RF versus
NG for both ±6V and a single +5V operation. The values for
RF versus gain shown here are approximately equal to the
values used to generate the Typical Characteristics. They
differ in that the optimized values used in the Typical Char-
acteristics are also correcting for board parasitic not consid-
ered in the simplified analysis leading to Equation 16. The
values shown in Figure 13 give a good starting point for
designs where bandwidth optimization is desired.
cially summing) is particularly suited to the OPA2677. Figure
14 shows a typical inverting configuration where the I/O
impedances and signal gain from Figure 1 are retained in an
inverting circuit configuration.
1/2
OPA2677
R
F
392Ω
V
O
V
I
R
G
97.6Ω
+6V
–6V
50Ω50Ω Load
V
O
Power-supply
decoupling not
shown.
V
I
50Ω
Source
R
M
102ΩR
F
R
G
= – = –4
The total impedance going into the inverting input may be
used to adjust the closed-loop signal bandwidth. Inserting a
series resistor between the inverting input and the summing
junction increases the feedback impedance (denominator of
Equation 15), decreasing the bandwidth. The internal buffer
output impedance for the OPA2677 is slightly influenced by
the source impedance looking out of the noninverting input
terminal. High-source resistors have the effect of increasing
RI, decreasing the bandwidth. For those single-supply appli-
cations which develop a midpoint bias at the noninverting
input through high-valued resistors, the decoupling capacitor
is essential for power-supply ripple rejection, noninverting
input noise current shunting, and to minimize the high-
frequency value for RI in Figure 12.
INVERTING AMPLIFIER OPERATION
The OPA2677 is a general-purpose, wideband current-feed-
back op amp; most of the familiar op amp application circuits
should be available to the designer. Those dual op amp
applications that require considerable flexibility in the feed-
back element (for example, integrators, transimpedance, and
some filters) should consider a unity-gain stable, voltage-
feedback amplifier such as the OPA2822, because the feed-
back resistor is the compensation element for a current-
feedback op amp. Wideband inverting operation (and espe-
FIGURE 14. Inverting Gain of –4 with Impedance Matching.
600
500
400
300
200
Noise Gain
02510 15 205
Feedback Resistor (Ω)
+5V
±5V
FIGURE 13. Feedback Resistor vs. Noise Gain.
In the inverting configuration, two key design considerations
must be noted. The first is that the gain resistor (RG)
becomes part of the signal source input impedance. If input
impedance matching is desired (which is beneficial when-
ever the signal is coupled through a cable, twisted pair, long
PC board trace or other transmission line conductor), it is
normally necessary to add an additional matching resistor to
ground. RG, by itself, is not normally set to the required input
impedance since its value, along with the desired gain, will
determine an RF, which may be non-optimal from a fre-
quency response standpoint. The total input impedance for
the source becomes the parallel combination of RG and RM.
The second major consideration, touched on in the previous
paragraph, is that the signal source impedance becomes
part of the noise gain equation and has a slight effect on the
bandwidth through Equation 15. The values shown in Figure
13 have accounted for this by slightly decreasing RF (from
the optimum values) to re-optimize the bandwidth for the
noise gain of Figure 13 (NG = 3.98). In the example of Figure
14, the RM value combines in parallel with the external 50Ω
source impedance, yielding an effective driving impedance of
50Ω || 102Ω = 33.5Ω. This impedance is added in series with
RG for calculating the noise gain—which gives NG = 3.98.
This value, along with the inverting input impedance of 22Ω,
are inserted into Equation 16 to get a feedback
transimpedance nearly equal to the 402Ω optimum value.
Note that the noninverting input in this bipolar supply invert-
ing application is connected directly to ground. It is often
suggested that an additional resistor be connected to ground
on the noninverting input to achieve bias current error can-
cellation at the output. The input bias currents for a current-
feedback op amp are not generally matched in either magni-
tude or polarity. Connecting a resistor to ground on the
noninverting input of the OPA2677 in the circuit of Figure 14
actually provides additional gain for that input bias and noise
currents, but does not decrease the output DC error since the
input bias currents are not matched.
OPA2677 21
SBOS126F www.ti.com
OUTPUT CURRENT AND VOLTAGE
The OPA2677 provides output voltage and current capabili-
ties that are unsurpassed in a low-cost dual monolithic op
amp. Under no-load conditions at 25°C, the output voltage
typically swings closer than 1V to either supply rail; tested at
+25°C swing limit is within 1.1V of either rail. Into a 6Ω load
(the minimum tested load), it delivers more than ±380mA
continuous and > ±1.2A peak output current.
The specifications described above, though familiar in the
industry, consider voltage and current limits separately. In
many applications, it is the voltage times current (or V-I
product) that is more relevant to circuit operation. Refer to
the
Output Voltage and Current Limitations
plot in the Typical
Characteristics. The X and Y axes of this graph show the
zero-voltage output current limit and the zero-current output
voltage limit, respectively. The four quadrants give a more
detailed view of the OPA2677 output drive capabilities,
noting that the graph is bounded by a safe operating area of
1W maximum internal power dissipation (in this case for 1
channel only). Superimposing resistor load lines onto the plot
shows that the OPA2677 can drive ±4V into 10Ω or ±4.5V
into 25Ω without exceeding the output capabilities or the 1W
dissipation limit. A 100Ω load line (the standard test circuit
load) shows the full ±5.0V output swing capability, as shown
in the Electrical Characteristics tables. The minimum speci-
fied output voltage and current over temperature are set by
worst-case simulations at the cold temperature extreme.
Only at cold startup will the output current and voltage
decrease to the numbers shown in the Electrical Character-
istics tables. As the output transistors deliver power, the
junction temperatures increases, decreasing the VBEs (in-
creasing the available output voltage swing), and increasing
the current gains (increasing the available output current). In
steady-state operation, the available output voltage and
current will always be greater than that shown in the over-
temperature specifications, since the output stage junction
temperatures will be higher than the minimum specified
operating ambient. To maintain maximum output stage lin-
earity, no output short-circuit protection is provided. This is
normally not a problem because most applications include a
series-matching resistor at the output that limits the internal
power dissipation if the output side of this resistor is shorted
to ground. However, shorting the output pin directly to the
adjacent positive power-supply pin (8-pin package), will in
most cases, destroy the amplifier. If additional short-circuit
protection is required, consider using the equivalent OPA2674
that includes output current limiting. Alternatively, a small
series resistor may be included in the supply lines. Under
heavy output loads this will reduce the available output
voltage swing. A 5Ω series resistor in each power-supply
lead will limit the internal power dissipation to less than 1W
for an output short circuit while decreasing the available
output voltage swing only 0.5V for up to 100mA desired load
currents. Always place the 0.1µF power-supply decoupling
capacitors after these supply current limiting resistors directly
on the supply pins.
DRIVING CAPACITIVE LOADS
One of the most demanding and yet very common load
conditions for an op amp is capacitive loading. Often, the
capacitive load is the input of an analog-to-digital (A/D)
converter—including additional external capacitance that may
be recommended to improve the A/D converter linearity. A
high-speed, high open-loop gain amplifier such as the
OPA2677 can be very susceptible to decreased stability and
closed-loop response peaking when a capacitive load is
placed directly on the output pin. When the amplifier open-
loop output resistance is considered, this capacitive load
introduces an additional pole in the signal path that can
decrease the phase margin. Several external solutions to this
problem have been suggested.
When the primary considerations are frequency response
flatness, pulse response fidelity, and/or distortion, the sim-
plest and most effective solution is to isolate the capacitive
load from the feedback loop by inserting a series isolation
resistor between the amplifier output and the capacitive load.
This does not eliminate the pole from the loop response, but
rather shifts it and adds a zero at a higher frequency. The
additional zero acts to cancel the phase lag from the capaci-
tive load pole, thus increasing the phase margin and improv-
ing stability. The Typical Characteristics show the recom-
mended RS vs Capacitive Load and the resulting frequency
response at the load. Parasitic capacitive loads greater than
2pF can begin to degrade the performance of the OPA2677.
Long PC board traces, unmatched cables, and connections
to multiple devices can easily cause this value to be
exceeded. Always consider this effect carefully, and add the
recommended series resistor as close as possible to the
OPA2677 output pin (see the Board Layout Guidelines sec-
tion).
DISTORTION PERFORMANCE
The OPA2677 provides good distortion performance into a
100Ω load on ±6V supplies. Relative to alternative solutions,
it provides exceptional performance into lighter loads and/or
operation on a single +5V supply. Generally, until the funda-
mental signal reaches very high frequency or power levels,
the 2nd-harmonic dominates the distortion with a negligible
3rd-harmonic component. Focusing then on the 2nd-har-
monic, increasing the load impedance improves distortion
directly. Remember that the total load includes the feedback
network—in the noninverting configuration (see Figure 1),
this is the sum of RF + RG, whereas in the inverting configu-
ration it is just RF. Also, providing an additional supply
decoupling capacitor (0.01µF) between the supply pins (for
bipolar operation) improves the 2nd-order distortion slightly
(3dB to 6dB).
In most op amps, increasing the output voltage swing in-
creases harmonic distortion directly. The Typical Character-
istics show the 2nd-harmonic increasing at a little less than
the expected 2x rate whereas the 3rd-harmonic increases at
a little less than the expected 3x rate. Where the test power
doubles, the difference between it and the 2nd-harmonic
OPA2677
22 SBOS126F
www.ti.com
decreases less than the expected 6dB, whereas the differ-
ence between it and the 3rd-harmonic decreases by less
than the expected 12dB. This also shows up in the 2-tone,
3rd-order intermodulation spurious (IM3) response curves.
The 3rd-order spurious levels are extremely low at low-output
power levels. The output stage continues to hold them low
even as the fundamental power reaches very high levels. As
the Typical Characteristics show, the spurious intermodulation
powers do not increase as predicted by a traditional intercept
model. As the fundamental power level increases, the dy-
namic range does not decrease significantly. For 2-tone
centered at 20MHz, with 10dBm/tone into a matched 50Ω
load (that is, 2VPP for each tone at the load, which requires
8VPP for the overall 2-tone envelope at the output pin), the
Typical Characteristics show 63dBc difference between the
test-tone power and the 3rd-order intermodulation spurious
levels. This exceptional performance improves further when
operating at lower frequencies.
NOISE PERFORMANCE
Wideband current-feedback op amps generally have a higher
output noise than comparable voltage-feedback op amps. The
OPA2677 offers an excellent balance between voltage and
current noise terms to achieve low output noise. The inverting
current noise (24pA/
√Hz
) is significantly lower than earlier
solutions whereas the input voltage noise (2.0nV/
√Hz
) is lower
than most unity-gain stable, wideband voltage-feedback
op amps. This low input voltage noise is achieved at the price
of higher noninverting input current noise (16pA/
√Hz
). As long
as the AC source impedance looking out of the noninverting
node is less than 100Ω, this current noise does not contribute
significantly to the total output noise. The op amp input voltage
noise and the two input current noise terms combine to give
low output noise under a wide variety of operating conditions.
Figure 15 shows the op amp noise analysis model with all the
noise terms included. In this model, all noise terms are taken
to be noise voltage or current density terms in either nV/
√Hz
or pA/
√Hz
.
R
G
R
F
R
S
E
O2
Driver
E
RS
E
N
I
N
I
N
√4kTR
S
√4kTR
F
√4kTR
F
R
F
R
S
E
RS
E
N
I
N
I
N
√4kTR
S
√4kTR
G
FIGURE 15. Op Amp Noise Analysis Model.
FIGURE 16. Differential Op Amp Noise Analysis Model.
(17)
E E I R kTR I R kTR NG
ONI BN SS
BI F F
=+•
(
)
++•
(
)
+
222
44
Dividing this expression by the noise gain (NG = (1 + RF/RG))
gives the equivalent input referred spot noise voltage at the
noninverting input, as shown in Equation 18. (18)
E E I R kTR IR
NG kTR
NG
NNIBN
SS
BI F F
=+•
(
)
++
•
+
222
44
Evaluating these two equations for the OPA2677 circuit and
component values (see Figure 1) gives a total output spot
noise voltage of 13.5nV/
√Hz
and a total equivalent input spot
noise voltage of 3.3nV/
√Hz
. This total input referred spot
noise voltage is higher than the 2.0nV/
√Hz
specification for
the op amp voltage noise alone. This reflects the noise
added to the output by the inverting current noise times the
feedback resistor. If the feedback resistor is reduced in high-
gain configurations (as suggested previously), the total input
referred voltage noise given by Equation 18 approaches just
the 2.0nV/
√Hz
of the op amp. For example, going to a gain
of +10 using RF = 298Ω gives a total input referred noise of
2.3nV/
√Hz
.
DIFFERENTIAL NOISE PERFORMANCE
As the OPA2677 is used as a differential driver in xDSL
applications, it is important to analyze the noise in such a
configuration. Figure 16 shows the op amp noise model for
the differential configuration.
The total output spot noise voltage can be computed as the
square root of the sum of all squared output noise voltage
contributors. Equation 17 shows the general form for the
output noise voltage using the terms shown in Figure 14.
4kT
RG
RG
RF
RS
1/2
OPA2677
IBI
EO
IBN
4kT = 1.6E –20J
at 290°K
ERS
ENI
√4kTRS
√4kTRF
OPA2677 23
SBOS126F www.ti.com
As a reminder, the differential gain is expressed as:
GR
R
DF
G
=+ •
12
(19)
The output noise can be expressed as shown below: (20)
E G e i R kTR iR kTR G
ODNN
SS
IF FD
=• • +•
(
)
+
+
(
)
+
(
)
24224
22 22
Dividing this expression by the differential noise gain
(GD = (1 + 2RF/RG)) gives the equivalent input referred
spot noise voltage at the noninverting input, as shown in
Equation 21. (21)
E e i R kTR iR
GkTR
G
ONN
SS
IF
D
F
D
=• +•
(
)
+
+
+
2422
4
222
Evaluating these equations for the OPA2677 ADSL circuit
and component values of Figure 6 gives a total output spot
noise voltage of 31.8nV/
√Hz
and a total equivalent input spot
noise voltage of 3.6nV/
√Hz
.
In order to minimize the output noise due to the noninverting
input bias current noise, it is recommended to keep the
noninverting source impedance as low as possible.
DC ACCURACY AND OFFSET CONTROL
A current-feedback op amp such as the OPA2677 provides
exceptional bandwidth in high gains, giving fast pulse settling
but only moderate DC accuracy. The Electrical Characteris-
tics show an input offset voltage comparable to high-speed,
voltage-feedback amplifiers; however, the two input bias
currents are somewhat higher and are unmatched. While
bias current cancellation techniques are very effective with
most voltage-feedback op amps, they do not generally re-
duce the output DC offset for wideband current-feedback op
amps. Because the two input bias currents are unrelated in
both magnitude and polarity, matching the input source
impedance to reduce error contribution to the output is
ineffective. Evaluating the configuration of Figure 1, using
worst-case +25°C input offset voltage and the two input bias
currents, gives a worst-case output offset range equal to:
VOFF = ± (NG • VOS(MAX)) + (IBN • RS/2 • NG) ± (IBI • RF)
where NG = noninverting signal gain
= ± (4 • 4.5mV) + (30µA • 25Ω • 4) ± (402Ω • 30µA)
= ±18mV + 3mV ± 12.06mV
VOFF = –29.06mV to +35.06mV
THERMAL ANALYSIS
Due to the high output power capability of the OPA2677, heat-
sinking or forced airflow may be required under extreme
operating conditions. Maximum desired junction temperature
sets the maximum allowed internal power dissipation as de-
scribed below. In no case should the maximum junction tem-
perature be allowed to exceed 175°C. Operating junction
temperature (T
J
) is given by T
A
+ P
D
•
θ
JA
. The total internal
power dissipation (P
D
) is the sum of quiescent power (P
DQ
) and
additional power dissipation in the output stage (P
DL
) to deliver
load power. Quiescent power is the specified no-load supply
current times the total supply voltage across the part. P
DL
depends on the required output signal and load, but for a
grounded resistive load, P
DL
is at a maximum when the output
is fixed at a voltage equal to 1/2 of either supply voltage (for
equal bipolar supplies). Under this condition, P
DL
= V
S2
/(4 • R
L
)
where R
L
includes feedback network loading. Note that it is the
power in the output stage and not into the load that determines
internal power dissipation. As a worst-case example, compute
the maximum T
J
using an OPA2677 SO-8 in the circuit of
Figure 1 operating at the maximum specified ambient tempera-
ture of +85°C with both outputs driving a grounded 20Ω load to
+2.5V.
PD = 12V • 18mA + 2 • [62 / (4 • (20Ω || 534Ω))] = 882mW
Maximum TJ = +85°C + (0.83 • 125°C/W) = 170°C
This absolute worst-case condition exceeds specified maxi-
mum junction temperature. This extreme case is not normally
encountered. Where high internal power dissipation is antici-
pated, consider the thermal slug package version.
BOARD LAYOUT GUIDELINES
Achieving optimum performance with a high-frequency am-
plifier like the OPA2677 requires careful attention to board
layout parasitic and external component types. Recommen-
dations that optimize performance include:
a) Minimize parasitic capacitance to any AC ground for all
of the signal I/O pins. Parasitic capacitance on the output and
inverting input pins can cause instability; on the noninverting
input, it can react with the source impedance to cause
unintentional band limiting. To reduce unwanted capaci-
tance, a window around the signal I/O pins should be opened
in all of the ground and power planes around those pins.
Otherwise, ground and power planes should be unbroken
elsewhere on the board.
b) Minimize the distance (< 0.25") from the power-supply
pins to high-frequency 0.1µF decoupling capacitors. At the
device pins, the ground and power plane layout should not
be in close proximity to the signal I/O pins. Avoid narrow
power and ground traces to minimize inductance between
the pins and the decoupling capacitors. The power-supply
connections (on pins 4 and 7) should always be decoupled
with these capacitors. An optional supply decoupling capaci-
tor across the two power supplies (for bipolar operation)
improves 2nd-harmonic distortion performance. Larger (2.2µF
to 6.8µF) decoupling capacitors, effective at lower frequency,
should also be used on the main supply pins. These can be
placed somewhat farther from the device and may be shared
among several devices in the same area of the PCB.
c) Careful selection and placement of external compo-
nents preserve the high-frequency performance of the
OPA2677. Resistors should be a very low reactance type.
Surface-mount resistors work best and allow a tighter overall
layout. Metal film and carbon composition axially leaded
resistors can also provide good high-frequency performance.
OPA2677
24 SBOS126F
www.ti.com
Again, keep leads and PCB trace length as short as possible.
Never use wire-wound type resistors in a high-frequency
application. Although the output pin and inverting input pin
are the most sensitive to parasitic capacitance, always posi-
tion the feedback and series output resistor, if any, as close
as possible to the output pin. Other network components,
such as noninverting input termination resistors, should also
be placed close to the package. Where double-side compo-
nent mounting is allowed, place the feedback resistor directly
under the package on the other side of the board between
the output and inverting input pins. The frequency response
is primarily determined by the feedback resistor value as
described previously. Increasing the value reduces the band-
width, whereas decreasing it gives a more peaked frequency
response. The 402Ω feedback resistor used in the Typical
Characteristics at a gain of +4 on ±6V supplies is a good
starting point for design. Note that a 511Ω feedback resistor,
rather than a direct short, is recommended for the unity-gain
follower application. A current-feedback op amp requires a
feedback resistor even in the unity-gain follower configura-
tion to control stability.
d) Connections to other wideband devices on the board
may be made with short direct traces or through onboard
transmission lines. For short connections, consider the trace
and the input to the next device as a lumped capacitive load.
Relatively wide traces (50mils to 100mils) should be used,
preferably with ground and power planes opened up around
them. Estimate the total capacitive load and set RS from the
plot of Recommended RS vs Capacitive Load. Low parasitic
capacitive loads (< 5pF) may not need an RS because the
OPA2677 is nominally compensated to operate with a 2pF
parasitic load. If a long trace is required, and the 6dB signal
loss intrinsic to a doubly-terminated transmission line is
acceptable, implement a matched impedance transmission
line using microstrip or stripline techniques (consult an ECL
design handbook for microstrip and stripline layout tech-
niques). A 50Ω environment is normally not necessary on
board; in fact, a higher impedance environment improves
distortion (see the distortion versus load plots). With a
characteristic board trace impedance defined based on board
material and trace dimensions, a matching series resistor
into the trace from the output of the OPA2677 is used, as well
as a terminating shunt resistor at the input of the destination
device. Remember also that the terminating impedance is
the parallel combination of the shunt resistor and the input
impedance of the destination device.
This total effective impedance should be set to match the
trace impedance. The high output voltage and current capa-
bility of the OPA2677 allows multiple destination devices to
be handled as separate transmission lines, each with their
own series and shunt terminations. If the 6dB attenuation of
a doubly-terminated transmission line is unacceptable, a
long trace can be series-terminated at the source end only.
External
Pin
+VCC
–VCC
Internal
Circuitry
FIGURE 17. Internal ESD Protection.
Treat the trace as a capacitive load in this case and set the
series resistor value as shown in the plot of RS vs Capacitive
Load. However, this does not preserve signal integrity as well
as a doubly-terminated line. If the input impedance of the
destination device is low, there is some signal attenuation
due to the voltage divider formed by the series output into the
terminating impedance.
e) Socketing a high-speed part like the OPA2677 is not
recommended. The additional lead length and pin-to-pin
capacitance introduced by the socket can create an ex-
tremely troublesome parasitic network, which can make it
almost impossible to achieve a smooth, stable frequency
response. Best results are obtained by soldering the OPA2677
directly onto the board.
f) Use the –VS plane to conduct heat out of the PSO-8
power packages (OPA2677H) or QFN-16 (OPA2677IRGV).
This package attaches the die directly to a metal slug in the
bottom, which should be soldered to the board. This slug
needs to be connected electrically to the same voltage plane
as the most negative supply applied to the OPA2677 (in
Figure 6, this would be ground), which must have a minimum
area of 2" x 2" (50mm x 50mm) to produce the
θ
JA values in
the specifications table.
INPUT AND ESD PROTECTION
The OPA2677 is built using a very high-speed complemen-
tary bipolar process. The internal junction breakdown volt-
ages are relatively low for these very small geometry devices
and are reflected in the absolute maximum ratings table. All
device pins have limited ESD protection using internal diodes
to the power supplies, as shown in Figure 17.
These diodes provide moderate protection to input overdrive
voltages above the supplies as well. The protection diodes
can typically support 30mA continuous current. Where higher
currents are possible (for example, in systems with ±15V
supply parts driving into the OPA2677), current-limiting se-
ries resistors should be added into the two inputs. Keep
these resistor values as low as possible, since high values
degrade both noise performance and frequency response.
OPA2677 25
SBOS126F www.ti.com
DATE REVISION PAGE SECTION DESCRIPTION
18 Design-In Tools Demonstration fixture number changed.
Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
5/06 F
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
OPA2677H ACTIVE HSOP DTJ 8 100 Green (RoHS &
no Sb/Br) Call TI Level-2-260C-1 YEAR
OPA2677H/2K5 ACTIVE HSOP DTJ 8 2500 Green (RoHS &
no Sb/Br) Call TI Level-2-260C-1 YEAR
OPA2677H/2K5G3 ACTIVE HSOP DTJ 8 2500 Green (RoHS &
no Sb/Br) Call TI Level-2-260C-1 YEAR
OPA2677HG3 ACTIVE HSOP DTJ 8 100 Green (RoHS &
no Sb/Br) Call TI Level-2-260C-1 YEAR
OPA2677IRGVR ACTIVE QFN RGV 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2677IRGVRG4 ACTIVE QFN RGV 16 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2677IRGVT ACTIVE QFN RGV 16 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2677IRGVTG4 ACTIVE QFN RGV 16 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2677U ACTIVE SOIC D 8 100 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2677U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2677U/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2677UG4 ACTIVE SOIC D 8 100 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 2-Mar-2007
Addendum-Page 1
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 2-Mar-2007
Addendum-Page 2
TAPE AND REEL BOX INFORMATION
Device Package Pins Site Reel
Diameter
(mm)
Reel
Width
(mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
OPA2677H/2K5 DTJ 8 SITE 41 330 12 6.4 5.2 2.1 8 12 Q1
OPA2677IRGVR RGV 16 SITE 41 330 12 4.3 4.3 1.5 8 12 Q2
OPA2677IRGVT RGV 16 SITE 41 180 12 4.3 4.3 1.5 8 12 Q2
OPA2677U/2K5 D 8 SITE 41 330 12 6.9 5.4 2.0 8 12 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 22-Sep-2007
Pack Materials-Page 1
Device Package Pins Site Length (mm) Width (mm) Height (mm)
OPA2677H/2K5 DTJ 8 SITE 41 346.0 346.0 0.0
OPA2677IRGVR RGV 16 SITE 41 346.0 346.0 0.0
OPA2677IRGVT RGV 16 SITE 41 190.0 212.7 0.0
OPA2677U/2K5 D 8 SITE 41 346.0 346.0 0.0
PACKAGE MATERIALS INFORMATION
www.ti.com 22-Sep-2007
Pack Materials-Page 2
MECHANICAL DATA
MPDS100 – AUGUST 2001
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DTJ (R-PDSO-G8) PLASTIC SMALL–OUTLINE
4202635/A 08/01
–A– 0.1968 (4,98)
0.189 (4,80)
Index
Area
–B–
0.1497 (3,80)
0.1574 (4,00)
0.244 (6,20)
0.2284 (5,80)
0.0532 (1,35)
0.0688 (1,75)
0.016 (0,41)
0.018 (0,46)
0.020 (0,51)
0.013 (0,33)
0.090 (2,29)
0.110 (2,79)
0.130 (3,30)
0.150 (3,81)
0.0098 (0,25)
0.0075 (0,20)
0.0196 (0,50)
0.0099 (0,25) × 45°
0°–8°
0.050 (1,27)
0.016 (0,41)
Heat Sink
Bottom View
–C–
Plane
Seating
Plane
0.050 (1,27)
Base
0.004 (0,10)
14
58
F
G
D
C
0.001 (0,03)
0.004 (0,10)
B
0.010 (0,25) M M
X
ø0.015 (0,38) MZS
A
0.010 (0,25) M CMBS
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body length dimension does not include mold flash,
protrusions or gate burrs. Mold flash, protrusions and
gate burrs shall not exceed 0.006 (0,15) per side.
D. Body width dimension does not include inter–lead
flash or protrusions. Inter–lead flash and protrusions
shall not exceed 0.010 (0,25) per side.
E. The chamfer on the body is optional. If it is not
present, a visual index feature must be located within
the cross-hatched area.
F. Lead dimension is the length of terminal for soldering
to a substrate.
G. The lead width, as measured 0.014 (0,36) or
greater above the seating plane, shall not exceed
a maximum value of 0.024 (0,61).
H. Lead-to-lead coplanarity shall be less than
0.004 (0,10) from Seating Plane.
I. Falls within JEDEC MS-012-AA.
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