HEXFET® Power MOSFET IRFI530N
PD -9.1353
VDSS = 100V
RDS(on) = 0.11
ID = 11A
lAdvanced Process Technology
lIsolated Package
lHigh Voltage Isolation = 2.5KVRMS
lSink to Lead Creepage Dist. = 4.8mm
lFully Avalanche Rated
Parameter Min. Typ. Max. Units
RθJC Junction-to-Case –––– –––– 4.5
RθJA Junction-to-Ambient –––– –––– 65
Thermal Resistance
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 11
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 7.8 A
IDM Pulsed Drain Current •† 60
PD @TC = 25°C Power Dissipation 33 W
Linear Derating Factor 0.22 W/°C
VGS Gate-to-Source Voltage ±20 V
EAS Single Pulse Avalanche Energy ‚† 150 mJ
IAR Avalanche Current9.0 A
EAR Repetitive Avalanche Current6.3 mJ
dv/dt Peak Diode Recovery dv/dt Ġ 5.2 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case)
Mounting torque, 6-32 or M3 screw. 10 lbf•in (1.1N•m)
Absolute Maximum Ratings
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design for which HEXFET Power MOSFETs are
well known, provides the designer with an extremely
efficient device for use in a wide variety of applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
PRELIMINARY
°C/W
IRFI530N
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V VGS = 0V, ID = 250µA
V(BR)DSS/TJBreakdown Voltage Temp. Coefficient ––– 0.12 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.11 VGS = 10V, ID = 6.6A
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 6.4 ––– ––– S VDS = 50V, ID = 9.0A
––– ––– 25 VDS = 100V, VGS = 0V
––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
QgTotal Gate Charge ––– ––– 44 ID = 9.0A
Qgs Gate-to-Source Charge ––– ––– 6.2 nC VDS = 80V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 21 VGS = 10V, See Fig. 6 and 13 „†
td(on) Turn-On Delay Time ––– 6.4 ––– VDD = 50V
trRise Time ––– 27 ––– ID = 9.0A
td(off) Turn-Off Delay Time ––– 37 ––– RG = 12
tfFall Time ––– 25 ––– RD = 5.5Ω, See Fig. 10 „†
Between lead,
6mm (0.25in.)
from package
and center of die contact
Ciss Input Capacitance ––– 640 ––– VGS = 0V
Coss Output Capacitance ––– 160 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 88 ––– ƒ = 1.0MHz, See Fig. 5
CDrain to Sink Capacitance ––– 12 ––– ƒ = 1.0MHz
nH
µA
nA
IDSS Drain-to-Source Leakage Current
IGSS
LSInternal Source Inductance ––– –––
ns
4.5
7.5
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
–––
LDInternal Drain Inductance –––
–––
–––
pF
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) showing the
ISM Pulsed Source Current integral reverse
(Body Diode) •† p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 VTJ = 25°C, IS = 6.6A, VGS = 0V
trr Reverse Recovery Time ––– 130 190 ns TJ = 25°C, IF = 9.0A
Qrr Reverse RecoveryCharge ––– 650 970 nC di/dt = 100A/µs „†
Source-Drain Ratings and Characteristics
A
––– ––– 60
––– ––– 11
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
VDD = 15V, starting TJ = 25°C, L = 3.1mH
RG = 25, IAS = 9.0A. (See Figure 12) t=60s, ƒ=60Hz
ƒISD 9.0A, di/dt 520A/µs, VDD V(BR)DSS,
TJ 175°C
Uses IRF530N data and test conditions
Pulse width 300µs; duty cycle 2%.
IRFI530N
Fig 1. Typical Output Characteristics,
TJ = 25oC
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics,
TJ = 175oC
1
10
100
0.1 1 10 100
I , Drain-to-Source Current (A)
D
V , Drain-to-Source Voltage (V)
DS
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
20µs PULSE WIDTH
T = 25°C
A
4.5V
J1
10
100
0.1 1 10 100
4.5V
I , Drain-to-Source Current (A)
D
V , Drain-to-Source Voltage (V)
DS
VGS
TOP 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
A
20µs PULSE WIDTH
T = 175°C
J
1
10
100
4 5 6 7 8 9 10
T = 25°C
J
GS
V , Gate-to-Source Voltage (V)
D
I , Drain-to-Source Current (A)
V = 50V
20µs PULSE WIDTH
DS
T = 175°C
J
A
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
J
T , Junction Temperature (°C)
R , Drain-to-Source On Resistance
DS(on) (Normalized)
V = 10V
GS
A
I = 15A
D
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
IRFI530N
0
200
400
600
800
1000
1200
1 10 100
C, Capacitance (pF)
DS
V , Drain-to-Source Voltage (V)
A
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
0
4
8
12
16
20
0 5 10 15 20 25 30 35 40 45
Q , Total Gate Charge (nC)
G
V , Gate-to-Source Voltage (V)
GS
V = 80V
V = 50V
V = 20V
A
FOR TEST CIRCUIT
SEE FIGURE 13
I = 9.0A
D
DS
DS
DS
1
10
100
0.4 0.6 0.8 1.0 1.2 1.4 1.6
T = 25°C
J
V = 0V
GS
V , Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
A
T = 175°C
J
1
10
100
1000
1 10 100 1000
V , Drain-to-Source Voltage (V)
DS
I , Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY R
D
DS(on)
10µs
100µs
1ms
10ms
A
T = 25°C
T = 175°C
Single Pulse
C
J
Fig 9. Maximum Drain Current Vs.
Case Temperature
IRFI530N
Fig 10a. Switching Time Test Circuit
Fig 10b. Switching Time Waveforms
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RGD.U.T.
10V
VDD
0
2
4
6
8
10
12
25 50 75 100 125 150 175
C
I , Drain Current (Amps)
D
T , Case Temperature (°C)
A
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1 10
t , Rectangular Pulse Duration (sec)
1
thJC
D = 0.50
0.01
0.02
0.05
0.10
0.20
SINGLE PULSE
(THERMAL RESPONSE)
A
Thermal Response (Z )
P
t
2
1
t
DM
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
12
JDMthJC
C
IRFI530N
Fig 12a. Unclamped Inductive Test Circuit
Fig 12b. Unclamped Inductive Waveforms
10 V
10 V
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 13b. Gate Charge Test Circuit
0
50
100
150
200
250
300
350
25 50 75 100 125 150 175
J
E , Single Pulse Avalanche Energy (mJ)
AS
A
Starting T , Junction Temperature (°C)
V = 25V
I
TOP 3.7A
6.4A
BOTTOM 9.0A
DD
D
IRFI530N
* VGS = 5V for Logic Level Devices
ƒ
RGVDD
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
*
Fig 14. For N-Channel HEXFETS
Peak Diode Recovery dv/dt Test Circuit
IRFI530N
Package Outline — TO-220 Full-Pak
Dimensions are shown in millimeters (inches)
Part Marking Information
LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
NOTES:
1 DIMENSIONING & TOLERANCING
PER ANSI Y14.5M, 1982
2 CONTROLLING DIMENSION: INCH.
D
C
AB
MINIMUM CREEPAGE
DISTANCE BETWEEN
A-B-C-D = 4.80 (.189)
3X
2.85 (.112)
2.65 (.104)
2.80 (.110)
2.60 (.102)
4.80 (.189)
4.60 (.181)
7.10 (.280)
6.70 (.263)
3.40 (.133)
3.10 (.123)
ø
- A -
3.70 (.145)
3.20 (.126)
1.15 (.045)
MIN.
3.30 (.130)
3.10 (.122)
- B -
0.90 (.035)
0.70 (.028)
3X
0.25 (.010)MA M B
2.54 (.100)
2X
3X
13.70 (.540)
13.50 (.530)
16.00 (.630)
15.80 (.622)
1 2 3
10.60 (.417)
10.40 (.409)
1.40 (.055)
1.05 (.042)
0.48 (.019)
0.44 (.017)
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
DATE CODE
(YYWW)
YY = YEAR
WW = WEEK
ASSEMBLY
LOT CODE
E401 9245
IRFI840G
EXAMPLE : THIS IS AN IRFI840G
WITH ASSEMBLY
LOT CODE E401
A
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http://www.irf.com/ Data and specifications subject to change without notice. 4/96