General Description
The MAX8704 high-current linear regulator uses an
external n-channel MOSFET to generate low-voltage
supplies for notebook computers. This linear regulator
delivers an output voltage as low as 0.5V from an input
voltage as low as 1.0V. Normally, this low input require-
ment would make the design of such a regulator very dif-
ficult. In this application, the 5V bias supply that is
always available in the system powers the MAX8704 dri-
ver and control circuitry.
The MAX8704 includes a fixed current limit and an
adjustable power limit to protect the external MOSFET
from overheating. Additionally, the MAX8704 includes
an internal thermal limit to prevent damage to the con-
troller and provide remote thermal protection for the
external MOSFET.
The MAX8704 features an adjustable soft-start function
and generates a delayed power-good (PGOOD) signal
that signals when the linear regulator is in regulation.
The MAX8704 is available in a 10-pin µMAX®package.
Applications
VMCH and VCCP CPU Supplies
Notebook Computers
Desktop Computers
Servers
VID Power Supplies
Low-Voltage Bias Supplies
Features
Low-Cost, High-Current Linear Regulator
External MOSFET Protection
MOSFET Power Limit
50mV (typ) Current Limit
Thermal Limit
1.0V to 5.5V Input Supply Voltage
1.2V or 1.5V Preset, or Adjustable Output Voltage
Power-Good (PGOOD) Open-Drain Output with
3ms Startup Delay
Programmable Soft-Start
Shutdown with Output Discharge
MAX8704
High-Current, Low-Voltage Linear Regulator
with Power-Limited, External MOSFET
________________________________________________________________ Maxim Integrated Products 1
1
2
3
4
5
10
9
8
7
6
DRV
GND
CSP
CSNPLIM
PGOOD
VCC
VIN
MAX8704
µMAX
TOP VIEW
FBSS/EN
Pin Configuration
Ordering Information
19-3420; Rev 0; 9/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
EVALUATION KIT AVAILABLE
PART TEMP RANGE PIN-PACKAGE
MAX8704EUB -40°C to +85°C10 µMAX
µMAX is a registered trademark of Maxim Integrated Products, Inc.
MAX8704
High-Current, Low-Voltage Linear Regulator
with Power-Limited, External MOSFET
2_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCC, VIN to GND.......................................................-0.3V to +6V
CSP, CSN, DRV to GND...........................................-0.3V to +6V
FB, PLIM, SS/EN, PGOOD to GND.............-0.3V to (VCC + 0.3V)
Continuous Power Dissipation (TA= +70°C)
10-Pin µMAX (derated 5.6mW/°C above +70°C).........444mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
ELECTRICAL CHARACTERISTICS
(VIN = 2.5V, VCC = 5.0V, PLIM = FB = GND, CSP = CSN, SS/EN floating, TA= 0°C to +85°C, unless otherwise noted. Typical values
are at TA= +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
VIN 1.0 5.5
Input Voltage Range VCC 4.5 5.5 V
FB = VCC 1.462 1.50 1.538
Preset Output Voltage
(Fixed) VOUT FB = GND 1.170 1.20 1.230 V
Feedback Voltage Accuracy
(Adjustable) VFB FB = CSN 490 500 510 mV
Load-Regulation Error VCSP - VCSN = 45mV -2.5 -2 %
Line-Regulation Error VIN = 1V to 5.5V 0.01 %
FB Input Bias Current IFB VFB = 0.6V -1 +1 µA
CSN Input Bias Current ICSN VCSN = 1.6V 50 100 µA
Output high VCC -
1.0
VCC -
0.7
DRV Output Voltage Swing VDRV
Output low 0.7 1.0
V
DRV Slew Rate CDRV = 40nF 0.2 V/µs
Quiescent Supply Current (VCC)I
CC FB forced above the regulation point,
VCSN = 1.6V 1.5 3 mA
Quiescent Supply Current (VIN)I
IN FB forced above the regulation point,
VCSN = 1.6V 510µA
Shutdown Supply Current (VCC)SS/EN = GND 35 70 µA
Shutdown Supply Current (VIN)SS/EN = GND 5 10 µA
FAULT DETECTION
Thermal-Shutdown Threshold TSHDN Rising edge, 20°C hysteresis +140 °C
VCC Undervoltage-Lockout
Threshold Rising edge, 15mV hysteresis 4.2 4.45 V
Current-Limit Threshold VCSLIMIT PLIM = GND 45 50 57 mV
Power-Limit Threshold VPWRLIMIT Rising edge 0.96 1.0 1.04 V
Power-Limit Conversion Gain KPLIM VCSP - VCSN = 30mV, VCSN = 0.5V,
VIN = 3.5V 155 200 233 µA/V2
Power-Limit Conversion Gain
Variation
VCSP - VCSN = 25mV to 45mV, VCSN = 0.5V,
VIN = 2V to 4.5V ±12 %
MAX8704
High-Current, Low-Voltage Linear Regulator
with Power-Limited, External MOSFET
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 2.5V, VCC = 5.0V, PLIM = FB = GND, CSP = CSN, SS/EN floating, TA= 0°C to +85°C, unless otherwise noted. Typical values
are at TA= +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
PLIM Output Current VCSP - VCSN = 30mV, VIN = 3.5V,
VCSN = 0.5V 14 18 21 µA
PLIM Output Current Offset CSP = CSN, VIN = 1.0V, VCSN = 0.5V 0.5 2 µA
CSP Input Current VCSN = 1.50V, VCSP = 1.55V -1 +1 µA
SOFT-START AND SHUTDOWN
Soft-Start Charge Current ISS VSS/EN = 1.5V 4 5 6 µA
SS/EN Full Current Threshold 2V
SS/EN Enable Threshold Rising edge 0.4 0.5 0.6 V
SS/EN Discharge Current ISS/EN VSS/EN = 1.5V, thermal fault, bias fault
condition, or UVLO 10 20 µA
Discharge-Mode On-Resistance RCSN 10
INPUTS AND OUTPUTS
PGOOD Trip Threshold With respect to error-comparator threshold,
2% hysteresis -10 -8 -6 %
PGOOD Startup Delay 135ms
PGOOD Output Low Voltage ISINK = 4mA 0.3 V
PGOOD Leakage Current IPGOOD VFB = 1.0V (PGOOD high impedance),
PGOOD forced to 5V -1 +1 µA
ELECTRICAL CHARACTERISTICS
(VIN = 2.5V, VCC = 5.0V, PLIM = FB = GND, CSP = CSN, SS/EN floating, TA= -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN MAX UNITS
VIN 1.0 5.5
Input Voltage Range VCC 4.5 5.5 V
FB = VCC 1.455 1.545
Preset Output Voltage
(Fixed) VOUT FB = GND 1.158 1.242 V
Feedback Voltage Accuracy
(Adjustable) VFB FB = CSN 485 515 mV
Output high VCC -
1.1
DRV Output Voltage Swing VDRV
Output low 1.1
V
Quiescent Supply Current (VCC)I
CC FB forced above the regulation point,
VCSN = 1.6V 3mA
Quiescent Supply Current (VIN)I
IN FB forced above the regulation point,
VCSN = 1.6V 10 µA
Shutdown Supply Current (VCC)SS/EN = GND 70 µA
Shutdown Supply Current (VIN)SS/EN = GND 10 µA
MAX8704
High-Current, Low-Voltage Linear Regulator
with Power-Limited, External MOSFET
4_______________________________________________________________________________________
Typical Operating Characteristics
(Circuit of Figure 1, VOUT = 1.5V, TA= +25°C, unless otherwise noted.)
-3.0
-2.0
-2.5
-1.0
-1.5
-0.5
0
021345
OUTPUT VOLTAGE DEVIATION
vs. LOAD CURRENT
MAX8704 toc01
LOAD CURRENT (A)
VOUT DEVIATION (%)
VIN = 3.3V VIN = 1.8V
0
0.3
0.9
0.6
1.2
1.5
021345
PLIM VOLTAGE vs. LOAD CURRENT
MAX8704 toc02
LOAD CURRENT (A)
PLIM VOLTAGE (V)
VIN = 3.3V
POWER LIMIT
VIN = 2.5V
VIN = 1.8V
CURRENT LIMIT
0
0.4
0.2
1.0
0.8
0.6
1.6
1.4
1.2
1.8
13245
OUTPUT VOLTAGE
vs. INPUT VOLTAGE
MAX8704 toc03
INPUT VOLTAGE (V)
VOUT (V)
10mA LOAD
1A LOAD
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 2.5V, VCC = 5.0V, PLIM = FB = GND, CSP = CSN, SS/EN floating, TA= -40°C to +85°C, unless otherwise noted.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN MAX UNITS
FAULT DETECTION
VCC Undervoltage-Lockout
Threshold Rising edge, 15mV hysteresis 4.45 V
Current-Limit Threshold VCSLIMIT PLIM = GND 43 60 mV
Power-Limit Threshold VPWRLIMIT Rising edge 0.90 1.10 V
PLIM Output Current VCSP - VCSN = 30mV, VIN = 3.5V,
VCSN = 0.5V 13 22 µA
SOFT-START AND SHUTDOWN
Soft-Start Charge Current ISS VSS/EN = 0 4 6 µA
SS/EN Enable Threshold Rising edge 0.4 0.6 V
INPUTS AND OUTPUTS
PGOOD Trip Threshold With respect to error-comparator threshold,
2% hysteresis -11 -5 %
PGOOD Startup Delay 0.5 5.5 ms
PGOOD Output Low Voltage ISINK = 4mA 0.3 V
Note 1: Specifications to -40°C are guaranteed by design, not production tested.
MAX8704
High-Current, Low-Voltage Linear Regulator
with Power-Limited, External MOSFET
_______________________________________________________________________________________ 5
0
0.3
0.9
0.6
1.2
1.5
12345
PLIM VOLTAGE
vs. INPUT VOLTAGE
MAX8704 toc04
INPUT VOLTAGE (V)
PLIM VOLTAGE (V)
OUTPUT SHORT
1A LOAD
10mA LOAD
0
1
3
2
4
5
12345
5V BIAS SUPPLY CURRENT
vs. INPUT VOLTAGE
MAX8704 toc05
INPUT VOLTAGE (V)
BIAS SUPPLY CURRENT (mA)
1A LOAD
DROPOUT
POWER LIMIT
0
0.5
1.5
1.0
2.0
2.5
12345
MOSFET POWER DISSIPATION
vs. DRAIN-TO-SOURCE VOLTAGE
MAX8704 toc06
VDS (V)
POWER (W)
1A LOAD
OUTPUT SHORT
0
2
1
4
3
5
6
0 1.0 1.50.5 2.0 2.5 3.0
OUTPUT CURRENT LIMIT
vs. SS/EN VOLTAGE
MAX8704 toc07
SS/EN VOLTAGE (V)
CURRENT LIMIT (A)
200µs/div
SOFT-START
(CSS = 10nF)
2V
1V
B
A
C
MAX8704 toc08
1A
0
0
1.5V
0
A. EN/SS, 1V/div
B. LDO OUTPUT, 1V/div
1.5 LOAD, VIN = 1.8V
C. FET CURRENT, 1A/div
1ms/div
SHUTDOWN SEQUENCE
(NO LOAD)
5V
0
B
A
C
MAX8704 toc09
1A
0
5V
0
0
A. PGOOD, 5V/div
B. EN/SS, 5V/div
NO LOAD, CSS = 1nF, VIN = 1.8V
1.5V
D
C. LDO OUTPUT, 1V/div
D. FET CURRENT, 2A/div
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VOUT = 1.5V, TA= +25°C, unless otherwise noted.)
MAX8704
High-Current, Low-Voltage Linear Regulator
with Power-Limited, External MOSFET
6_______________________________________________________________________________________
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VOUT = 1.5V, TA= +25°C, unless otherwise noted.)
40µs/div
LINE TRANSIENT
(1.8V TO 2.5V)
2.5V
3.5V
B
A
C
MAX8704 toc13
1.50V
1.49V
3.3V
1.51V
A. INPUT: 1.8V TO 2.5V, 0.5V/div
B. DRV, 200mV/div
ROUT = 1.5
C. OUTPUT, 10mV/div
2.0V
1.5V
GAIN AND PHASE vs. FREQUENCY
MAX8704 toc14
PHASE
0.001 0.01 0.1 1 10
180°
90°
0°
-90°
-180°
GAIN (dB)
0.001 0.01 0.1 1 10
FB = CSN, VOUT = 0.5V, VIN = 1.0V
COUT = 2 x 22µF 1206 CERAMIC, IOUT = 0.5A
FREQUENCY (MHz)
60
40
20
0
-20
GAIN AND PHASE vs. FREQUENCY
MAX8704 toc15
PHASE
0.001 0.01 0.1 1 10
180°
90°
0°
-90°
-180°
GAIN (dB)
0.001 0.01 0.1 1 10
FB = CSN, VOUT = 0.5V, VIN = 1.0V
COUT = 100µF 70m SANYO 4TPB100M, IOUT = 0.5A
FREQUENCY (MHz)
60
40
20
0
-20
FREQUENCY (MHz)
PSRR
40
-80
MAX8704 toc16
-120
0
-40
0.001 0.01 0.1 1 10
FB = VCC, VOUT = 1.5V, VIN = 2.5V
COUT = 2 x 22µF 1206 CERAMIC, IOUT = 0.5A
PSRR (dB)
20µs/div
3A LOAD TRANSIENT
(IRF7401)
3.5A
3.0V
B
A
C
MAX8704 toc11
1.50V
1.45V
1.8V
1.7V
A. LOAD: 0.5A - 3.5A, 3A/div
B. DRV, 0.5V/div
VIN = 1.8V
D
C. INPUT, 100mV/div
D. OUTPUT, 50mV/div
0.5A
3.5V
20µs/div
3A LOAD TRANSIENT
(FDS6570A)
3.5A
2.5V
B
A
C
MAX8704 toc12
1.50V
1.45V
1.8V
1.7V
A. LOAD: 0.5A - 3.5A, 3A/div
B. DRV, 0.5V/div
VIN = 1.8V
D
C. INPUT, 100mV/div
D. OUTPUT, 50mV/div
0.5A
3.0V
4ms/div
POWER LIMIT
5V
0B
A
C
MAX8704 toc10
4A
0
0
0
A. EN/SS, 2V/div
B. PLIM, 0.5V/div
0.4 LOAD, CSS = 10nF, VIN = 1.8V,
RPLIM = 200k, CPLIM = 0.1µF
1.5V
D
C. LDO OUTPUT, 1V/div
D. FET CURRENT, 5A/div
MAX8704
High-Current, Low-Voltage Linear Regulator
with Power-Limited, External MOSFET
_______________________________________________________________________________________ 7
Detailed Description
The MAX8704 is a low-dropout, external n-channel
MOSFET linear regulator for low-voltage notebook
power supplies. The regulator uses two separate sup-
plies—the notebook’s 5V bias supply (VCC) for driving
the external n-channel MOSFET, and the lowest system
supply available for the power input (VIN). By using
separate bias and power inputs, the MAX8704 maxi-
mizes the gate drive while minimizing the power loss.
The regulator provides an accurate (-2% typ load regu-
lation) output that delivers up to 5A for powering the
low-voltage (1.0V, 1.2V, 1.5V, and 1.8V) supplies
required by notebook chipsets.
Figure 1 shows the standard application circuit, and
Figure 2 shows the functional diagram. The MAX8704
standard application circuit delivers up to 5A and oper-
ates with input voltages up to 5.5V, but not simultane-
ously. Continuous high output currents can only be
achieved when the input-to-output differential voltage is
low (Figure 1).
5.0V Bias Supply (VCC)
The VCC input powers the control circuitry and provides
the gate drive to the external n-channel MOSFET. This
improves efficiency by allowing VIN to be powered from
a low-voltage system supply. Power VCC from a well-
regulated 5V supply. Current drawn from the VCC sup-
ply remains relatively constant with variations in VIN and
Pin Description
PIN NAME FUNCTION
1V
IN Input Voltage Sense. The MAX8704 senses the voltage across the external MOSFET (VIN - VCSN) to
determine the MOSFET’s power dissipation.
2V
CC Analog and Driver Supply Input. Connect to the system supply voltage (+5.0V). Bypass VCC to
analog ground with a 1µF or greater ceramic capacitor.
3PGOOD
Open-Drain Power-Good Output. PGOOD is low when the output voltage is more than 8% (typ) below
the nominal regulation voltage. PGOOD is also pulled low during soft-start and in shutdown.
Approximately 3ms (typ) after the LDO reaches the regulation voltage, PGOOD becomes high
impedance as long as the output remains in regulation.
4PLIM
Power-Limit Adjustment. The PLIM output sources a current directly proportional to the MOSFET’s
power dissipation. If the PLIM voltage exceeds the 1.0V power-limit threshold, the regulator reduces
the power dissipation by folding back the current limit. An external resistor between PLIM and GND
sets the maximum MOSFET’s power dissipation. Additionally, an external capacitor filters the PLIM
voltage, allowing short high-power transients to occur periodically.
5SS/EN
Soft-Start and Enable Input. Connect SS/EN to an open-drain output. When SS/EN is pulled low, the
linear regulator shuts down and pulls the output to ground. Connect a soft-start capacitor from SS/EN
to GND to slowly ramp up the current limit during startup (see the Soft-Start and Enable section).
6FB
Feedback Input. Connect FB to VCC for a fixed 1.5V output, or connect FB to GND for a fixed 1.2V
output. For an adjustable output, connect FB to a resistive divider from the output voltage. The FB
regulation level is 0.5V.
7CSN
Negative Current-Sense Input and Output Sense Input. Connect to the negative terminal of the
current-sense element as shown in Figure 1. CSN serves as the feedback input in fixed-voltage mode
(FB = GND or VCC). When the MAX8704 is disabled, the output is discharged through a 10 resistor
to GND.
8CSP
Positive Current-Sense Input. Connect to the positive terminal of the current-sense element as shown
in Figure 1. The MAX8704 driver reduces the gate voltage when the current-limit threshold is
exceeded.
9GND Ground
10 DRV Gate Drive for the External n-Channel MOSFET
MAX8704
High-Current, Low-Voltage Linear Regulator
with Power-Limited, External MOSFET
8_______________________________________________________________________________________
load current. Bypass VCC with a 1µF or greater ceramic
capacitor as close to the MAX8704 as possible.
Undervoltage Lockout (UVLO)
The VCC input undervoltage-lockout (UVLO) circuitry
ensures that the regulator starts up with a gate-drive
voltage that can adequately bias the external n-channel
MOSFET. The UVLO threshold is 4.2V (typ), and VCC
must remain above this level for proper operation.
Power-Supply Input (VIN)
The power input supply (VIN) sources the current
required by the linear regulator’s output (VOUT). VIN
connects to the drain of the external n-channel power
MOSFET. VIN may be as low as 1.0V, minimizing the
power dissipation across the n-channel MOSFET.
Bypass VIN with a 10µF or greater capacitor as close to
the external MOSFET as possible. To avoid input volt-
age sag during a load transient, the input supply
should provide a low source impedance. If a high-
impedance source is used, additional input bulk
capacitance is required near the MAX8704.
Soft-Start and Enable (SS/EN)
As shown in Figure 2, a capacitor on SS/EN allows a
gradual buildup of the MAX8704 current limit, reducing
the initial inrush current peaks at startup. The input sup-
ply UVLO and thermal-overload fault trigger the internal
SS/EN pulldown resistor (RSS/EN = 1k), automatically
forcing the MAX8704 into shutdown. When properly
powered (VCC above UVLO), the MAX8704 charges the
soft-start capacitor with a constant 5µA current source
(see the Soft-Start Capacitor Selection section). Once
the SS/EN voltage rises above 0.5V, the linear regulator
CSS
0.01µF
RPLIM
200k
CPLIM
0.1µF
R2
10k
R1
20k
COUT
2 x 22µF
OUTPUT (VOUT)
1.5V AT 5A (MAX)
RSENSE
10m
N1
IRF7401
CIN2
10µF
CIN1
100µF
INPUT
1.8V TO 5.5V
DRV
VIN
VCC
PGOOD
SS/EN PLIM
GND
FB
CSN
CSP
5V BIAS
SUPPLY
C1
1.0µFR3
100k
POWER-
GOOD
OFF
ON
MAX8704
Figure 1. Standard Application Circuit
RDS(ON) (m)
MOSFET 2.5V 1.8V
VDS
(V)
CISS*
(nF) PACKAGE VENDOR
FDS6574A 7 9 20 8 SO-8 (2.5W) Fairchild
Si4836DY 4 5 12 7 SO-8 (2.5W) Siliconix (Vishay)
Table 1. MOSFET Selection (>1.5V Output-Voltage Applications)
RDS(ON) (m)
MOSFET 4.5V 2.5V
VDS
(V)
CISS*
(nF) PACKAGE VENDOR
IRF7401 22 30 20 2.7 SO-8 (2.5W) International Rectifier
NDS8425 22 28 20 1.4 SO-8 (2.5W) Fairchild
FDS6572A 6 8 20 6.2 SO-8 (2.5W) Fairchild
FDS7064N 7.5 30 3.7 Bottomless SO-8 (3W) Fairchild
Si9426DY 13.5 16 20 3.5 SO-8 (2.5W) Siliconix (Vishay)
Si4866DY
Si7882DP 5.5 8 12 3.2 SO-8 (2.5W)
PowerPAK (5W) Siliconix (Vishay)
Table 2. MOSFET Selection (0.5V to 1.5V Output-Voltage Applications)
*CISS when VDS = 1V
*CISS when VDS = 1V
MAX8704
High-Current, Low-Voltage Linear Regulator
with Power-Limited, External MOSFET
_______________________________________________________________________________________ 9
is enabled. As the voltage on SS/EN continues to
increase, the current-limit threshold slowly ramps up,
effectively limiting the input inrush current during
power-up (Figure 3). The MAX8704 reaches the full cur-
rent limit when the SS/EN voltage exceeds 2V.
When SS/EN is pulled low—either by an external open-
drain output or by the internal power-OK (POK) lockout
signal—the MAX8704 pulls the driver (DRV) low and dis-
charges the output through a 10discharge FET.
Drive SS/EN with a push/pull output to bypass soft-start.
Output Voltage and Dual Mode™ Feedback
The MAX8704’s Dual-Mode operation allows the selec-
tion of two common preset voltages without requiring
external components. Connect FB to VCC for a fixed
1.5V output, or connect FB to GND for a fixed 1.2V out-
put. Alternatively, the output voltage can be adjusted
using a resistive voltage-divider (Figure 2). The adjust-
ed output voltage is:
VV R
R
OUT FB
=+
11
2
MAX8704
CONTROL
BLOCK
CURRENT LIMIT
(FIGURE 3)
PLIM
MULTIPLIER
THERMAL
SHDN
SHDN
0.91 x
REF FB
SS/EN
PGOOD
LOGIC
SUPPLY
5V BIAS
SUPPLY
INPUT
1.0V TO 5.5V
POWER-
GOOD
OFF ON
5µA
0.5V
CSS
VCC
VIN DRV
N1
CSP CSN
OUTPUT
(VOUT)
R1
R2
CPLIM
RSENSE
RPLIM
C1
CIN COUT
POK
1k
10
DUAL-MODE
FEEDBACK
DELAY
LOGIC
0.5V
GND
PLIM
FB
ERROR
AMP
SHDN
R3
RSS/EN
Figure 2. Functional Diagram
Dual Mode is a trademark of Maxim Integrated Products, Inc.
MAX8704
High-Current, Low-Voltage Linear Regulator
with Power-Limited, External MOSFET
10 ______________________________________________________________________________________
where the feedback threshold (VFB) equals 0.5V, as
specified in the Electrical Characteristics table. The
minimum adjustable output voltage is 0.5V (FB = CSN).
The maximum adjustable output voltage is limited by
the gate driver’s output-voltage swing range (see the
Electrical Characteristics table) and the gate threshold
of the selected n-channel MOSFET.
Fault Protection
Current Limit
The MAX8704 features a current limit (Figure 3) that
monitors the voltage across the current-sense resistor,
typically limiting the CSP to CSN voltage to 50mV.
When the CSP to CSN voltage reaches the current-limit
threshold, the MAX8704 regulates the output current
rather than the output voltage. During startup, the soft-
start circuit ramps the current limit to reduce the input
surge current (see the Soft-Start Capacitor Selection
section).
MOSFET Power-Limit Protection
The MAX8704 includes a proprietary power-limit circuit
to protect the external n-channel MOSFET, especially
under short-circuit conditions. The MAX8704 uses an
internal multiplier circuit to generate an output current
(IPLIM) that is directly proportional to the MOSFET
power dissipation. When the PLIM voltage exceeds
1.0V, the MAX8704 folds back the current limit to
reduce the power dissipation across the external com-
ponents (Figure 3). The power limit allows an output
short for an indefinite period of time without damaging
the MAX8704 or its external components.
Thermal-Overload Protection
Thermal-overload protection prevents the MAX8704
from overheating. When the junction temperature
exceeds +140°C, the linear regulator automatically
pulls PGOOD low and enters shutdown—the MAX8704
pulls SS/EN low with an internal 1kpulldown resistor.
This disables the driver and discharges the output,
allowing the device to cool. Once the junction tempera-
ture cools by 20°C, the thermal protection circuit
releases the SS/EN input, allowing the MAX8704 to
automatically power up using the soft-start sequence. A
continuous thermal-overload condition results in a
pulsed output.
Power-Good
The MAX8704 provides an open-drain PGOOD output
that goes high 3ms (typ) after the output initially reach-
es regulation. PGOOD transitions low immediately after
the output voltage drops below 92% (typ) of the nomi-
nal regulation voltage, or when the MAX8704 enters
shutdown. Connect a pullup resistor from PGOOD to
VCC for a logic-level output. Use a 100kresistor to
minimize current consumption.
Design Procedure
External MOSFET Selection
The external MOSFET selection depends on the gate
threshold voltage, input-to-output voltage, and package
power dissipation. The MAX8704 uses an external n-
channel MOSFET controlled by a 5V driver, so the max-
imum gate-to-source voltage across the MOSFET
(VGS(MAX)) is equivalent to:
VGS(MAX) = VDRV(MAX) - VCSP
where the maximum drive voltage is approximately
VCC - 1V. The selected MOSFET’s on-resistance must
be low enough to support the minimum input-to-output
differential voltage (dropout voltage) and maximum
load required by the application:
For output voltages less than 1.5V, standard MOSFETs
that provide on-resistance specifications with 2.5V
gate-to-source voltages are sufficient. For output volt-
ages greater than 1.5V, use low-threshold MOSFETs
RVV V
I
DS ON MIN IN MIN CSLIMIT OUT
OUT MAX
()( ) ()
()
=−−
CURRENT
LIMIT
VCC
PLIM
SS/EN
TO CONTROL
BLOCK
1V
2V
CSN
CSP
Figure 3. Current-Limit Functional Diagram
MAX8704
High-Current, Low-Voltage Linear Regulator
with Power-Limited, External MOSFET
______________________________________________________________________________________ 11
that provide on-resistance specifications with a 1.8V
gate-to-source voltage.
MOSFET Power Dissipation
The maximum power dissipation of the MAX8704
depends on the thermal resistance of the external n-
channel MOSFET package, the board layout, the tem-
perature difference between the die and ambient air,
and the rate of airflow. The power dissipated in the
MOSFET is:
PDIS = IOUT x (VIN - VCSP)
The maximum power dissipation allowed is determined
by the following formula:
where TJ(MAX) is the maximum junction temperature
(+150°C), TAis the ambient temperature, θJC is the ther-
mal resistance from the die junction to the package
case, and θCA is the thermal resistance from the case
through the PC board, copper traces, and other materi-
als to the surrounding air. Standard SO-8 MOSFETs are
typically rated for 2W, while new power packages
(PowerPAK, DirectFET, etc.) can achieve power dissipa-
tion ratings as high as 5W. For optimum power dissipa-
tion, use a large ground plane with good thermal contact
to ground and use wide input and output traces. Extra
copper on the PC board increases thermal mass and
reduces the thermal resistance of the board.
Setting the Current Limit
The current-sense voltage threshold is preset to 50mV
(typ), so the achievable peak source current (IPEAK) is
determined by the current-sense resistor. The current-
sense resistor can be determined by:
RSENSE = VCSLIMIT / IPEAK
For the best current-sense accuracy, use a 1% current-
sense resistor between the source of the MOSFET and
the output.
Setting the Power Limit
The MAX8704 includes a unique power-limit protection
circuit that limits the maximum power dissipation in the
external MOSFET. An external resistor (RPLIM) adjusts the
actual power limit as defined by the following equation:
where RSENSE is the current-sense resistor, PLIMIT is the
maximum MOSFET power dissipation, the power-limit
conversion gain (KPLIM) equals 200µA/V2, and the
power-limit threshold (VPWRLIMIT) equals 1.0V. An exter-
nal capacitor (CPLIM) adjusts the power-limit time con-
stant (τPLIM = RPLIM x CPLIM), allowing short high-power
transients while protecting against thermal stress.
Short PLIM to ground to disable the power-limit protection.
Input Capacitor Selection (CIN)
Typically, the linear regulator is powered from the out-
put of a step-down regulator, effectively providing a
low-impedance source for the MAX8704. Under these
conditions, a local 10µF or greater ceramic capacitor is
sufficient for most applications. If the linear regulator is
connected to a high-impedance input, low-ESR poly-
mer capacitors are recommended on the input.
Output Capacitor Selection (COUT)
The MAX8704 requires 10µF/A or greater ceramic
capacitor for stable operation and optimized load-tran-
sient response. For higher capacitance values, the reg-
ulator remains stable with low-ESR, polymer output
capacitors as shown in the Output Capacitance vs.
Load Current graph (see Figure 4). When selecting the
output capacitor to provide good transient response,
the capacitor’s ESR should be minimized:
VOUT = IOUT x ESR
where IOUT is the maximum peak-to-peak load current
step, and VOUT is the transient output-voltage tolerance.
RV
PKR
PLIM PWRLIMIT
LIMIT PLIM SENSE
=××
RTT
DIS MAX J MAX A
JC CA
() ()
=
+θθ 021345
OUTPUT CAPACITANCE
vs. LOAD CURRENT
LOAD CURRENT (A)
COUT (µF)
10
30
20
40
50
VIN > VOUT + 0.2V
Figure 4. Output Capacitance vs. Load Current
MAX8704
High-Current, Low-Voltage Linear Regulator
with Power-Limited, External MOSFET
12 ______________________________________________________________________________________
Using larger output capacitance can improve efficiency
in applications where the load current changes rapidly.
The output capacitor acts as a reservoir for the rapid
transient currents, reducing the peak current supplied
by the input supply and effectively lowering the I2R
power loss.
Soft-Start Capacitor Selection (CSS)
A capacitor (CSS) connected from SS/EN to GND caus-
es the MAX8704 output current to slowly rise during
startup, reducing stress on the input supply. The rise
time to full current limit (tSS) is determined by:
tSS = CSS x 1.5V / ISS
where ISS = 5µA is the soft-start current. Typical capac-
itor values between 1nF to 100nF are sufficient. Since
the regulator ramps the current-limit threshold, the
actual output-voltage slew rate depends on the load
current and output capacitance.
Noise, PSRR, and Transient Response
The MAX8704 operates with low dropout voltage and
low quiescent current in notebook computers while
maintaining good noise, transient response, and AC
rejection. See the Typical Operating Characteristics for
a graph of PSRR vs. Frequency. Improved supply-noise
rejection and transient response can be achieved by
increasing the values of the input and output capaci-
tors. Use passive filtering techniques when operating
from noisy sources.
The MAX8704 load-transient response graphs (see the
Typical Operating Characteristics) show two compo-
nents of the output response: a DC load regulation and
the transient response. A typical transient response for
a step change in the load current from 0.5A to 3.5A is
25mV. Lowering the output impedance—increasing the
output capacitor’s value and/or decreasing the ESR—
attenuates the output undershoot and overshoot.
PC Board Layout Guidelines
The MAX8704 requires proper layout to achieve the
intended output power level and regulation characteris-
tics. Proper layout involves the use of a ground plane,
appropriate component placement, and correct routing
of traces using appropriate trace widths (Figure 5).
Minimize high-current ground loops: connect the
ground of the MAX8704, the input capacitor, and the
output capacitor together at one point.
Minimize parasitic inductance: keep the input
capacitor, external MOSFET, and output capacitor
close together. Route the ground plane directly
under the input and output power traces/planes.
To optimize performance and power dissipation, a
ground plane is essential. Dedicated ground plane
layers reduce trace inductance, ground imped-
ance, and noise coupling (ground shield) between
layers, and improve thermal conductivity throughout
the board.
Connect the input filter capacitor less than 10mm
from the MOSFET. The connecting copper trace car-
ries large currents and must be at least 5mm wide.
Use as much copper as necessary to decrease the
thermal resistance of the MOSFET. In general, more
copper provides better heatsinking capabilities.
Chip Information
TRANSISTOR COUNT: 786
PROCESS: BiCMOS
CIN
5V BIAS
GROUND
COUT
OUTPUT
MAX8704
INPUT
GROUND
GROUND
RSENSE
Figure 5. Recommended MAX8704 Layout
MAX8704
High-Current, Low-Voltage Linear Regulator
with Power-Limited, External MOSFET
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
13 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
©2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
10LUMAX.EPS
PACKAGE OUTLINE, 10L uMAX/uSOP
1
1
21-0061 I
REV.DOCUMENT CONTROL NO.APPROVAL
PROPRIETARY INFORMATION
TITLE:
TOP VIEW
FRONT VIEW
1
0.498 REF
0.0196 REF
S
SIDE VIEW
α
BOTTOM VIEW
0.037 REF
0.0078
MAX
0.006
0.043
0.118
0.120
0.199
0.0275
0.118
0.0106
0.120
0.0197 BSC
INCHES
1
10
L1
0.0035
0.007
e
c
b
0.187
0.0157
0.114
H
L
E2
DIM
0.116
0.114
0.116
0.002
D2
E1
A1
D1
MIN
-A
0.940 REF
0.500 BSC
0.090
0.177
4.75
2.89
0.40
0.200
0.270
5.05
0.70
3.00
MILLIMETERS
0.05
2.89
2.95
2.95
-
MIN
3.00
3.05
0.15
3.05
MAX
1.10
10
0.6±0.1
0.6±0.1
00.50±0.1
H
4X S
e
D2
D1
b
A2 A
E2
E1 L
L1
c
α
GAGE PLANE
A2 0.030 0.037 0.75 0.95
A1
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