MIC261201
28V, 12A Hyper Speed Control™
Synchronous DC/DC Buck Regulator
SuperSwitcher II™
Hyper Speed Control, SuperSwitcher II, and Any Capacitor are trademarks of Micrel, Inc.
MLF and MicroLeadFrame are registered trademarks of Amkor Technology, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
General Description
The Micrel MIC261201 is a constant-frequency, synchronous
buck regulator featuring a unique adaptive on-time control
architecture. The MIC261201 operates over an input supply
range of 4.5V to 28V and provides a regulated output of up to
12A of output current. The output voltage is adjustable down
to 0.8V with a guaranteed accuracy of ±1%, and the device
operates at a switching frequency of 600kHz.
Micrel’s Hyper Speed Control™ architecture allows for ultra-
fast transient response while reducing the output capacitance
and also makes (High VIN)/(Low VOUT) operation possible.
This adaptive tON ripple control architecture combines the
advantages of fixed-frequency operation and fast transient
response in a single device.
The MIC261201 offers a full suite of protection features to
ensure protection of the IC during fault conditions. These
include undervoltage lockout to ensure proper operation
under power-sag conditions, internal soft-start to reduce
inrush current, foldback current limit, “hiccup mode” short-
circuit protection and thermal shutdown. An open-drain
Power Good (PG) pin is provided.
All support documentation can be found on Micrel’s web
site at: www.micrel.com.
Features
• Hyper Speed Control™ architecture enables
- High Delta V operation (VIN = 28V and VOUT = 0.8V)
- Small output capacitance
• 4.5V to 28V voltage input
• 12A output current capability, up to 95% efficiency
• Adjustable output from 0.8V to 5.5V
• ±1% feedback accuracy
• Any Capacitor® Stable – zero-to-high ESR
• 600kHz switching frequency
• No external compensation
• Power Good (PG) output
• Foldback current-limit and “hiccup mode” short-circuit
protection
• Supports safe startup into a pre-biased load
• –40°C to +125°C junction temperature range
• 28-pin 5mm × 6mm MLF® package
Applications
• Distributed power systems
• Communications/networking infrastructure
• Set-top box, gateways and routers
• Printers, scanners, graphic cards and video card
___________________________________________________________________________________________________________
Typical Application
Ef fici ency (V
IN
= 12V )
vs. O utput Current
50
55
60
65
70
75
80
85
90
95
100
03691215
O UT P UT CURRE NT (A )
EFFI CI ENCY ( % )
5.0V
3.3V
2.5V
1.8V
1.5V
1.2V
1.0V
0.9V
0.8V
V
IN
= 12V
July 2011 M9999-071311-A
Micrel, Inc. MIC261201
July 2011 2 M9999-071311-A
Ordering Information
Part Number Voltage Switching Frequency Junction Temperature
Range Package Lead Finish
MIC261201YJL Adjustable 600kHz −40°C to +125°C 28-Pin 5mm × 6mm MLF® Pb-Free
Pin Configur ation
28-Pin 5mm × 6mm MLF® (YJL)
Pin Description
Pin Number Pin Name Pin Function
1 PVDD
5V Internal Linear Regulator (Output): PVDD supply is the power MOSFET gate drive supply voltage
and created by internal LDO from VIN. When VIN < +5.5V, PVDD should be tied to PVIN pins. A 2.2µF
ceramic capacitor from the PVDD pin to PGND (pin 2) must be place next to the IC.
3 NC No Connect.
4, 9, 10, 11,
12 SW
Switch Node (Output): Internal connection for the high-side MOSFET source and low-side MOSFET
drain. Due to the high speed switching on this pin, the SW pin should be routed away from sensitive
nodes.
2, 5, 6, 7, 8,
21 PGND
Power Ground. PGND is the ground path for the MIC26903 buck converter power stage. The
PGND pins connect to the low-side N-Channel internal MOSFET gate drive supply ground, the
sources of the MOSFETs, the negative terminals of input capacitors, and the negative terminals of
output capacitors. The loop for the power ground should be as small as possible and separate from
the Signal ground (SGND) loop.
13,14,15,
16,17,18,19 PVIN
High-Side N-internal MOSFET Drain Connection (Input): The PVIN operating voltage range is from
4.5V to 28V. Input capacitors between the PVIN pins and the power ground (PGND) are required
and keep the connection short.
20 BST
Boost (Output): Bootstrapped voltage to the high-side N-channel MOSFET driver. A Schottky diode
is connected between the PVDD pin and the BST pin. A boost capacitor of 0.1F is connected
between the BST pin and the SW pin. Adding a small resistor at the BST pin can slow down the turn-
on time of high-side N-Channel MOSFETs.
22 CS
Current Sense (Input): The CS pin senses current by monitoring the voltage across the low-side
MOSFET during the OFF-time. The current sensing is necessary for short circuit protection. In order
to sense the current accurately, connect the low-side MOSFET drain to SW using a Kelvin
connection. The CS pin is also the high-side MOSFET’s output driver return.
Micrel, Inc. MIC261201
July 2011 3 M9999-071311-A
Pin Description (Continued)
Pin Number Pin Name Pin Function
23 SGND
Signal ground. SGND must be connected directly to the ground planes. Do not route the SGND pin to
the PGND Pad on the top layer, see PCB layout guidelines for details.
24 FB
Feedback (Input): Input to the transconductance amplifier of the control loop. The FB pin is regulated
to 0.8V. A resistor divider connecting the feedback to the output is used to adjust the desired output
voltage.
25 PG
Power Good (Output): Open Drain Output. The PG pin is externally tied with a resistor to VDD. A high
output is asserted when VOUT > 92% of nominal.
26 EN
Enable (input): A logic level control of the output. The EN pin is CMOS-compatible. Logic high =
enable, logic low = shutdown. In the off state, supply current of the device is greatly reduced (typically
5µA). The EN pin should not be left open.
27 VIN Power Supply Voltage (Input): Requires bypass capacitor to SGND.
28 VDD
5V Internal Linear Regulator (Output): VDD supply is the power MOSFET gate drive supply voltage
and the supply bus for the IC. VDD is created by internal LDO from VIN. When VIN < +5.5V, VDD
should be tied to PVIN pins. A 1.0µF ceramic capacitor from the VDD pin to PGND pins must be place
next to the IC.
Micrel, Inc. MIC261201
July 2011 4 M9999-071311-A
Absolute Maximum Ratings(1, 2)
PVIN to PGND................................................ –0.3V to +29V
VIN to PGND ....................................................–0.3V to PVIN
PVDD, VDD to PGND.......................................... -0.3V to +6V
VSW, VCS to PGND ..............................–0.3V to (PVIN +0.3V)
VBST to VSW ........................................................ –0.3V to 6V
VBST to PGND .................................................. –0.3V to 35V
VFB, VPG to PGND...............................–0.3V to (VDD + 0.3V)
VEN to PGND ........................................ –0.3V to (VIN +0.3V)
PGND to SGND ........................................... –0.3V to +0.3V
Junction Temperature .............................................. +150°C
Storage Temperature (TS).........................–65°C to +150°C
Lead Temperature (soldering, 10sec)........................ 260°C
Operating Ratings(3)
Supply Voltage (PVIN, VIN)................................. 4.5V to 28V
PVDD, VDD Supply Voltage (PVDD, VDD)......... 4.5V to 5.5V
Enable Input (VEN).................................................. 0V to VIN
Junction Temperature (TJ) ........................ –40°C to +125°C
Maximum Power Dissipation......................................Note 4
Package Thermal Resistance(4)
5mm x 6mm MLF®(θJA) .....................................28°C/W
Electrical Characteristics(5)
PVIN = VIN = VEN = 12V, VBST – VSW = 5V; TA = 25°C, unless noted. Bold values indicate –40°C ≤ TJ ≤ +125°C.
Parameter Condition Min. Typ. Max. Units
Power Supply Input
Input Voltage Range (VIN, PVIN) 4.5 28 V
Quiescent Supply Current VFB = 1.5V (non-switching) 730 1500 µA
Shutdown Supply Current VEN = 0V 5 10 µA
VDD Supply Voltage
VDD Output Voltage VIN = 7V to 28V, IDD = 40mA 4.8 5 5.4 V
VDD UVLO Threshold VDD Rising 3.7 4.2 4.5 V
VDD UVLO Hysteresis 400 mV
Dropout Voltage (VIN – VDD) IDD = 25mA 380 600 mV
DC/DC Controller
Output-Voltage Adjust Range
(VOUT) 0.8
5.5 V
Reference
0°C ≤ TJ ≤ 85°C (±1.5%) 0.792 0.8 0.808
–40°C ≤ TJ ≤ 125°C (±2.0%) 0.788 0.8 0.812 V
Load Regulation IOUT = 0A to 12A (Continuous Mode) 0.25 %
Line Regulation VIN = 4.5V to 28V 0.25 %
FB Bias Current VFB = 0.8V 50 nA
Enable Control
EN Logic Level High 1.8 V
EN Logic Level Low 0.6 V
EN Bias Current VEN = 12V 6 30 µA
Oscillator
Switching Frequency (6) V
FB = 0V 450 600 750 kHz
Maximum Duty Cycle (7) V
FB = 1.0V 82 %
Minimum Duty Cycle 0 %
Minimum Off-Time 300 ns
Micrel, Inc. MIC261201
July 2011 5 M9999-071311-A
Electrical Characteristics(5) (Continued)
PVIN = VIN = VEN = 12V, VBST – VSW = 5V; TA = 25°C, unless noted. Bold values indicate –40°C ≤ TJ ≤ +125°C.
Parameter Condition Min. Typ. Max. Units
Soft-Start
Soft-Start time 5 ms
Short-Circuit Protection
Current-Limit Threshold VFB = 0.8V, TJ = 25°C 18.75 26 33 A
Current-Limit Threshold VFB = 0.8V, TJ = 125°C 17.36 26 33 A
Short-Circuit Current VFB = 0V 6 A
Internal FETs
Top-MOSFET RDS (ON) I
SW = 3A 13 m
Bottom-MOSFET RDS (ON) I
SW = 3A 5.3 m
SW Leakage Current VEN = 0V 60 µA
VIN Leakage Current VEN = 0V 25 µA
Power Good (PG)
PG Threshold Voltage Sweep VFB from Low to High 85 92 95 %VOUT
PG Hysteresis Sweep VFB from High to Low 5.5 %VOUT
PG Delay Time Sweep VFB from Low to High 100 µs
PG Low Voltage Sweep VFB < 0.9 × VNOM, IPG = 1mA 70 200 mV
Thermal Protection
Over-Temperature Shutdown TJ Rising 160 °C
Over-Temperature Shutdown
Hysteresis 15 °C
Notes:
1. Exceeding the absolute maximum rating may damage the device.
2. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF.
3. The device is not guaranteed to function outside operating range.
4. PD(MAX) = (TJ(MAX) – TA)/ θJA, where θJA depends upon the printed circuit layout. A 5 square inch 4 layer, 0.62”, FR-4 PCB with 2oz finish copper weight
per layer is used for the θJA.
5. Specification for packaged product only.
6. Measured in test mode.
7. The maximum duty-cycle is limited by the fixed mandatory off-time tOFF of typically 300ns.
Micrel, Inc. MIC261201
July 2011 6 M9999-071311-A
Typical Characteristics
V
IN
Operat i ng Supply Current
vs. Input Voltage
0
5
10
15
20
25
30
4101622
2
I NPUT VOLTA G E ( V)
SUPPLY CURRENT (mA)
8
V
IN
Shut down Current
vs. Input Vo ltage
0
15
30
45
60
41016222
I NPUT VOLTA G E ( V)
SHUTDO W N CURRENT (µ A)
8
V
DD
Output Volt age
vs. Input Voltage
0
2
4
6
8
10
4101622
I NPUT VOLTA G E ( V)
VDD VO LTAG E (V)
V
EN
= 0V
R
EN
= Open
V
OUT
= 1.8V
I
OUT
= 0A
SWITCHING
28
V
FB
= 0.9V
I
DD
= 10mA
Feedback Vol tage
vs. I nput Voltage
0.792
0.796
0.800
0.804
0.808
41016222
I NPUT VOLTAG E ( V)
FEEDBACK VO L TAGE ( V)
8
Total Regulation
vs. Input V olt age
-1.0%
-0.5%
0.0%
0.5%
1.0%
4 1016222
I NPUT VOLTA GE (V)
TO TAL REGULATION (%)
8
V
OUT
= 1.8V
I
OUT
= 0A to 12A
Current Li m it
vs. I nput Voltage
0
5
10
15
20
25
30
4101622
I NPUT VOLTA GE (V)
CURRENT LIM IT (A)
V
OUT
= 1.8V
I
OUT
= 0A
28
V
OUT
= 1.8V
Switching Frequency
vs. Input Vo ltage
500
550
600
650
700
4 10162228
Enable Input Current
vs. I nput Vol tage
0
4
8
12
16
41016222
I NPUT VOLTA GE (V)
EN I NPUT CURRENT ( µ A)
8
PG Threshol d/V
REF
Ratio
vs. I nput Vol t age
80%
85%
90%
95%
100%
4101622
I NPUT VOLTA GE (V)
V
PG
THRESHOLD/V
REF
(%)
V
EN
= V
IN
I NPUT VOLTA GE (V)
FREQUENCY ( k Hz )
V
OUT
= 1.8V
I
OUT
= 0A
28
V
REF
= 0.7V
Micrel, Inc. MIC261201
July 2011 7 M9999-071311-A
Typical Characteristics (Continued)
V
IN
Operating Supply C urrent
vs. Temperature
0
10
20
30
40
-50 -25 0 25 50 75 100 125
TEMPERATURE ( °C)
SUPPLY CURRE NT (m A)
V
IN
= 12V
V
OUT
= 1.8V
I
OUT
= 0A
SW ITCHING
V
IN
Shut dow n Current
vs. Temperat ure
0
2
4
6
8
10
-50 -25 0 25 50 75 100 125
TEMPERATURE (° C)
SUPPLY CU RRENT ( u A)
V
IN
= 12V
I
OUT
= 0A
V
EN
= 0V
V
DD
UVLO Threshold
vs. Temperature
0
1
2
3
4
5
-50 -25 0 25 50 75 100 125
TEMPERATURE ( °C)
V
DD
THRESHOL D ( V)
Rising
Falling
Hyst
Feedback Vol tage
vs. Temperat ure
0.792
0.796
0.800
0.804
0.808
-50-25 0 255075100125
TEMPERA T URE (° C)
FEEBACK V OLTAGE ( V)
V
IN
= 12V
V
OUT
= 1.8V
I
OUT
= 0A
Load Regulati on
vs. Temperature
-0.4%
-0.2%
0.0%
0.2%
0.4%
-50 -25 0 25 50 75 100 125
TEM PERATURE (°C)
LO AD REGULATIO N (%)
V
IN
= 12V
V
OUT
= 1.8V
I
OUT
=0A to 12A
Li ne Regulation
vs. Tem perature
-0.2%
-0.1%
0.0%
0.1%
0.2%
-50 -25 0 25 50 75 100 125
TEMPERATURE (° C)
LI NE REG ULATION (%)
V
IN
= 4.5V to
28V
V
OUT
= 1.8V
Switching Frequency
vs. Temperature
500
550
600
650
700
-50 -25 0 25 50 75 100 125
TEMPERATURE ( °C)
FREQUENCY ( k Hz )
V
IN
= 12V
V
OUT
= 1.8V
I
OUT
= 0A
V
DD
vs. Te m pera ture
2
3
4
5
6
-50 -25 0 25 50 75 100 125
TEM P ERATURE ( °C)
VDD ( V)
V
IN
= 12V
V
OUT
= 1.8V
I
OUT
=0A
Current Limit
vs. Temperature
0
5
10
15
20
25
30
-50 -25 0 25 50 75 100 125
TEMPERATURE (° C)
CURRENT L IM IT ( A)
V
IN
= 12V
V
OUT
= 1.8V
Micrel, Inc. MIC261201
July 2011 8 M9999-071311-A
Typical Characteristics (Continued)
Efficiency
vs. O utput Current
50
60
70
80
90
100
02468101
O UT PUT CURRENT (A)
EFFICI E NCY (% )
2
12V
IN
24V
IN
V
OUT
= 1.8V
Feedback Vol tage
vs. O utput Current
0.792
0.796
0.800
0.804
0.808
02468101
O UT PUT CURRENT (A )
FEEDBACK VOLT AGE ( V)
2
V
IN
= 12V
V
OUT
= 1.8V
Output Voltage
vs. Output C urrent
1.782
1.787
1.791
1.796
1.800
1.805
1.810
1.814
1.819
02468101
O UT PUT CURRENT (A )
O UT PUT VOLTAGR ( V )
2
V
IN
= 12V
V
OUT
= 1.8V
Li ne Regulat ion
vs. Output Current
-1.0%
-0.5%
0.0%
0.5%
1.0%
02468101
O UTP UT CURRENT ( A)
LINE REG UL AT IO N ( %)
2
V
IN
= 4.5V to 28V
V
OUT
= 1.8V
Switching Frequency
vs. Output Current
500
550
600
650
700
0 2 4 6 8 10 12
O UT PUT CURRENT ( A)
FREQUENCY (kHz )
V
IN
= 12V
V
OUT
= 1.8V
Output V olt age (V
IN
= 5V)
vs. O u tput C urrent
3.0
3.4
3.8
4.2
4.6
5.0
0 3 6 9 12 15
O UT PUT CURREN T (A )
O UTPUT VOLTAGE ( V)
T
A
25ºC
85ºC
125ºC
V
IN
= 5V
V
FB
< 0.8V
Ef fi ci ency (VIN = 5V)
vs. Output Current
50
55
60
65
70
75
80
85
90
95
100
036912
O UT PUT CURRENT (A )
EFFICI E NCY ( % )
15
3.3V
2.5V
1.8V
1.5V
1.2V
1.0V
0.9V
0.8V
V
IN
= 5V
IC Power Dissipation (VIN = 5V)
vs. O utput C urrent
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
03691
O U TPUT CURRENT (A )
PO WER DI S SIPATIO N (W)
2
Die Tem perature* (VIN = 5V)
vs. O utput Current
0
20
40
60
80
100
02468101
O UTP UT CURRENT ( A)
DI E T EMPERATURE (° C)
V
IN
= 5V
V
OUT
= 0.8,V, 1.0V, 1.2V, 1.5V, 1.8V,2.5V, 3.3V
3.3V
2
V
IN
= 5V
V
OUT
= 1.8V
0.8V
Micrel, Inc. MIC261201
July 2011 9 M9999-071311-A
Typical Characteristics (Continued)
Ef fi ciency ( V IN = 12V )
vs. O utput Cu rrent
50
55
60
65
70
75
80
85
90
95
100
036912
O UT PUT CURRENT (A )
EFFI CI ENCY ( %)
15
5.0V
3.3V
2.5V
1.8V
1.5V
1.2V
1.0V
0.9V
0.8V
V
IN
= 12V
IC Power Dissipation (VIN = 12V)
vs. Output Current
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
03691
O U TPUT CURRENT (A )
PO WER DI S SIPATIO N (W)
2
Die Tem p erature* (V
IN
= 12V)
vs. O utput Current
0
20
40
60
80
100
02468101
O UTP UT CURRENT (A )
DI E TEMPERATURE (° C)
V
IN
= 12V
V
OUT
= 0.8,V, 1.0V, 1.2V, 1.5V, 1.8V,2.5V, 3.3V, 5.0V
5.0V
0.8V
2
V
IN
= 12V
V
OUT
= 1.8V
Ef fi ciency ( V IN = 24V )
vs. O utput C urrent
50
55
60
65
70
75
80
85
90
95
036912
O UTP UT CURRENT ( A)
EFFICIENCY ( %)
15
5.0V
3.3V
2.5V
1.8V
1.5V
1.2V
1.0V
0.9V
0.8V
V
IN
= 24V
IC Power Dissipation (VIN = 24V)
vs. Output Current
0
1
2
3
4
5
6
7
036912
Die Temperature* (V IN = 24V)
vs. O utput C urrent
0
20
40
60
80
100
120
140
02468101
OUTPUT CURRENT (A )
DI E TE MPERATURE (° C)
O UT PUT CURRENT ( A)
PO WER DI S SIPATIO N (W)
V
IN
= 24V
V
OUT
= 0.8,V, 1.0V, 1.2V, 1.5V, 1.8V,2.5V, 3.3V, 5.0V
5.0V
0.8V
2
V
IN
= 24V
V
OUT
= 1.8V
Thermal Derating*
vs. Ambient Temperat ure
0
2
4
6
8
10
12
14
16
18
-50 -25 0 25 50 75 100 125
A MBI ENT T EM P ERA T URE ( °C)
O UT PUT CURRE NT (A)
V
IN
= 5V
V
OUT
= 0.8, 1.2, 1.5V
1.5V
0.8V
Ther ma l Der ating *
vs. Ambi ent Tem perat ure
0
2
4
6
8
10
12
14
16
18
-50 -25 0 25 50 75 100 125
A MBI E NT T EMPERATURE ( °C)
O UT PUT CURRENT ( A)
V
IN
= 5V
V
OUT
= 1.8, 2.5, 3.3V
3.3V
1.8V
The rma l Derating *
vs. Ambient Temperat ure
0
2
4
6
8
10
12
14
16
18
-50 -25 0 25 50 75 100 125
AMB IENT TEMPERATURE (° C)
O UT PUT CURRENT ( A)
1.8V
0.8V
V
IN
= 12V
V
OUT
= 0.8, 1.2, 1.8V
Micrel, Inc. MIC261201
July 2011 10 M9999-071311-A
Typical Characteristics (Continued)
Thermal Derating*
vs. Ambient Temperat ure
0
2
4
6
8
10
12
14
16
18
-50 -25 0 25 50 75 100 125
A MBI ENT T EM P ERA T URE ( °C)
O UT PUT CURRE NT (A)
5V
2.5V
V
IN
= 12V
V
OUT
= 2.5, 3.3, 5V
Ther ma l Der ating *
vs. Ambi ent Tem perat ure
0
2
4
6
8
10
12
14
16
18
-50 -25 0 25 50 75 100 125
A MBI E NT T EMPERATURE ( °C)
O UT PUT CURRENT ( A)
V
IN
= 24V
V
OUT
= 0.8, 1.2, 2.5V
2.5V
0.8V
Die Temperature* : The temperature measurement was taken at the hottest point on the MIC261201 case mounted on a 5 square inch 4 layer, 0.62”,
FR-4 PCB with 2oz finish copper weight per layer, see Thermal Measurement section. Actual results will depend upon the size of the PCB, ambient
temperature and proximity to other heat emitting components.
Micrel, Inc. MIC261201
July 2011 11 M9999-071311-A
Functional Characteristics
Micrel, Inc. MIC261201
July 2011 12 M9999-071311-A
Functional Characteristics (Continued)
Micrel, Inc. MIC261201
July 2011 13 M9999-071311-A
Functional Characteristics (Continued)
Micrel, Inc. MIC261201
July 2011 14 M9999-071311-A
Functional Diagram
Figure 1. MIC261201 Block Diagram
Micrel, Inc. MIC261201
July 2011 15 M9999-071311-A
Functional Description
The MIC261201 is an adaptive ON-time synchronous
step-down DC/DC regulator with an internal 5V linear
regulator and a Power Good (PG) output. It is designed
to operate over a wide input voltage range from 4.5V to
28V and provides a regulated output voltage at up to 7A
of output current. An adaptive ON-time control scheme is
employed to obtain a constant switching frequency and
to simplify the control compensation. Over-current
protection is implemented without the use of an external
sense resistor. The device includes an internal soft-start
function which reduces the power supply input surge
current at start-up by controlling the output voltage rise
time.
Theory of Operation
The MIC261201 operates in a continuous mode as
shown in Figure 1.
Continuous Mode
In continuous mode, the output voltage is sensed by the
MIC261201 feedback (FB) pin via the voltage divider R1
and R2, and compared to a 0.8V reference voltage VREF
at the error comparator through a low gain
transconductance (gm) amplifier. If the feedback voltage
decreases and the output of the gm amplifier is below
0.8V, then the error comparator will trigger the control
logic and generate an ON-time period. The ON-time
period length is predetermined by the “FIXED tON
ESTIMATION” circuitry:
600kHzV
V
t
IN
OUT
ed)ON(estimat ×
= Eq. 1
where VOUT is the output voltage and VIN is the power
stage input voltage.
At the end of the ON-time period, the internal high-side
driver turns off the high-side MOSFET and the low-side
driver turns on the low-side MOSFET. The OFF-time
period length depends upon the feedback voltage in
most cases. When the feedback voltage decreases and
the output of the gm amplifier is below 0.8V, the ON-time
period is triggered and the OFF-time period ends. If the
OFF-time period determined by the feedback voltage is
less than the minimum OFF-time tOFF(min), which is about
300ns, the MIC261201 control logic will apply the tOFF(min)
instead. tOFF(min) is required to maintain enough energy in
the boost capacitor (CBST) to drive the high-side
MOSFET.
The maximum duty cycle is obtained from the 300ns
tOFF(min):
SS
OFF(min)S
max t
300ns
1
t
tt
D-
-== Eq. 2
where tS = 1/600kHz = 1.66μs.
It is not recommended to use MIC261201 with a OFF-
time close to tOFF(min) during steady-state operation. Also,
as VOUT increases, the internal ripple injection will
increase and reduce the line regulation performance.
Therefore, the maximum output voltage of the
MIC261201 should be limited to 5.5V and the maximum
external ripple injection should be limited to 200mV.
Please refer to “Setting Output Voltage” subsection in
Application Information for more details.
The actual ON-time and resulting switching frequency
will vary with the part-to-part variation in the rise and fall
times of the internal MOSFETs, the output load current,
and variations in the VDD voltage. Also, the minimum tON
results in a lower switching frequency in high VIN to VOUT
applications, such as 24V to 1.0V. The minimum tON
measured on the MIC261201 evaluation board is about
100ns. During load transients, the switching frequency is
changed due to the varying OFF-time.
To illustrate the control loop operation, we will analyze
both the steady-state and load transient scenarios.
Figure 2 shows the MIC261201 control loop timing
during steady-state operation. During steady-state, the
gm amplifier senses the feedback voltage ripple, which is
proportional to the output voltage ripple and the inductor
current ripple, to trigger the ON-time period. The ON-
time is predetermined by the tON estimator. The
termination of the OFF-time is controlled by the feedback
voltage. At the valley of the feedback voltage ripple,
which occurs when VFB falls below VREF, the OFF period
ends and the next ON-time period is triggered through
the control logic circuitry.
Micrel, Inc. MIC261201
July 2011 16 M9999-071311-A
Figure 2. MIC261201 Control Lo op Timing
Figure 3 shows the operation of the MIC261201 during a
load transient. The output voltage drops due to the
sudden load increase, which causes the VFB to be less
than VREF. This will cause the error comparator to trigger
an ON-time period. At the end of the ON-time period, a
minimum OFF-time tOFF(min) is generated to charge CBST
since the feedback voltage is still below VREF. Then, the
next ON-time period is triggered due to the low feedback
voltage. Therefore, the switching frequency changes
during the load transient, but returns to the nominal fixed
frequency once the output has stabilized at the new load
current level. With the varying duty cycle and switching
frequency, the output recovery time is fast and the
output voltage deviation is small in MIC261201
converter.
Figure 3. MIC261201 Load Transien t Response
Unlike true current-mode control, the MIC261201 uses
the output voltage ripple to trigger an ON-time period.
The output voltage ripple is proportional to the inductor
current ripple if the ESR of the output capacitor is large
enough. The MIC261201 control loop has the advantage
of eliminating the need for slope compensation.
In order to meet the stability requirements, the
MIC261201 feedback voltage ripple should be in phase
with the inductor current ripple and large enough to be
sensed by the gm amplifier and the error comparator.
The recommended feedback voltage ripple is
20mV~100mV. If a low-ESR output capacitor is selected,
then the feedback voltage ripple may be too small to be
sensed by the gm amplifier and the error comparator.
Also, the output voltage ripple and the feedback voltage
ripple are not necessarily in phase with the inductor
current ripple if the ESR of the output capacitor is very
low. In these cases, ripple injection is required to ensure
proper operation. Please refer to “Ripple Injection”
subsection in Application Information for more details
about the ripple injection technique.
VDD Regulator
The MIC261201 provides a 5V regulated output for input
voltage VIN ranging from 5.5V to 28V. When VIN < 5.5V,
VDD should be tied to PVIN pins to bypass the internal
linear regulator.
Soft-Start
Soft-start reduces the power supply input surge current
at startup by controlling the output voltage rise time. The
input surge appears while the output capacitor is
charged up. A slower output rise time will draw a lower
input surge current.
The MIC261201 implements an internal digital soft-start
by making the 0.8V reference voltage VREF ramp from 0
to 100% in about 5ms with 9.7mV steps. Therefore, the
output voltage is controlled to increase slowly by a stair-
case VFB ramp. Once the soft-start cycle ends, the
related circuitry is disabled to reduce current
consumption. VDD must be powered up at the same time
or after VIN to make the soft-start function correctly.
Current Limit
The MIC261201 uses the RDS(ON) of the internal low-side
power MOSFET to sense over-current conditions. This
method will avoid adding cost, board space and power
losses taken by a discrete current sense resistor. The
low-side MOSFET is used because it displays much
lower parasitic oscillations during switching than the
high-side MOSFET.
Micrel, Inc. MIC261201
July 2011 17 M9999-071311-A
In each switching cycle of the MIC261201 converter, the
inductor current is sensed by monitoring the low-side
MOSFET in the OFF period. If the peak inductor current
is greater than 26A, then the MIC261201 turns off the
high-side MOSFET and a soft-start sequence is
triggered. This mode of operation is called “hiccup
mode” and its purpose is to protect the downstream load
in case of a hard short. The load current-limit threshold
has a fold back characteristic related to the feedback
voltage as shown in Figure 4.
Current Limit Threshold
vs. Feedback Voltage
0
5
10
15
20
25
30
0.0 0.2 0.4 0.6 0.8 1.0
FEEDBACK VO LT AGE (V)
CURRENT L IMIT THRESH O L D (A)
Figure 4. MIC261201 Current-L imit Fold back
Characteristic
Power-Good (PG)
The Power Good (PG) pin is an open drain output which
indicates logic high when the output is nominally 92% of
its steady state voltage. A pull-up resistor of more than
10k should be connected from PG to VDD.
MOSFET Gate Drive
The Block Diagram (Figure 1) shows a bootstrap circuit,
consisting of D1 (a Schottky diode is recommended) and
CBST. This circuit supplies energy to the high-side drive
circuit. Capacitor CBST is charged, while the low-side
MOSFET is on, and the voltage on the SW pin is
approximately 0V. When the high-side MOSFET driver is
turned on, energy from CBST is used to turn the MOSFET
on. As the high-side MOSFET turns on, the voltage on
the SW pin increases to approximately VIN. Diode D1 is
reverse biased and CBST floats high while continuing to
keep the high-side MOSFET on. The bias current of the
high-side driver is less than 10mA so a 0.1F to 1F is
sufficient to hold the gate voltage with minimal droop for
the power stroke (high-side switching) cycle, i.e. BST =
10mA x 1.67s/0.1F = 167mV. When the low-side
MOSFET is turned back on, CBST is recharged through
D1.
A small resistor RG, which is in series with CBST, can be
used to slow down the turn-on time of the high-side N-
channel MOSFET.
The drive voltage is derived from the VDD supply voltage.
The nominal low-side gate drive voltage is VDD and the
nominal high-side gate drive voltage is approximately
VDD – VDIODE, where VDIODE is the voltage drop across
D1. An approximate 30ns delay between the high-side
and low-side driver transitions is used to prevent current
from simultaneously flowing unimpeded through both
MOSFETs.
Micrel, Inc. MIC261201
July 2011 18 M9999-071311-A
Application Information
Inductor Selection
Values for inductance, peak, and RMS currents are
required to select the output inductor. The input and
output voltages and the inductance value determine the
peak-to-peak inductor ripple current. Generally, higher
inductance values are used with higher input voltages.
Larger peak-to-peak ripple currents will increase the
power dissipation in the inductor and MOSFETs. Larger
output ripple currents will also require more output
capacitance to smooth out the larger ripple current.
Smaller peak-to-peak ripple currents require a larger
inductance value and therefore a larger and more
expensive inductor. A good compromise between size,
loss and cost is to set the inductor ripple current to be
equal to 20% of the maximum output current. The
inductance value is calculated by Equation 3:
OUT(max)swIN(max)
OUTIN(max)OUT
I20% f V
)V(VV
L×××
−×
= Eq. 3
where:
fSW = switching frequency, 600kHz
20% = ratio of AC ripple current to DC output current
VIN(max) = maximum power stage input voltage
The peak-to-peak inductor current ripple is:
L f V
)V(VV
I
swIN(max)
OUTIN(max)OUT
L(pp) ××
−×
=Δ Eq. 4
The peak inductor current is equal to the average output
current plus one half of the peak-to-peak inductor current
ripple.
IL(pk) =IOUT(max) + 0.5 × IL(pp) Eq. 5
The RMS inductor current is used to calculate the I2R
losses in the inductor.
12
I
II
2
L(PP)
2
OUT(max)L(RMS) += Eq. 6
Maximizing efficiency requires the proper selection of
core material and minimizing the winding resistance. The
high frequency operation of the MIC261201 requires the
use of ferrite materials for all but the most cost sensitive
applications. Lower cost iron powder cores may be used
but the increase in core loss will reduce the efficiency of
the power supply. This is especially noticeable at low
output power. The winding resistance decreases
efficiency at the higher output current levels. The
winding resistance must be minimized although this
usually comes at the expense of a larger inductor. The
power dissipated in the inductor is equal to the sum of
the core and copper losses. At higher output loads, the
core losses are usually insignificant and can be ignored.
At lower output currents, the core losses can be a
significant contributor. Core loss information is usually
available from the magnetics vendor. Copper loss in the
inductor is calculated by Equation 7:
PINDUCTOR(Cu) = IL(RMS)
2 × RWINDING Eq. 7
The resistance of the copper wire, RWINDING, increases
with the temperature. The value of the winding
resistance used should be at the operating temperature.
PWINDING(Ht) = RWINDING(20°C) × (1 + 0.0042 × (TH – T20°C))
Eq. 8
where:
TH = temperature of wire under full load
T20°C = ambient temperature
RWINDING(20°C) = room temperature winding resistance
(usually specified by the manufacturer)
Output Capacitor Selection
The type of the output capacitor is usually determined by
its equivalent series resistance (ESR). Voltage and RMS
current capability are two other important factors for
selecting the output capacitor. Recommended capacitor
types are ceramic, low-ESR aluminum electrolytic, OS-
CON and POSCAP. The output capacitor’s ESR is
usually the main cause of the output ripple. The output
capacitor ESR also affects the control loop from a
stability point of view.
Micrel, Inc. MIC261201
July 2011 19 M9999-071311-A
The maximum value of ESR is calculated:
L(PP)
OUT(pp)
CI
V
ESR OUT ≤ Eq. 9
where:
ΔVOUT(pp) = peak-to-peak output voltage ripple
IL(PP) = peak-to-peak inductor current ripple
The total output ripple is a combination of the ESR and
output capacitance. The total ripple is calculated in
Equation 10:
()
2
CL(PP)
2
SWOUT
L(PP)
OUT(pp) OUT
ESRI
8fC
I
V×+
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛
××
=
Eq. 10
where:
D = duty cycle
COUT = output capacitance value
fSW = switching frequency
As described in the “Theory of Operation” subsection in
the Functional Description section, the MIC261201
requires at least 20mV peak-to-peak ripple at the FB pin
to make the gm amplifier and the error comparator
behave properly. Also, the output voltage ripple should
be in phase with the inductor current. Therefore, the
output voltage ripple caused by the output capacitors
value should be much smaller than the ripple caused by
the output capacitor ESR. If low-ESR capacitors, such
as ceramic capacitors, are selected as the output
capacitors, a ripple injection method should be applied to
provide the enough feedback voltage ripple. Please refer
to the “Ripple Injection” subsection for more details.
The voltage rating of the capacitor should be twice the
output voltage for a tantalum and 20% greater for
aluminum electrolytic or OS-CON. The output capacitor
RMS current is calculated in Equation 11:
12
I
IL(PP)
(RMS)COUT = Eq. 11
The power dissipated in the output capacitor is:
OUTOUTOUT C
2
(RMS)C)DISS(C ESRIP ×= Eq. 12
Input Capacitor Selection
The input capacitor for the power stage input VIN should
be selected for ripple current rating and voltage rating.
Tantalum input capacitors may fail when subjected to
high inrush currents, caused by turning the input supply
on. A tantalum input capacitor’s voltage rating should be
at least two times the maximum input voltage to
maximize reliability. Aluminum electrolytic, OS-CON, and
multilayer polymer film capacitors can handle the higher
inrush currents without voltage de-rating. The input
voltage ripple will primarily depend on the input
capacitor’s ESR. The peak input current is equal to the
peak inductor current, so:
VIN = IL(pk) × ESRCIN Eq. 13
The input capacitor must be rated for the input current
ripple. The RMS value of input capacitor current is
determined at the maximum output current. Assuming
the peak-to-peak inductor current ripple is low:
D)(1DII OUT(max)CIN(RMS) −××≈ Eq. 14
The power dissipated in the input capacitor is:
PDISS(CIN) = ICIN(RMS)
2 × ESRCIN Eq. 15
Ripple Injection
The VFB ripple required for proper operation of the
MIC261201 gm amplifier and error comparator is 20mV
to 100mV. However, the output voltage ripple is
generally designed as 1% to 2% of the output voltage.
For a low output voltage, such as a 1V, the output
voltage ripple is only 10mV to 20mV, and the feedback
voltage ripple is less than 20mV. If the feedback voltage
ripple is so small that the gm amplifier and error
comparator can’t sense it, then the MIC261201 will lose
control and the output voltage is not regulated. In order
to have some amount of VFB ripple, a ripple injection
method is applied for low output voltage ripple
applications.
Micrel, Inc. MIC261201
July 2011 20 M9999-071311-A
The applications are divided into three situations
according to the amount of the feedback voltage ripple:
1. Enough ripple at the feedback voltage due to the
large ESR of the output capacitors.
As shown in Figure 5a, the converter is stable without
any ripple injection. The feedback voltage ripple is:
(pp)
LCFB(pp) IESR
R2R1
R2
VOUT ××
+
= Eq. 16
where IL(pp) is the peak-to-peak value of the inductor
current ripple.
2. Inadequate ripple at the feedback voltage due to the
small ESR of the output capacitors.
The output voltage ripple is fed into the FB pin through a
feedforward capacitor Cff in this situation, as shown in
Figure 5b. The typical Cff value is between 1nF and
100nF. With the feedforward capacitor, the feedback
voltage ripple is very close to the output voltage ripple:
(pp)
LFB(pp) IESRV×≈ Eq. 17
3. Virtually no ripple at the FB pin voltage due to the
very-low ESR of the output capacitors.
Figure 5a. Enough Ripple at FB
Figure 5b. Inadequate Ripple at FB
Figure 5c. Invisible Ripple at FB
In this situation, the output voltage ripple is less than
20mV. Therefore, additional ripple is injected into the FB
pin from the switching node SW via a resistor Rinj and a
capacitor Cinj, as shown in Figure 5c. The injected ripple
is:
τ
×
××××=
SW
divINFB(pp) f
1
D)-(1DKVV Eq. 18
R1//R2R
R1//R2
K
inj
div +
= Eq. 19
where:
VIN = Power stage input voltage
D = duty cycle
fSW = switching frequency
τ = (R1//R2//Rinj) × Cff
In Equations 20 and 21, it is assumed that the time
constant associated with Cff must be much greater than
the switching period:
1
T
f
1
SW
<<=
×
ττ
Eq. 20
If the voltage divider resistors R1 and R2 are in the k
range, a Cff of 1nF to 100nF can easily satisfy the large
time constant requirements. Also, a 100nF injection
capacitor Cinj is used in order to be considered as short
for a wide range of the frequencies.
MIC261201
MIC261201
MIC261201
Micrel, Inc. MIC261201
July 2011 21 M9999-071311-A
The process of sizing the ripple injection resistor and
capacitors is:
Step 1. Select Cff to feed all output ripples into the
feedback pin and make sure the large time constant
assumption is satisfied. Typical choice of Cff is 1nF to
100nF if R1 and R2 are in k range.
Step 2. Select Rinj according to the expected feedback
voltage ripple using Equation 22:
D)(1D
f
V
V
KSW
IN
FB(pp)
div −×
×
×=
τ
Eq. 21
Then the value of Rinj is obtained as:
1)
K
1
((R1//R2)R
div
inj −×= Eq. 22
Step 3. Select Cinj as 100nF, which could be considered
as short for a wide range of the frequencies.
Setting Output Voltage
The MIC26603 requires two resistors to set the output
voltage as shown in Figure 7.
The output voltage is determined by Equation 23:
)
R2
R1
(1VV FBOUT +×= Eq. 23
where VFB = 0.8V.
A typical value of R1 can be between 3k and 10k. If
R1 is too large, it may allow noise to be introduced into
the voltage feedback loop. If R1 is too small, it will
decrease the efficiency of the power supply, especially
at light loads. Once R1 is selected, R2 can be calculated
using:
FBOUT
FB
VV
R1V
R2 −
×
= Eq. 24
Figure 6. Voltage-Divider Configuration
In addition to the external ripple injection added at the
FB pin, internal ripple injection is added at the inverting
input of the comparator inside the MIC261201, as shown
in Figure 8. The inverting input voltage VINJ is clamped to
1.2V. As VOUT is increased, the swing of VINJ will be
clamped. The clamped VINJ reduces the line regulation
because it is reflected as a DC error on the FB terminal.
Therefore, the maximum output voltage of the
MIC261201 should be limited to 5.5V to avoid this
problem.
Figure 7. Internal Ripple Injection
Micrel, Inc. MIC261201
July 2011 22 M9999-071311-A
Thermal Measurements
Measuring the IC’s case temperature is recommended to
insure it is within its operating limits. Although this might
seem like a very elementary task, it is easy to get
erroneous results. The most common mistake is to use
the standard thermal couple that comes with a thermal
meter. This thermal couple wire gauge is large, typically
22 gauge, and behaves like a heatsink, resulting in a
lower case measurement.
Two methods of temperature measurement are using a
smaller thermal couple wire or an infrared thermometer.
If a thermal couple wire is used, it must be constructed
of 36 gauge wire or higher then (smaller wire size) to
minimize the wire heat-sinking effect. In addition, the
thermal couple tip must be covered in either thermal
grease or thermal glue to make sure that the thermal
couple junction is making good contact with the case of
the IC. Omega brand thermal couple (5SC-TT-K-36-36)
is adequate for most applications.
Wherever possible, an infrared thermometer is
recommended. The measurement spot size of most
infrared thermometers is too large for an accurate
reading on a small form factor ICs. However, a IR
thermometer from Optris has a 1mm spot size, which
makes it a good choice for measuring the hottest point
on the case. An optional stand makes it easy to hold the
beam on the IC for long periods of time.
Micrel, Inc. MIC261201
July 2011 23 M9999-071311-A
PCB Layout Guidelines
Warning!!! To minimize EMI and output noise, follow
these layout recommendations.
PCB Layout is critical to achieve reliable, stable and
efficient performance. A ground plane is required to
control EMI and minimize the inductance in power,
signal and return paths.
The following guidelines should be followed to insure
proper operation of the MIC261201 regulator.
IC
• A 2.2µF ceramic capacitor, which is connected to
the PVDD pin, must be located right at the IC. The
PVDD pin is very noise sensitive and placement of
the capacitor is very critical. Use wide traces to
connect to the PVDD and PGND pins.
• A 1.0uF ceramic capacitor must be placed right
between VDD and the signal ground SGND. The
SGND must be connected directly to the ground
planes. Do not route the SGND pin to the PGND
Pad on the top layer.
• Place the IC close to the point-of-load (POL).
• Use fat traces to route the input and output power
lines.
• Signal and power grounds should be kept separate
and connected at only one location.
Input Capacitor
• Place the input capacitor next.
• Place the input capacitors on the same side of the
board and as close to the IC as possible.
• Keep both the PVIN pin and PGND connections
short.
• Place several vias to the ground plane close to the
input capacitor ground terminal.
• Use either X7R or X5R dielectric input capacitors.
Do not use Y5V or Z5U type capacitors.
• Do not replace the ceramic input capacitor with any
other type of capacitor. Any type of capacitor can be
placed in parallel with the input capacitor.
• If a Tantalum input capacitor is placed in parallel
with the input capacitor, it must be recommended for
switching regulator applications and the operating
voltage must be derated by 50%.
• In “Hot-Plug” applications, a Tantalum or Electrolytic
bypass capacitor must be used to limit the over-
voltage spike seen on the input supply with power is
suddenly applied.
Inductor
• Keep the inductor connection to the switch node
(SW) short.
• Do not route any digital lines underneath or close to
the inductor.
• Keep the switch node (SW) away from the feedback
(FB) pin.
• The CS pin should be connected directly to the SW
pin to accurate sense the voltage across the low-
side MOSFET.
• To minimize noise, place a ground plane underneath
the inductor.
• The inductor can be placed on the opposite side of
the PCB with respect to the IC. It does not matter
whether the IC or inductor is on the top or bottom as
long as there is enough air flow to keep the power
components within their temperature limits. The
input and output capacitors must be placed on the
same side of the board as the IC.
Output Capacitor
• Use a wide trace to connect the output capacitor
ground terminal to the input capacitor ground
terminal.
• Phase margin will change as the output capacitor
value and ESR changes. Contact the factory if the
output capacitor is different from what is shown in
the BOM.
• The feedback trace should be separate from the
power trace and connected as close as possible to
the output capacitor. Sensing a long high current
load trace can degrade the DC load regulation.
Optional RC Snubber
• Place the RC snubber on either side of the board
and as close to the SW pin as possible.
Micrel, Inc. MIC261201
July 2011 24 M9999-071311-A
Evaluation Board Schematic
Figure 8. Schematic of MIC261201 Evaluation Board
(J11, R13, R15 are for testing purposes)
Micrel, Inc. MIC261201
July 2011 25 M9999-071311-A
Bill of Materials
Item Part Number Manufacturer Description Qty.
C1 Open
12105C475KAZ2A AVX(1)
GRM32ER71H475KA88L Murata(2)
C2, C3
C3225X7R1H475K TDK(3)
4.7µF Ceramic Capacitor, X7R, Size 1210, 50V 2
C15 Open
12106D107MAT2A AVX(1)
GRM32ER60J107ME20L Murata(2)
C4, C5, C13
C3225X5R0J107M TDK(3)
100µF Ceramic Capacitor, X5R, Size 1210, 6.3V 3
06035C104KAT2A AVX(1)
GRM188R71H104KA93D Murata(2)
C6, C7, C10
C1608X7R1H104K TDK(3)
0.1µF Ceramic Capacitor, X7R, Size 0603, 50V 3
0603ZC105KAT2A AVX(1)
GRM188R71A105KA61D Murata(2)
C8
C1608X7R1A105K TDK(3)
1.0µF Ceramic Capacitor, X7R, Size 0603, 10V 1
0603ZD225KAT2A AVX(1)
GRM188R61A225KE34D Murata(2)
C9
C1608X5R1A225K TDK(3)
2.2µF Ceramic Capacitor, X7R, Size 0603, 10V 1
06035C472KAZ2A AVX(1)
GRM188R71H472K Murata(2)
C12
C1608X7R1H472K TDK(3)
4.7nF Ceramic Capacitor, X7R, Size 0603, 50V 1
C14 B41851F7227M EPCOS(4) 220µF Aluminum Capacitor, 35V 1
C11, C16 Open
SD103AWS MCC(5)
SD103AWS-7 Diodes Inc(6)
D1
SD103AWS Vishay(7)
40V, 350mA, Schottky Diode, SOD323 1
L1 HCF1305-1R0-R
Cooper Bussmann(8) 1.0µH Inductor, 21A Saturation Current 1
R1 CRCW06032R21FKEA Vishay Dale(7) 2.21 Resistor, Size 0603, 1% 1
R2 CRCW06032R00FKEA Vishay Dale(7) 2.00 Resistor, Size 0603, 1% 1
R3 CRCW060319K6FKEA Vishay Dale(7) 19.6k Resistor, Size 0603, 1% 1
R4 CRCW06032K49FKEA Vishay Dale(7) 2.49k Resistor, Size 0603, 1% 1
R5 CRCW060320K0FKEA Vishay Dale(7) 20.0k Resistor, Size 0603, 1% 1
R6, R14, R17 CRCW060310K0FKEA Vishay Dale(7) 10.0k Resistor, Size 0603, 1% 3
R7 CRCW06034K99FKEA Vishay Dale(7) 4.99k Resistor, Size 0603, 1% 1
R8 CRCW06032K87FKEA Vishay Dale(7) 2.87k Resistor, Size 0603, 1% 1
R9 CRCW06032K006FKEA Vishay Dale(7) 2.00k Resistor, Size 0603, 1% 1
R10 CRCW06031K18FKEA Vishay Dale(7) 1.18k Resistor, Size 0603, 1% 1
R11 CRCW0603806RFKEA Vishay Dale(7) 806 Resistor, Size 0603, 1% 1
R12 CRCW0603475RFKEA Vishay Dale(7) 475 Resistor, Size 0603, 1% 1
Micrel, Inc. MIC261201
July 2011 26 M9999-071311-A
Bill of Materials (Continued)
Item Part Number Manufacturer Description Qty.
R13 CRCW06030000FKEA Vishay Dale(7) 0 Resistor, Size 0603, 5% 1
R15 CRCW060349R9FKEA Vishay Dale(7) 49.9 Resistor, Size 0603, 1% 1
R16, R18 CRCW06031R21FKEA Vishay Dale(7) 1.21 Resistor, Size 0603, 1% 2
R20 Open
U1 MIC261201YJL Micrel. Inc.(9) 28V, 12A Hyper Speed Contro l™ Synchronous
DC/DC Buck Regulator 1
Notes:
1. AVX: www.avx.com.
2. Murata: www.murata.com.
3. TDK: www.tdk.com.
4. EPCOS: www.epcos.com.
5. SANYO: www.sanyo.com.
6. Diode Inc.: www.diodes.com.
7. Vishay: www.vishay.com.
8. Cooper Bussmann: www.cooperbussmann.com.
9. Micrel, Inc.: www.micrel.com.
Micrel, Inc. MIC261201
July 2011 27 M9999-071311-A
PCB Layout Recommendations
Figure 9. MIC261201 Evaluation Board Top Layer
Figure 10. MIC261201 Evaluation Board Mid-Layer 1 (Ground Plane)
Micrel, Inc. MIC261201
July 2011 28 M9999-071311-A
PCB Layout Recommendations (Continued)
Figure 11. MIC261201 Evaluation Board Mid-Layer 2
Figure 12. MIC261201 Evaluation Board Bottom L ayer
Micrel, Inc. MIC261201
July 2011 29 M9999-071311-A
Recommended Land and Solder Stencil P atte rn
Micrel, Inc. MIC261201
July 2011 30 M9999-071311-A
Package Information
28-Pin 5mm × 6mm MLF® (YJL)
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