2004-2013 Microchip Technology Inc. DS21893F-page 1
MCP73861/2/3/4
Features:
Linear Charge Management Controllers:
- Integrated Pass Transistor
- Integrated Current Sense
- Reverse-Blocking Protection
High-Accuracy Preset Voltage Regulation: + 0.5%
Four Selectable Voltage Regulation Options:
- 4.1V, 4.2V – MCP73861/3
- 8.2V, 8.4V – MCP73862/4
Programmable Charge Current: 1.2A Maximum
Programmable Safety Charge Timers
Preconditioning of Deeply Depleted Cells
Automatic End-of-Charge Control
Optional Continuous Cell Temperature Monitoring
Charge Status Output for Direct LED Drive
Fault Output for Direct LED Drive
Automatic Power-Down
Thermal Regulation
Temperature Range: -40°C to +85°C
Packaging: 16-Pin, 4 x 4 QFN
16-Pin SOIC
Applications:
Lithium-Ion/Lithium-Polymer Battery Chargers
Personal Data Assistants (PDAs)
Cellular Telephones
Hand-Held Instruments
Cradle Chargers
•Digital Cameras
MP3 Players
Description:
The MCP7386X family of devices features highly
advanced linear charge management controllers for
use in space-limited, cost-sensitive applications. The
devices combine high-accuracy, constant voltage and
current regulation, cell preconditioning, cell
temperature monitoring, advanced safety timers,
automatic charge termination, internal current sensing,
reverse-blocking protection, charge status and fault
indication in either a space-saving 16-pin 4 x 4 QFN
package, or a 16-pin SOIC package. The MCP7386X
provides a complete, fully functional, stand-alone
charge management solution with a minimum number
of external components.
The MCP73861/3 is intended for applications utilizing
single-cell Lithium-Ion or Lithium-Polymer battery
packs, while the MCP73862/4 is intended for dual
series cell Lithium-Ion or Lithium-Polymer battery
packs. The MCP73861/3 has two selectable
voltage-regulation options available (4.1V and 4.2V),
for use with either coke or graphite anodes and operate
with an input voltage range of 4.5V to 12V. The
MCP73862/4 has two selectable voltage-regulation
options available (8.2V and 8.4V), for use with coke or
graphite anodes, and operate with an input voltage
range of 8.7V to 12V.
The MCP73861/2 and MCP73863/4 differ only in the
function of the charge status output (STAT1) when a
charge cycle has been completed. The MCP73861/2
flashes the output, while the MCP73863/4 turns the
output off. Refer to Section 5.2.1 “Charge Status
Outputs (STAT1, STAT2)”.
The MCP7386X family of devices are fully specified
over the ambient temperature range of -40°C to +85°C.
Advanced Single or Dual Cell, Fully Integrated Li-Ion/Li-Polymer
Charge Management Controllers
MCP73861/2/3/4
DS21893F-page 2 2004-2013 Microchip Technology Inc.
Package Types
VDD1
VBAT3
THERM
EN
TIMER
STAT1
STAT2 1
2
3
4
14
15
16
PROG
VDD2
VSET
VSS1
THREF
VBAT1
VBAT2
5
6
7
89
10
11
12
13
VSS2
VSS3
16-Pin SOIC16-Pin QFN
2
VDD2
VSS1
VSET VBAT3
VBAT2
PROG
VBAT1
THREF
THERM
TIMER
VSS3
STAT1
STAT2
EN
VSS2
VDD2 EP
16
1
15 14 13
3
4
12
11
10
9
5678
17
2004-2013 Microchip Technology Inc. DS21893F-page 3
MCP73861/2/3/4
Typical Application
Functional Block Diagram
EN
STAT1
STAT2
VSET
VDD
VSS
TIMER
PROG
THERM
THREF
VBAT3
VBAT
+
Single
Lithium-Ion
Cell
2, 3
1
MCP73861/3
5
6
7
8
4, 9, 13
10, 11
12
14
16
15
5V
6.19 k
4.7µF
1.2A Lithium-Ion Battery Charger
4.7 µF
7.32 k
0.1
µF Note: Pin numbers shown are for QFN
package. Please refer to Section 6.0
“Applications” for details.
+
Charge
Termination
Comparator
Voltage Control
Amplifier
+
UVLO
COMPARATOR
VUVLO
+
Temperature
Comparators
+
Bias and
Reference
Generator
VUVLO
VREF (1.2V)
Power-On
Delay
+
+
VREF
VREF
Oscillator
IREG/12
Constant-Voltage/
Recharge Comp.
Precondition
Control
Charge_OK
Precon
VDD
Charge Current
Control Amplifier
+
VREF
VREF
+
Precondition
Comp.
Charge Control,
Charge Timers
And Status Logic Drv Stat 2
Drv Stat 1
Charge_OK
IREG/12
VDD1
THERM
EN
TIMER
STAT1
STAT2
VBAT3
VSS1
PROG
VSET
THREF
VBAT1
90
110 k
10 k
10 k
100 k
50 k
50 k
G = 0.001
11 k
1k
600 k
(1.65 M)
148.42 k
1.58 k
VDD2 VBAT2
300.04 k
10.3 k
(8.58 k)
4k
Direction
Control
k
VSS2
VSS3
Values in ( )
reflect the
MCP73862/4
devices
MCP73861/2/3/4
DS21893F-page 4 2004-2013 Microchip Technology Inc.
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings†
VDDN...............................................................................13.5V
VBATN, VSET
, EN, STAT1, STAT2 w.r.t. VSS
.................................................................-0.3 to (VDD + 0.3)V
PROG, THREF, THERM, TIMER w.r.t. VSS............. -0.3 to 6V
Maximum Junction Temperature, TJ............Internally Limited
Storage temperature .....................................-65°C to +150°C
ESD protection on all pins:
Human Body Model (1.5 k in series with 100 pF)4kV
Machine Model (200 pF, No series resistance) ...........300V
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all limits apply for VDD= [VREG(typ.) + 0.3V] to 12V,
TA = -40°C to +85°C. Typical values are at +25°C, VDD = [VREG (typ.) + 1.0V]
Parameters Sym. Min. Typ. Max. Units Conditions
Supply Input
Supply Voltage VDD 4.5 12 V MCP73861/3
8.7 12 V MCP73862/4
Supply Current ISS 0.17 4 µA Disabled
0.53 4 mA Operating
UVLO Start Threshold VSTART 4.25 4.5 4.65 V MCP73861/3
8.45 8.8 9.05 V MCP73862/4
VDD Low-to-High
UVLO Stop Threshold VSTOP 4.20 4.4 4.55 V MCP73861/3
8.40 8.7 8.95 V MCP73862/4
VDD High-to-Low
Voltage Regulation (Constant-Voltage Mode)
Regulated Output Voltage VREG 4.079 4.1 4.121 V MCP73861/3, VSET = VSS
4.179 4.2 4.221 V MCP73861/3,VSET = VDD
8.159 8.2 8.241 V MCP73862/4, VSET = VSS
8.358 8.4 8.442 V MCP73862/4, VSET = VDD
VDD = [VREG(typ.) + 1V],
IOUT =10mA
TA = -5°C to +55°C
Line Regulation ΔVBAT/
VBAT)| /
ΔVDD
0.025 0.25 %/V VDD = [VREG(typ.)+1V] to 12V
IOUT = 10 mA
Load Regulation ΔVBAT/
VBAT|
—0.010.25%I
OUT = 10 mA to 150 mA
VDD = [VREG(typ.)+1V]
Supply Ripple Attenuation PSRR 60 dB IOUT = 10 mA, 10 Hz to 1 kHz
—42dBI
OUT = 10 mA, 10 Hz to 10 kHz
—28dBI
OUT = 10 mA, 10 Hz to 1 MHz
Output Reverse Leakage
Current
IDISCHARGE —0.231µAV
DD < VBAT = VREG(typ.),
VDD = 1.5 k to Ground
Output Reverse Leakage
Switchover Time
IDISCHARGE
_SW
0 1000 ms VDD < VBAT
,
VDD <= 1.5 k to Ground
2004-2013 Microchip Technology Inc. DS21893F-page 5
MCP73861/2/3/4
Current Regulation (Fast Charge Constant-Current Mode)
Fast Charge Current
Regulation
IREG 85 100 115 mA PROG = OPEN
1020 1200 1380 mA PROG = VSS
425 500 575 mA PROG = 1.6 k
TA= -5°C to +55°C
Preconditioning Current Regulation (Trickle Charge Constant-Current Mode)
Precondition Current
Regulation
IPREG 5 10 15 mA PROG = OPEN
60 120 180 mA PROG = VSS
25 50 75 mA PROG = 1.6 k
TA=-5°C to +55°C
Precondition Threshold
Voltage
VPTH 2.70 2.80 2.90 V MCP73861/3, VSET = VSS
2.75 2.85 2.95 V MCP73861/3, VSET = VDD
5.40 5.60 5.80 V MCP73862/4, VSET = VSS
5.50 5.70 5.90 V MCP73862/4, VSET = VDD
VBAT Low-to-High
Charge Termination
Charge Termination
Current
ITERM 6 8.5 11 mA PROG = OPEN
70 90 120 mA PROG = VSS
32 41 50 mA PROG = 1.6 k
TA=-5°C to +55°C
Automatic Recharge
Recharge Threshold
Voltage
VRTH VREG -300 mV VREG -200 mV VREG -100 mV V MCP73861/3
VREG -600 mV VREG -400 mV VREG -200 mV V MCP73862/4
VBAT High-to-Low
Thermistor Reference
Thermistor Reference
Output Voltage
VTHREF 2.475 2.55 2.625 V TA = 25°C,
VDD = VREG(typ.) + 1V,
ITHREF = 0 mA
Thermistor Reference
Source Current
ITHREF 200 µA
Thermistor Reference Line
Regulation
ΔVTHREF/
VTHREF)|/
ΔVDD
0.1 0.25 %/V VDD = [VREG(typ.) + 1V] to 12V
Thermistor Reference
Load Regulation
ΔVTHREF/
VTHREF|
0.01 0.10 % ITHREF = 0 mA to 0.20 mA
Thermistor Comparator
Upper Trip Threshold VT1 1.18 1.25 1.32 V
Upper Trip Point Hysteresis VT1HYS —-50mV
Lower Trip Threshold VT2 0.59 0.62 0.66 V
Lower Trip Point Hysteresis VT2HYS —80mV
Input Bias Current IBIAS ——2µA
Status Indicator – STAT1, STAT2
Sink Current ISINK 4812mA
Low Output Voltage VOL 200 400 mV ISINK = 1 mA
Input Leakage Current ILK —0.011µAI
SINK = 0 mA, VSTAT1,2 = 12V
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, all limits apply for VDD= [VREG(typ.) + 0.3V] to 12V,
TA = -40°C to +85°C. Typical values are at +25°C, VDD = [VREG (typ.) + 1.0V]
Parameters Sym. Min. Typ. Max. Units Conditions
MCP73861/2/3/4
DS21893F-page 6 2004-2013 Microchip Technology Inc.
TEMPERATURE SPECIFICATIONS
Enable Input
Input High Voltage Level VIH 1.4 V
Input Low Voltage Level VIL ——0.8V
Input Leakage Current ILK —0.011µAV
ENABLE = 12V
Thermal Shutdown
Die Temperature TSD 155 °C
Die Temperature
Hysteresis
TSDHYS —10°C
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, all limits apply for VDD= [VREG(typ.) + 0.3V] to 12V,
TA = -40°C to +85°C. Typical values are at +25°C, VDD = [VREG (typ.) + 1.0V]
Parameters Sym. Min. Typ. Max. Units Conditions
AC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all limits apply for VDD = [VREG (typ.) + 0.3V] to 12V,
TA = -40°C to +85°C. Typical values are at +25°C, VDD = [VREG (typ.) + 1.0V]
Parameters Sym. Min. Typ. Max. Units Conditions
UVLO Start Delay tSTART —— 5 msV
DD Low-to-High
Current Regulation
Transition Time Out of
Preconditioning
tDELAY —— 1 msV
BAT < VPTH to VBAT > VPTH
Current Rise Time Out of
Preconditioning
tRISE —— 1 msI
OUT Rising to 90% of IREG
Fast Charge Safety Timer
Period
tFAST 1.1 1.5 1.9 Hours CTIMER = 0.1 µF
Preconditioning Current Regulation
Preconditioning Charge Safety
Timer Period
tPRECON 45 60 75 Minutes CTIMER = 0.1 µF
Charge Termination
Elapsed Time Termination
Period
tTERM 2.2 3 3.8 Hours CTIMER = 0.1 µF
Status Indicators
Status Output turn-off tOFF 200 µs ISINK = 1mA to 0mA
Status Output turn-on tON 200 µs ISINK = 0mA to 1mA
Electrical Specifications: Unless otherwise indicated, all limits apply for VDD = [VREG (typ.) + 0.3V] to 12V.
Typical values are at +25°C, VDD = [VREG (typ.) + 1.0V]
Parameters Sym. Min. Typ. Max. Units Conditions
Temperature Ranges
Specified Temperature Range TA-40 +85 °C
Operating Temperature Range TJ-40 +125 °C
Storage Temperature Range TA-65 +150 °C
Thermal Package Resistances
Thermal Resistance, 16-lead,
4 mm x 4 mm QFN
JA 47 °C/W 4-Layer JC51-7 Standard Board,
Natural Convection
Thermal Resistance, 16-lead SOIC JA 86.1 °C/W 4-Layer JC51-7 Standard Board,
Natural Convection
2004-2013 Microchip Technology Inc. DS21893F-page 7
MCP73861/2/3/4
2.0 TYPICAL PERFORMANCE CURVES
NOTE: Unless otherwise indicated, VDD = [VREG(typ.) + 1V], IOUT = 10 mA and TA= +25°C, Constant-voltage mode.
FIGURE 2-1: Battery Regulation Voltage
(VBAT) vs. Charge Current (IOUT).
FIGURE 2-2: Battery Regulation Voltage
(VBAT) vs. Supply Voltage (VDD).
FIGURE 2-3: Battery Regulation Voltage
(VBAT) vs. Supply Voltage (VDD).
FIGURE 2-4: Supply Current (ISS) vs.
Charge Current (IOUT).
FIGURE 2-5: Supply Current (ISS) vs.
Supply Voltage (VDD).
FIGURE 2-6: Supply Current (ISS) vs.
Supply Voltage (VDD).
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
4.193
4.195
4.197
4.199
4.201
4.203
4.205
4.207
10 100 1000
Charge Current (mA)
Battery Regulation Voltage (V)
MCP73861/3
VSET = VDD
VDD = 5.2V
3.80
3.90
4.00
4.10
4.20
4.30
4.40
4.5 6.0 7.5 9.0 10.5 12.0
Supply Voltage (V)
Battery Regulation Voltage (V)
MCP73861/3
VSET = V
DD
IOUT
= 1000 m
A
4.193
4.195
4.197
4.199
4.201
4.203
4.205
4.207
4.5 6.0 7.5 9.0 10.5 12.0
Supply Voltage (V)
Battery Regulation Voltage (V)
MCP73861/3
VSET = VDD
IOUT = 10 mA
0.40
0.50
0.60
0.70
0.80
0.90
1.00
10 100 1000
Charge Current (mA)
Supply Current (mA)
MCP73861/3
VSET = V
D
D
VDD = 5.2V
0.40
0.60
0.80
1.00
1.20
1.40
1.60
4.5 6.0 7.5 9.0 10.5 12.0
Supply Voltage (V)
Supply Current (mA)
MCP73861/3
VSET = V
DD
IOUT
= 1000 m
A
0.40
0.50
0.60
0.70
0.80
0.90
1.00
4.5 6.0 7.5 9.0 10.5 12.0
Supply Voltage (V)
Supply Current (mA)
MCP73861/3
VSET = V
DD
IOUT = 10 mA
MCP73861/2/3/4
DS21893F-page 8 2004-2013 Microchip Technology Inc.
NOTE: Unless otherwise indicated, VDD = [VREG(typ.) + 1V], IOUT = 10 mA and TA= +25°C, Constant-voltage mode.
FIGURE 2-7: Output Leakage Current
(IDISCHARGE) vs. Battery Regulation Voltage
(VBAT).
FIGURE 2-8: Thermistor Reference
Voltage (VTHREF) vs. Supply Voltage (VDD).
FIGURE 2-9: Thermistor Reference
Voltage (VTHREF) vs. Thermistor Bias Current
(ITHREF).
FIGURE 2-10: Supply Current (ISS) vs.
Ambient Temperature (TA).
FIGURE 2-11: Battery Regulation Voltage
(VBAT) vs. Ambient Temperature (TA).
FIGURE 2-12: Thermistor Reference
Voltage (VTHREF) vs. Ambient Temperature (TA).
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
2.0 2.4 2.8 3.2 3.6 4.0 4.4
Battery Regulation Voltage (V)
Output Leakage Current (µA)
MCP73861/3
VSET = VDD
VDD = VSS
+25°C
-40°C
+85°C
2.500
2.510
2.520
2.530
2.540
2.550
4.56.07.59.010.512.0
Supply Voltage (V)
Therm. Reference Voltage (V)
MCP73861/3
VSET = VDD
ITHREF = 100 µA
2.500
2.505
2.510
2.515
2.520
0 25 50 75 100 125 150 175 200
Therm. Bias Current (µA)
Therm. Reference Voltage (V)
MCP73861/3
VSET = VDD
0.40
0.60
0.80
1.00
1.20
1.40
1.60
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
Ambient Temperature (°C)
Supply Current (mA)
MCP73861/3
VSET = VDD
IOUT = 10 mA
4.193
4.195
4.197
4.199
4.201
4.203
4.205
4.207
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
Ambient Temperature (°C)
Battery Regulation Voltage (V)
MCP73861/3
VSET = VDD
IOUT = 10 mA
2.500
2.505
2.510
2.515
2.520
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
Ambient Temperature (°C)
Therm. Reference Voltage (V)
MCP73861/3
VSET = VDD
ITHREF = 100 µA
2004-2013 Microchip Technology Inc. DS21893F-page 9
MCP73861/2/3/4
NOTE: Unless otherwise indicated, VDD = [VREG(typ.) + 1V], IOUT = 10 mA and TA= +25°C, Constant-voltage mode.
FIGURE 2-13: Battery Regulation Voltage
(VBAT) vs. Charge Current (IOUT).
FIGURE 2-14: Battery Regulation Voltage
(VBAT) vs. Supply Voltage (VDD).
FIGURE 2-15: Battery Regulation Voltage
(VBAT) vs. Supply Voltage (VDD).
FIGURE 2-16: Supply Current (ISS) vs.
Charge Current (IOUT).
FIGURE 2-17: Supply Current (ISS) vs.
Supply Voltage (VDD).
FIGURE 2-18: Supply Current (ISS) vs.
Supply Voltage (VDD).
8.393
8.395
8.397
8.399
8.401
8.403
8.405
8.407
10 100 1000
Charge Current (mA)
Battery Regulation Voltage (V)
MCP73862/4
VSET = VDD
VDD = 9.4V
8.393
8.395
8.397
8.399
8.401
8.403
8.405
8.407
10.0 10.4 10.8 11.2 11.6 12.0
Supply Voltage (V)
Battery Regulation Voltage (V)
MCP73862/4
VSET = VDD
IOUT = 1000 mA
8.398
8.400
8.402
8.404
8.406
8.408
8.410
8.412
9.0 9.5 10.0 10.5 11.0 11.5 12.0
Supply Voltage (V)
Battery Regulation Voltage (V)
MCP73862/4
VSET = VDD
IOUT = 10 mA
0.40
0.50
0.60
0.70
0.80
0.90
1.00
10 100 1000
Charge Current (mA)
Supply Current (mA)
MCP73862/4
VSET = VDD
VDD = 9.4V
0.40
0.60
0.80
1.00
1.20
1.40
1.60
9.0 9.5 10.0 10.5 11.0 11.5 12.0
Supply Voltage (V)
Supply Current (mA)
MCP73862/4
VSET = VDD
IOUT = 1000 mA
0.40
0.50
0.60
0.70
0.80
0.90
1.00
9.0 9.5 10.0 10.5 11.0 11.5 12.0
Supply Voltage (V)
Supply Current (mA)
MCP73862/4
VSET = VDD
IOUT = 10 mA
MCP73861/2/3/4
DS21893F-page 10 2004-2013 Microchip Technology Inc.
NOTE: Unless otherwise indicated, VDD = [VREG(typ.) + 1V], IOUT = 10 mA and TA= +25°C, Constant-voltage mode.
FIGURE 2-19: Output Leakage Current
(IDISCHARGE) vs. Battery Regulation Voltage
(VBAT).
FIGURE 2-20: Thermistor Reference
Voltage (VTHREF) vs. Supply Voltage (VDD).
FIGURE 2-21: Thermistor Reference
Voltage (VTHREF) vs. Thermistor Bias Current
(ITHREF).
FIGURE 2-22: Supply Current (ISS) vs.
Ambient Temperature (TA).
FIGURE 2-23: Battery Regulation Voltage
(VBAT) vs. Ambient Temperature (TA).
FIGURE 2-24: Thermistor Reference
Voltage (VTHREF) vs. Ambient Temperature (TA).
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
4.0 4.8 5.6 6.4 7.2 8.0 8.8
Battery Regulation Voltage (V)
Output Leakage Current (µA)
MCP73862/4
VSET = VDD
VDD = VSS
+25°C
-40°C
+85°C
2.530
2.540
2.550
2.560
2.570
9.0 9.5 10.0 10.5 11.0 11.5 12.0
Supply Voltage (V)
Therm. Reference Voltage (V)
MCP73862/4
VSET = VDD
ITHREF = 100 µA
2.540
2.542
2.544
2.546
2.548
2.550
0 25 50 75 100 125 150 175 200
Thermistor Bias Current (µA)
Therm. Reference Voltage (V)
MCP73862/4
VSET = VDD
0.40
0.60
0.80
1.00
1.20
1.40
1.60
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
Ambient Temperature (°C)
Supply Current (mA)
MCP73862/4
VSET = VDD
IOUT = 10 mA
8.386
8.390
8.394
8.398
8.402
8.406
8.410
8.414
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
Ambient Temperature (°C)
Battery Regulation Voltage (V)
MCP73862/4
VSET = V
DD
IOUT
= 10 m
A
2.530
2.534
2.538
2.542
2.546
2.550
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
Ambient Temperature (°C)
Therm. Reference Voltage (V)
MCP73862/4
VSET = V
DD
ITHREF
= 100 µ
A
2004-2013 Microchip Technology Inc. DS21893F-page 11
MCP73861/2/3/4
NOTE: Unless otherwise indicated, VDD = [VREG(typ.) + 1V], IOUT = 10 mA and TA= +25°C, Constant-voltage mode.
FIGURE 2-25: Line Transient Response.
FIGURE 2-26: Load Transient Response.
FIGURE 2-27: Power Supply Ripple
Rejection.
FIGURE 2-28: Line Transient Response.
FIGURE 2-29: Load Transient Response.
FIGURE 2-30: Power Supply Ripple
Rejection.
VDD
VBAT
MCP73861
VDD Stepped from 5.2V to 6.2V
IOUT = 10 mA
COUT = 10 µF, X7R, Ceramic
VBAT
IOUT
MCP73861
VDD 5.2V
COUT = 10 µF, X7R, Ceramic
100 mA
10 mA
-80
-70
-60
-50
-40
-30
-20
-10
0
0.01 0.1 1 10 100 1000
Frequency (kHz)
Attenuation (dB)
MCP73861
VDD = 5.2V
VAC = 100 mVp-p
IOUT = 10 mA
COUT = 10 μF, Ceramic
VDD
VBAT
MCP73861
VDD Stepped from 5.2V to 6.2V
IOUT = 500 mA
COUT = 10 µF, X7R, Ceramic
VBAT
500 mA IOUT
MCP73861
VDD 5.2V
COUT = 10 µF, X7R, Ceramic
10 mA
-80
-70
-60
-50
-40
-30
-20
-10
0
0.01 0.1 1 10 100 1000
Frequency (kHz)
Attenuation (dB)
MCP73861
VDD = 5.2V
VAC = 100 mVp-p
IOUT = 100 mA
COUT = 10 μF, X7R, Ceramic
MCP73861/2/3/4
DS21893F-page 12 2004-2013 Microchip Technology Inc.
NOTE: Unless otherwise indicated, VDD = [VREG(typ.) + 1V], IOUT = 10 mA and TA= +25°C, Constant-voltage mode.
FIGURE 2-31: Charge Current (IOUT) vs.
Programming Resistor (RPROG).
FIGURE 2-32: Charge Current (IOUT) vs.
Ambient Temperature (TA).
493
495
497
499
501
503
505
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
Charge Current (mA)
Ambient Temperature (°C)
MCP73861/2/3/4
V
SET
= V
DD
RPROG = 1.6 kΩ
2004-2013 Microchip Technology Inc. DS21893F-page 13
MCP73861/2/3/4
3.0 PIN DESCRIPTION
The descriptions of the pins are listed in Tab le 3. 1.
3.1 Voltage Regulation Selection
(VSET)
MCP73861/3: Connect VSET to VSS for 4.1V regulation
voltage, connect to VDD for 4.2V regulation voltage.
MCP73862/4: Connect VSET to VSS for 8.2V regulation
voltage, connect to VDD for 8.4V regulation voltage.
3.2 Battery Management Input Supply
(VDD2, VDD1)
A supply voltage of [VREG (typ.) + 0.3V] to 12V is
recommended. Bypass to VSS with a minimum of
4.7 µF. A 1.5 k resistor should be connected from
VDD to ground when using disconnectable supplies to
force VDD < VBAT when the supply is disconnected and
assure low leakage current.
3.3 Battery Management 0V Reference
(VSS1, VSS2, VSS3)
Connect to negative terminal of battery and input
supply.
3.4 Current Regulation Set (PROG)
Preconditioning, fast and termination currents are
scaled by placing a resistor from PROG to VSS.
3.5 Cell Temperature Sensor Bias
(THREF)
THREF is a voltage reference to bias external thermis-
tor for continuous cell temperature monitoring and
prequalification.
3.6 Cell Temperature Sensor Input
(THERM)
THERM is an input for an external thermistor for contin-
uous cell-temperature monitoring and prequalification.
Connect to THREF/3 to disable temperature sensing.
3.7 Timer Set
All safety timers are scaled by CTIMER/0.1 µF.
3.8 Battery Charge Control Output
(VBAT1, VBAT2)
Connect to positive terminal of battery. Drain terminal
of internal P-channel MOSFET pass transistor. Bypass
to VSS with a minimum of 4.7 µF to ensure loop stability
when the battery is disconnected.
3.9 Battery Voltage Sense (VBAT3)
VBAT3 is a voltage sense input. Connect to positive
terminal of battery. A precision internal resistor divider
regulates the final voltage on this pin to VREG
.
TABLE 3-1: PIN FUNCTION TABLE
MCP73861/2/3/4
Symbol Function
QFN SOIC
13 V
SET Voltage Regulation Selection
24 V
DD1 Battery Management Input Supply
35 V
DD2 Battery Management Input Supply
46 V
SS1 Battery Management 0V Reference
5 7 PROG Current Regulation Set
6 8 THREF Cell Temperature Sensor Bias
7 9 THERM Cell Temperature Sensor Input
810 TIMERTimer Set
911 V
SS3 Battery Management 0V Reference
10 12 VBAT1 Battery Charge Control Output
11 13 VBAT2 Battery Charge Control Output
12 14 VBAT3 Battery Voltage Sense
13 15 VSS2 Battery Management 0V Reference
14 16 EN Logic Enable
15 1 STAT2 Fault Status Output
16 2 STAT1 Charge Status Output
17 EP Exposed Pad; Battery Management 0V Reference
MCP73861/2/3/4
DS21893F-page 14 2004-2013 Microchip Technology Inc.
3.10 Logic Enable (EN)
EN is an input to force charge termination, initiate
charge, clear faults or disable automatic recharge.
3.11 Fault Status Output (STAT2)
STAT2 is a current-limited, open-drain drive for direct
connection to a LED for charge status indication. Alter-
natively, a pull-up resistor can be applied for interfacing
to a host microcontroller.
3.12 Charge Status Output (STAT1)
STAT1 is a current-limited, open-drain drive for direct
connection to a LED for charge status indication. Alter-
natively, a pull-up resistor can be applied for interfacing
to a host microcontroller.
3.13 Exposed Pad (EP)
There is an internal electrical connection between the
exposed thermal pad and VSS. The EP must be
connected to the same potential as the VSS pin on the
Printed Circuit Board (PCB).
2004-2013 Microchip Technology Inc. DS21893F-page 15
MCP73861/2/3/4
4.0 DEVICE OVERVIEW
The MCP7386X family of devices are highly advanced
linear charge management controllers. Refer to the
functional block diagram. Figure 4-2 depicts the opera-
tional flow algorithm from charge initiation to
completion and automatic recharge.
4.1 Charge Qualification and
Preconditioning
Upon insertion of a battery, or application of an external
supply, the MCP7386X family of devices automatically
performs a series of safety checks to qualify the
charge. The input source voltage must be above the
Undervoltage Lockout (UVLO) threshold, the enable
pin must be above the logic-high level and the cell
temperature must be within the upper and lower thresh-
olds. The qualification parameters are continuously
monitored. Deviation beyond the limits automatically
suspends or terminates the charge cycle. The input
voltage must deviate below the UVLO stop threshold
for at least one clock period to be considered valid.
Once the qualification parameters have been met, the
MCP7386X initiates a charge cycle. The charge status
output is pulled low throughout the charge cycle (see
Table 5-1 for charge status outputs). If the battery
voltage is below the preconditioning threshold (VPTH),
the MCP7386X preconditions the battery with a
trickle-charge. The preconditioning current is set to
approximately 10% of the fast charge regulation
current. The preconditioning trickle-charge safely
replenishes deeply depleted cells and minimizes heat
dissipation during the initial charge cycle. If the battery
voltage has not exceeded the preconditioning thresh-
old before the preconditioning timer has expired, a fault
is indicated and the charge cycle is terminated.
4.2 Constant Current Regulation –
Fast Charge
Preconditioning ends, and fast charging begins, when
the battery voltage exceeds the preconditioning
threshold. Fast charge regulates to a constant current
(IREG), which is set via an external resistor connected
to the PROG pin. Fast charge continues until the
battery voltage reaches the regulation voltage (VREG),
or the fast charge timer expires; in which case, a fault
is indicated and the charge cycle is terminated.
4.3 Constant Voltage Regulation
When the battery voltage reaches the regulation
voltage (VREG), constant voltage regulation begins.
The MCP7386X monitors the battery voltage at the
VBAT pin. This input is tied directly to the positive
terminal of the battery.
The MCP7386X selects the voltage regulation value
based on the state of VSET
. With VSET tied to VSS, the
MCP73861/3 and MCP73862/4 regulate to 4.1V and
8.2V, respectively. With VSET tied to VDD, the
MCP73861/3 and MCP73862/4 regulate to 4.2V and
8.4V, respectively.
4.4 Charge Cycle Completion and
Automatic Re-Charge
The MCP7386X monitors the charging current during
the Constant-voltage regulation mode. The charge
cycle is considered complete when the charge current
has diminished below approximately 8% of the
regulation current (IREG), or the elapsed timer has
expired.
The MCP7386X automatically begins a new charge
cycle when the battery voltage falls below the recharge
threshold (VRTH), assuming all the qualification
parameters are met.
4.5 Thermal Regulation
The MCP7386X family limits the charge current based
on the die temperature. Thermal regulation optimizes
the charge cycle time while maintaining device reliabil-
ity. If thermal regulation is entered, the timer is automat-
ically slowed down to ensure that a charge cycle will
not terminate prematurely. Figure 4-1 depicts the
thermal regulation profile.
FIGURE 4-1: Typical Maximum Charge
Current vs. Die Temperature.
4.6 Thermal Shutdown
The MCP7386X family suspends charge if the die
temperature exceeds 155°C. Charging will resume
when the die temperature has cooled by approximately
10°C. The thermal shutdown is a secondary safety
feature in the event that there is a failure within the
thermal regulation circuitry.
0
200
400
600
800
1000
1200
1400
0 20 40 60 80 100 120 140
Die Temperature (° C)
Maximum Charge Current (mA)
Minimum Maximum
MCP73861/2/3/4
DS21893F-page 16 2004-2013 Microchip Technology Inc.
FIGURE 4-2: Operational Flow Algorithm.
Preconditioning Mode
Charge Current = IPREG
Reset Safety Timer
Yes
Initialize
No
Yes
VBAT > VPTH STAT1 = On
VBAT > VPTH
Yes
VDD < VUVLO
No
No
Safety Timer
Yes Temperature OK
No
STAT1 = Off
Safety Timer Suspended
Charge Current = 0
Fault
Charge Current = 0
Reset Safety Timer
or EN Low
No
STAT1 = Off
Constant-Current Mode
Charge Current = IREG
Reset Safety Timer
VBAT = VREG
No
No
Safety Timer
Yes Temperature OK
Constant-Voltage Mode
Output Voltage = VREG
IOUT < ITERM
Yes
VBAT < VRTH
Elapsed Timer
Charge Termination
Charge Current = 0
Reset Safety Timer
No
STAT1 = Flashing
Yes
Yes
Temperature OK
No
STAT1 = Flashing
Safety Timer Suspended
Charge Current = 0
Yes
Yes
VDD < VUVLO
or EN Low
No
Yes
Yes
Temperature OK
No
STAT1 = Off
Charge Current = 0
Yes
No
STAT1 = Off
VDD > VUVLO
Expired
Expired
No
STAT1 = Off
Safety Timer Suspended
Charge Current = 0
EN High
Expired
Note 1: The qualification parameters are continuously
monitored throughout the charge cycle. Refer to
Section 4.1, “Charge Qualification and
Preconditioning”, for details.
Note 2: The charge current will be scaled based on the
die temperature during thermal regulation. Refer
to Section 4.5, “Thermal Regulation”, for
details.
Note 1
Note 1
STAT2 = OnSTAT2 = Flashing
STAT2 = Off
STAT2 = Flashing
STAT2 = Off
Note 2
STAT2 = Flashing
STAT1 = Off
(MCP73863/4)
(MCP73861/2)
STAT2 = Off
(All Devices)
2004-2013 Microchip Technology Inc. DS21893F-page 17
MCP73861/2/3/4
5.0 DETAILED DESCRIPTION
5.1 Analog Circuitry
5.1.1 BATTERY MANAGEMENT INPUT
SUPPLY (VDD1, VDD2)
The VDD input is the input supply to the MCP7386X.
The MCP7386X automatically enters a Power-down
mode if the voltage on the VDD input falls below the
UVLO voltage (VSTOP). This feature prevents draining
the battery pack when the VDD supply is not present.
The VDD inputs should be tied to ground with a resistor
<= 1.5 k to prevent VDD from floating and staying at
VBAT level if the input supply is disconnected. The
resistor will assure that VDD < VBAT when the input
supply is removed.
5.1.2 PROG INPUT
Fast charge current regulation can be scaled by placing
a programming resistor (RPROG) from the PROG input
to VSS. Connecting the PROG input to VSS allows for a
maximum fast charge current of 1.2A, typically. The
minimum fast charge current is 100 mA, set by letting
the PROG input float. The following formula calculates
the value for RPROG:
The preconditioning trickle-charge current and the
charge termination current are scaled to approximately
10% and 8% of IREG
, respectively.
5.1.3 CELL TEMPERATURE SENSOR
BIAS (THREF)
A 2.5V voltage reference is provided to bias an external
thermistor for continuous cell temperature monitoring
and prequalification. A ratio metric window comparison
is performed at threshold levels of VTHREF/2 and
VTHREF/4.
5.1.4 CELL TEMPERATURE SENSOR
INPUT (THERM)
The MCP73861/2/3/4 continuously monitors tempera-
ture by comparing the voltage between the THERM
input and VSS with the upper and lower temperature
thresholds. A negative or positive temperature coeffi-
cient, NTC or PTC thermistor and an external voltage-
divider typically develop this voltage. The temperature
sensing circuit has its own reference to which it
performs a ratio metric comparison. Therefore, it is
immune to fluctuations in the supply input (VDD). The
temperature-sensing circuit is removed from the
system when VDD is not applied, eliminating additional
discharge of the battery pack.
Figure 6-1 depicts a typical application circuit with
connection of the THERM input. The resistor values of
RT1 and RT2 are calculated with the following
equations.
For NTC thermistors:
For PTC thermistors:
Applying a voltage equal to VTHREF/3 to the THERM
input disables temperature monitoring.
5.1.5 TIMER SET INPUT (TIMER)
The TIMER input programs the period of the safety
timers by placing a timing capacitor (CTIMER) between
the TIMER input pin and VSS. Three safety timers are
programmed via the timing capacitor.
The preconditioning safety timer period:
The fast charge safety timer period:
The elapsed time termination period:
The preconditioning timer starts after qualification and
resets when the charge cycle transitions to the fast
charge, Constant-current mode. The fast charge timer
and the elapsed timer start once the MCP7386X
transitions from preconditioning. The fast charge timer
resets when the charge cycle transitions to the
Constant-voltage mode. The elapsed timer will expire
and terminate the charge if the sensed current does not
diminish below the termination threshold.
RPROG
13.2 11 IREG
12 IREG
1.2
----------------------------------------=
Where:
IREG = the desired fast charge current in amps.
RPROG = measured in k
RT1
2R
COLD RHOT
RCOLD RHOT
----------------------------------------------=
RT2
2R
COLD RHOT
RCOLD 3R
HOT
----------------------------------------------=
RT1
2R
COLD RHOT
RHOT RCOLD
----------------------------------------------=
RT2
2R
COLD RHOT
RHOT 3R
COLD
----------------------------------------------=
Where:
RCOLD and RHOT are the thermistor resis-
tance values at the temperature window of
interest.
tPRECON
CTIMER
0.1
F
-------------------1.0Hour
s=
tFAST
CTIMER
0.1
F
------------------- 1.5Hours
=
tTERM
CTIMER
0.1
F
-------------------3.0Hours
=
MCP73861/2/3/4
DS21893F-page 18 2004-2013 Microchip Technology Inc.
During thermal regulation, the timer is slowed down
proportional to the charge current.
5.1.6 BATTERY VOLTAGE SENSE (VBAT3)
The MCP7386X monitors the battery voltage at the
VBAT3 pin. This input is tied directly to the positive
terminal of the battery pack.
5.1.7 BATTERY CHARGE CONTROL
OUTPUT (VBAT1, VBAT2)
The battery charge control output is the drain terminal
of an internal P-channel MOSFET. The MCP7386X
provides constant current and voltage regulation to the
battery pack by controlling this MOSFET in the linear
region. The battery charge control output should be
connected to the positive terminal of the battery pack.
5.2 Digital Circuitry
5.2.1 CHARGE STATUS OUTPUTS
(STAT1, STAT2)
Two status outputs provide information on the state of
charge. The current-limited, open-drain outputs can be
used to illuminate external LEDs. Optionally, a pull-up
resistor can be used on the output for communication
with a host microcontroller. Ta b l e 5 - 1 summarizes the
state of the status outputs during a charge cycle.
The flashing rate (1 Hz) is based off a timer capacitor
(CTIMER) of 0.1 µF. The rate will vary based on the
value of the timer capacitor.
During a Fault condition, the STAT1 status output will
be off and the STAT2 status output will be on. To
recover from a Fault condition, the input voltage must
be removed and then reapplied, or the enable input
(EN) must be de-asserted to a logic-low, then asserted
to a logic-high.
When the voltage on the THERM input is outside the
preset window, the charge cycle will not start, or will be
suspended. The charge cycle is not terminated and
recovery is automatic. The charge cycle will resume (or
start) once the THERM input is valid and all other
qualification parameters are met. During an invalid
THERM condition, the STAT1 status output will be off
and the STAT2 status output will flash.
5.2.2 VSET INPUT
The VSET input selects the regulated output voltage of
the MCP7386X. With VSET tied to VSS, the MCP73861/
3 and MCP73862/4 regulate to 4.1V and 8.2V, respec-
tively. With VSET tied to VDD, the MCP73861/3 and
MCP73862/4 regulate to 4.2V and 8.4V, respectively.
5.2.3 LOGIC ENABLE (EN)
The logic enable input pin (EN) can be used to termi-
nate a charge at any time during the charge cycle, as
well as to initiate a charge cycle or initiate a recharge
cycle.
Applying a logic-high input signal to the EN pin, or tying
it to the input source, enables the device. Applying a
logic-low input signal disables the device and termi-
nates a charge cycle. When disabled, the device’s
supply current is reduced to 0.17 µA, typically.
TABLE 5-1: STATUS OUTPUTS
CHARGE
CYCLE STAT1 STAT1 STAT2
Qualification Off Off
Preconditioning On Off
Constant-Current
Fast Charge
On Off
Constant-Voltage On Off
Charge Complete Flashing (1 Hz,
50% duty cycle)
(MCP73861/2) Off
(All Devices)
Off
(MCP73863/4)
Fault Off On
THERM Invalid Off Flashing (1 Hz
50% duty cycle)
Disabled – Sleep
mode
Off Off
Input Voltage Dis-
connected
(1.5K Pulldown)
Off Off
Legend: Off state: Open-drain is high-impedance
On state: Open-drain can sink current
typically 7 mA
Flashing: Toggles between off state and
on state
2004-2013 Microchip Technology Inc. DS21893F-page 19
MCP73861/2/3/4
6.0 APPLICATIONS
The MCP7386X is designed to operate in conjunction
with a host microcontroller or in stand-alone applica-
tions. The MCP7386X provides the preferred charge
algorithm for Lithium-Ion and Lithium-Polymer cells
Constant-current followed by Constant-voltage.
Figure 6-1 illustrates a typical stand-alone application
circuit, while Figures 6-2 and 6-3 illustrate the
accompanying charge profile
.
FIGURE 6-1: Typical Application Circuit.
FIGURE 6-2: Typical Charge Profile.
ENSTAT1
STAT2
VSET
VSS3
VDD1
VDD2
VSS2
TIMER
PROG
THERM
THREF
VBAT3
VBAT2
VBAT1
CTIMER
Unregulated
Wall Cube
RPROG
RT1
RT2
+
Single
Lithium-Ion
Cell
VSS1
1
2
3
4
MCP73861
141516
5678
9
10
11
12
13
1.5K
Regulation
Voltage
(VREG)
Regulation
Current
(IREG)
Transition
Threshold
(VPTH)
Precondition
Current
(IPREG)
Precondition
Safety Timer
Fast Charge
Safety Timer
Elapsed Time
Termination Timer
Charge
Voltage
Preconditioning
Mode
Constant-Current
Mode
Constant-Voltage
Mode
Charge
Current
Termination
Current
(ITERM)
MCP73861/2/3/4
DS21893F-page 20 2004-2013 Microchip Technology Inc.
FIGURE 6-3: Typical Charge Profile in Thermal Regulation.
6.1 Application Circuit Design
Due to the low efficiency of linear charging, the most
important factors are thermal design and cost, which
are a direct function of the input voltage, output current
and thermal impedance between the battery charger
and the ambient cooling air. The worst-case situation is
when the device has transitioned from the
Preconditioning mode to the Constant-current mode. In
this situation, the battery charger has to dissipate the
maximum power. A trade-off must be made between
the charge current, cost and thermal requirements of
the charger.
6.1.1 COMPONENT SELECTION
Selection of the external components in Figure 6-1 is
crucial to the integrity and reliability of the charging
system. The following discussion is intended as a guide
for the component selection process.
6.1.1.1 Current Programming Resistor
(RPROG)
The preferred fast charge current for Lithium-Ion cells
is at the 1C rate, with an absolute maximum current at
the 2C rate. For example, a 500 mAh battery pack has
a preferred fast charge current of 500 mA. Charging at
this rate provides the shortest charge cycle times
without degradation to the battery pack performance or
life.
1200 mA is the maximum charge current obtainable
from the MCP7386X. For this situation, the PROG input
should be connected directly to VSS.
6.1.1.2 Thermal Considerations
The worst-case power dissipation in the battery
charger occurs when the input voltage is at the
maximum and the device has transitioned from the Pre-
conditioning mode to the Constant-current mode. In
this case, the power dissipation is:
Regulation
Voltage
(VREG)
Regulation
Current
(IREG)
Transition
Threshold
(VPTH)
Precondition
Safety Timer
Fast Charge
Safety Timer
Elapsed Time
Termination Timer
Charge
Voltage
Preconditioning
Mode
Constant-Current
Mode
Constant-Voltage
Mode
Charge
Current
Precondition
Current
(IPREG)
Termination
Current
(ITERM)
PowerDissipation VDDMAX VPTHMIN
IREGMAX
=
Where:
VDDMAX = the maximum input voltage
IREGMAX = the maximum fast charge current
VPTHMIN = the minimum transition threshold
voltage
2004-2013 Microchip Technology Inc. DS21893F-page 21
MCP73861/2/3/4
Power dissipation with a 5V, ±10% input voltage source
is:
With the battery charger mounted on a 1 in2 pad of
1 oz. copper, the junction temperature rise is 60°C,
approximately. This would allow for a maximum operat-
ing ambient temperature of 50°C before thermal
regulation is entered.
6.1.1.3 External Capacitors
The MCP7386X is stable with or without a battery load.
In order to maintain good AC stability in the Constant-
voltage mode, a minimum capacitance of 4.7 µF is
recommended to bypass the VBAT pin to VSS. This
capacitance provides compensation when there is no
battery load. In addition, the battery and interconnec-
tions appear inductive at high frequencies. These
elements are in the control feedback loop during
Constant-voltage mode. Therefore, the bypass
capacitance may be necessary to compensate for the
inductive nature of the battery pack.
Virtually any good quality output filter capacitor can be
used, independent of the capacitor’s minimum
Effective Series Resistance (ESR) value. The actual
value of the capacitor (and its associated ESR)
depends on the output load current. A 4.7 µF ceramic,
tantalum or aluminum electrolytic capacitor at the
output is usually sufficient to ensure stability for up to a
1A output current.
6.1.1.4 Reverse-Blocking Protection
The MCP7386X provides protection from a faulted or
shorted input, or from a reversed-polarity input source.
Without the protection, a faulted or shorted input would
discharge the battery pack through the body diode of
the internal pass transistor.
6.1.1.5 Enable Interface
In the stand-alone configuration, the enable pin is
generally tied to the input voltage. The MCP7386X
automatically enters a Low-power mode when voltage
on the VDD input falls below the UVLO voltage (VSTOP),
reducing the battery drain current to 0.23 µA,typically.
6.1.1.6 Charge Status Interface
Two status outputs provide information on the state of
charge. The current-limited, open-drain outputs can be
used to illuminate external LEDs. Refer to Table 5-1 for
a summary of the state of the status outputs during a
charge cycle.
6.2 PCB Layout Issues
For optimum voltage regulation, place the battery pack
as close as possible to the device’s VBAT and VSS pins,
recommended to minimize voltage drops along the
high current-carrying PCB traces.
If the PCB layout is used as a heatsink, adding many
vias in the heatsink pad can help conduct more heat to
the backplane of the PCB, thus reducing the maximum
junction temperature.
PowerDissipation 5.5V 2.7V575mA
1.61W==
MCP73861/2/3/4
DS21893F-page 22 2004-2013 Microchip Technology Inc.
NOTES:
2004-2013 Microchip Technology Inc. DS21893F-page 23
MCP73861/2/3/4
7.0 PACKAGING INFORMATION
7.1 Package Marking Information
16-Lead QFN Example:
16-Lead SOIC (150 mil) Example:
XXXXXXXXXXXXX
YYWWNNN
XXXXXXXXXXXXX
MCP73861
1108256
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
I/SL^^
3
e
XXXXX
XXXXXX
XXXXXX
YWWNNN
73861
I/ML
1108
256
MCP73861/2/3/4
DS21893F-page 24 2004-2013 Microchip Technology Inc.
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2004-2013 Microchip Technology Inc. DS21893F-page 25
MCP73861/2/3/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MCP73861/2/3/4
DS21893F-page 26 2004-2013 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2004-2013 Microchip Technology Inc. DS21893F-page 27
MCP73861/2/3/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MCP73861/2/3/4
DS21893F-page 28 2004-2013 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2004-2013 Microchip Technology Inc. DS21893F-page 29
MCP73861/2/3/4
APPENDIX A: REVISION HISTORY
Revision F (March 2013)
The following is the list of modifications:
1. Added the Output Reverse Leakage Switchover
Time parameter to the DC Characteristics table.
2. Updated Section 3.2.
3. Updated Section 5.1.1.
4. Updated Figure 6-1.
Revision E (April 2011)
The following is the list of modifications:
1. Updated Figure 2-4.
Revision D (December 2008)
The following is the list of modifications:
1. Updated package outline diagrams.
Revision C (August 2005)
The following is the list of modifications:
1. Added MCP73863 and MCP73864 devices
throughout data sheet.
2. Added Appendix A: Revision History.
3. Updated QFN and SOIC package diagrams.
Revision B (December 2004)
The following is the list of modifications:
Added SOIC package throughout data sheet.
Revision A (June 2004)
Original Release of this Document.
MCP73861/2/3/4
DS21893F-page 30 2004-2013 Microchip Technology Inc.
NOTES:
2004-2013 Microchip Technology Inc. DS21893F-page 31
MCP73861/2/3/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact the Microchip sales office.
PART NO. X/XX
PackageTemperature
Range
Device
Device: MCP73861: Single-Cell Charge Controller with
Temperature Monitor
MCP73861T: Single-Cell Charge Controller with
Temperature Monitor, Tape and Reel
MCP73862: Dual Series Cells Charge Controller with
Temperature Monitor
MCP73862T: Dual Series Cells Charge Controller with
Temperature Monitor, Tape and Reel
MCP73863: Single-cell Charge Controller with
Temperature Monitor
MCP73863T: Single-Cell Charge Controller with
Temperature Monitor, Tape and Reel
MCP73864: Dual Series Cells Charge Controller with
Temperature Monitor
MCP73864T: Dual Series Cells Charge Controller with
Temperature Monitor, Tape and Reel
Temperature Range: I= -40C to +85C (Industrial)
Package: ML = Plastic Quad Flat No Lead, 4x4 mm Body (QFN),
16-lead
SL = Plastic Small Outline, 150 mm Body (SOIC),
16-lead
Examples:
a) MCP73861-I/ML: Single-Cell Controller
16LD-QFN package.
b) MCP73861T-I/ML: Tape and Reel,
Single-Cell Controller
16LD-QFN package.
c) MCP73861-I/SL: Single-Cell Controller
16LD-SOIC package.
d) MCP73861T-I/SL: Tape and Reel,
Single-Cell Controller
16LD-SOIC package.
a) MCP73862-I/ML: Dual-Cell Controller
16LD-QFN package.
b) MCP73862T-I/ML: Tape and Reel,
Dual-Cell Controller
16LD-QFN package.
c) MCP73862-I/SL: Dual-Cell Controller
16LD-SOIC package.
d) MCP73862T-I/SL: Tape and Reel,
Dual-Cell Controller
16LD-SOIC package.
a) MCP73863-I/ML: Single-Cell Controller
16LD-QFN package.
b) MCP73863T-I/ML: Tape and Reel,
Single-Cell Controller
16LD-QFN package.
c) MCP73863-I/SL: Single-Cell Controller
16LD-SOIC package.
d) MCP73863T-I/SL: Tape and Reel,
Single-Cell Controller
16LD-SOIC package.
a) MCP73864-I/ML: Dual-Cell Controller
16LD-QFN package.
b) MCP73864T-I/ML: Tape and Reel,
Dual-Cell Controller
16LD-QFN package.
c) MCP73864-I/SL: Dual-Cell Controller
16LD-SOIC package.
d) MCP73864T-I/SL: Tape and Reel,
Dual-Cell Controller
16LD-SOIC package.
MCP73861/2/3/4
DS21893F-page 32 2004-2013 Microchip Technology Inc.
NOTES:
2004-2013 Microchip Technology Inc. DS21893F-page 33
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2004-2013, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620770405
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT S
YSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
DS21893F-page 34 2004-2013 Microchip Technology Inc.
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11/29/12