MDT10P21 - Micon Design Technology Co., Ltd.

MDT10P21

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1. General Description

This EPROM-Based 8-bit micro-controller uses a

fully static CMOS design technology to achieve high

speed, small size, low power and high noise

immunity.

On chip memory includes 0.5K words EPROM and80

bytes static RAM.

Four comparator inputs with external Vref (not for 18

pin package) are also provided.

2. Features

u Fully CMOS static design

u 8-bit data bus

u On chip EPROM size : 0.5 K words

u Internal RAM size : 80 bytes

(72 general purpose registers, 8 special

registers)

u 36 single word instructions

u 14-bit instructions

u 2-level stacks

u Operating voltage : 2.3V ~ 5.5 V

u Operating frequency : 0 ~ 20 MHz

u The most fast execution time is 200 ns under

20 MHz in all single cycle instructions except

the branch instruction

u Addressing modes include direct, indirect and

relative addressing modes

u Built-in Power-on Reset

u 4 Channel comparator

u Power edge-detector Reset

u Sleep Mode for power saving

u 8-bit real time clock/counter(RTCC) with 8-bit

programmable prescaler

u 4 types of oscillator can be selected by

programming option:

RC－Low cost RC oscillator

LFXT－Low frequency crystal oscillator

XTAL－Standard crystal oscillator

HFXT－High frequency crystal oscillator

u 4 oscillator start-up time can be selected by

programming option:

150 µs, 20 ms, 40 ms, 80 ms

u On-chip RC oscillator based Watchdog

Timer(WDT) can be operated freely

u 12 I/O(for 18 pins package),14 I/O(for 20 pins

package),16 I/O(for 22/24 pins package) pins

with their own independent direction control

3. Applications

The application areas of this MDT10P21 range from

appliance motor control and high speed automotive

to low power remote transmitters/receivers, pointing

devices, and telecommunications processors, such

as Remote controller, small instruments, chargers,

toy, automobile and PC peripheral … etc

MDT10P21

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4. Pin Assignment

※ A1

：

20PINS, A2

：

22PINS,

A3

：

24PINS, A5 :18 PINS

※ P

－

PDIP,S

－

SOP, K

－

SKINNY

A1P,A1S

PA5 1 20 PA4/VREF

PA2/CIC2 2 19 PA1/CIC1

PA3/CIC3 3 18 PA0/CIC0

RTCC 4 17 OSC1

/MCLR 5 16 OSC2

Vss 6 15 Vdd

PB0 7 14 PB7

PB1 8 13 PB6

PB2 9 12 PB5

PB3 10 11 PB4

A2K

PA7 1 22 PA6

PA5 2 21 PA4/VREF

PA2/CIC2 3 20 PA1/CIC1

PA3/CIC3 4 19 PA0/CIC0

RTCC 5 18 OSC1

/MCLR 6 17 OSC2

Vss 7 16 Vdd

PB0 8 15 PB7

PB1 9 14 PB6

PB2 10 13 PB5

PB3 11 12 PB4

A3S

NC 1 24 NC

PA7 2 23 PA6

PA5 3 22 PA4/VREF

PA2/CIC2 4 21 PA1/CIC1

PA3/CIC3 5 20 PA0/CIC0

RTCC 6 19 OSC1

/MCLR 7 18 OSC2

Vss 8 17 Vdd

PB0 9 16 PB7

PB1 10 15 PB6

PB2 11 14 PB5

PB3 12 13 PB4

A5P,A5S

PA2CIC2

1 18

PA1/CIC1

PA3/CIC3

2 17

PA0/CIC0

RTCC

3 16

OSC1

/MCLR

4 15

OSC2

Vss

5 14

Vdd

PB0

6 13

PB7

PB1

7 12

PB6

PB2

8 11

PB5

PB3

9 10

PB4

MDT10P21

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5. Block Diagram

Stack Two Levels

Program Counters

Oscillator Circuit

Power on Reset

Power Down Reset

8-bit Timer/Counter

EPROM

0.5K

×

14 (MDT10P21)

Instruction

Register

Instruction

Decoder

Working Register

ALU

Prescale

RAM

72

×

8

Special Register

Control Circuit

Status Register

WDT/OST

Timer

Port B

Port A

OS

C1 OS

C2

MC

LR

Data 8-bit

RTCC

9 bits

9 bits 14 bits Port

PA0~P

A7

(22,24

pins)

PA0~P

A5

(20

pins)

PA0~P

A3

(18

pins)

8 bits

Port

PB0~P

B7

8 bits

D0~D7

Comparat

or mode

Register

CMR0~C

MR5

MDT10P21

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6. Pin Function Description

Pin Name I/O Function Description

PA0~PA7 I/O PA0~PA3 : TTL input level or comparator input

PA4 : TTL input level or comparator VREF input

PA5~PA7 : TTL input level

PB0~PB7 I/O Port B, TTL input level

RTCC I Real Time Clock/Counter, Schmitt Trigger input levels

/MCLR I Master Clear, Schmitt Trigger input levels

OSC1 I Oscillator Input

OSC2 O Oscillator Output

Vdd Power supply

Vss Ground

NC Unused ,do not connect

7. Memory Map

(A) Register Map

Address Description

00 Indirect Addressing Register

01 RTCC

02 PC

03 STATUS

04 MSR

05 Port A

06 Port B

07 Control register for comparator

08~0F Internal RAM, General Purpose Register

10~1F Internal RAM, Memory bank 0

30~3F Internal RAM, Memory bank 1

50~5F Internal RAM, Memory bank 2

70~7F Internal RAM, memory bank 3

MDT10P21

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(1) IAR ( Indirect Address Register) : R0

(2) RTCC (Real Time Counter/Counter Register) : R1

(3) PC (Program Counter) : R2

Write PC, CALL --- always 0

LJUMP, JUMP, LCALL --- from instruction word

RTIW, RET --- from STACK

A8 A7~A0

Write PC --- from ALU

LJUMP, JUMP, LCALL, CALL --- from instruction word

RTIW, RET --- from STACK

(4) STATUS (Status register) : R3

Bit Symbol Function

0

1

2

3

4

5-7

C

HC

Z

PF

TF

——

Carry bit

Half Carry bit

Zero bit

Power loss Flag bit

Time overflow Flag bit

General purpose bit

(5) MSR (Memory Select Register) : R4

Memory Select Register :

00 : 10~1F

01 : 30~3F

10 : 50~5F

11 : 70~7F

b7 b6 b5 b4 b3 b2 b1 b0

Read only “1”

Indirect Addressing Mode

(6) PORT A : R5

PA7~PA0, I/O Register for 22, 24 pins

PA5~PA0, I/O Register for 20 pins

PA3~PA0, I/O Register for 18 pins

MDT10P21

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(7) PORT B : R6

PB7~PB0, I/O Register

(8) CMR(Comparator Mode Register) : R7

Bit Function

0

1

2

3

5:4

7:6

0: Define PA0 as TTL input

1: Define PA0 as comparator input

0: Define PA1 as TTL input

1: Define PA1 as comparator input

0: Define PA2 as TTL input

1: Define PA2 as comparator input

0: Define PA3 as TTL input

1: Define PA3 as comparator input

Reference Voltage select

00: 1/4 VDD

01: 1/2 VDD

10: 3/4 VDD

11: VREF (External pin and PA4 must be set to input)

Register bits

(9) TMR (Time Mode Register)

Bit Symbol Function

Prescaler Value RTCC rate WDT rate

2—0

PS2—0

0 0 0

0 0 1

0 1 0

0 1 1

1 0 0

1 0 1

1 1 0

1 1 1

1 : 2

1 : 4

1 : 8

1 : 16

1 : 32

1 : 64

1 : 128

1 : 256

1 : 1

1 : 2

1 : 4

1 : 8

1 : 16

1 : 32

1 : 64

1 : 128

3

PSC Prescaler assignment bit :

0 — RTCC

1 — Watchdog Timer

4

TCE RTCC signal Edge :

0 — Increment on low-to-high transition on RTCC pin

1 — Increment on high-to-low transition on RTCC pin

5

TCS RTCC signal set :

0 — Internal instruction cycle clock

1 — Transition on RTCC pin

MDT10P21

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(10) CPIO A, CPIO B (Control Port I/O Mode Register)

The CPIO register is “write-only”

＝“0”, I/O pin in output mode;

＝“1”, I/O pin in input mode.

(11) EPROM Option by writer programming :

A. FIRST WORD

Oscillator Type Oscillator Start-up Time

RC Oscillator 150 µs

LFXT Oscillator 20 ms

XTAL Oscillator 40 ms

HFXT Oscillator 80 ms

Watchdog Timer control

Watchdog timer disable all the time

Watchdog timer enable all the time

Power Edge Detect Security bit

PED Disable Security Disable

PED Enable Security Enable

(B) Program Memory

Address Description

000- 1FF Program memory

1FF The starting address of the power on, external reset or WDT

8. Reset Condition for all Registers

Register Address Power-On Reset /MCLR Reset WDT Reset

CPIO A －－ 1111 1111 1111 1111 1111 1111

CPIO B －－ 1111 1111 1111 1111 1111 1111

TMR －－ --11 1111 --11 1111 --11 1111

IAR 00h －－－

RTCC 01h xxxx xxxx uuuu uuuu uuuu uuuu

PC 02h 1111 1111 1111 1111 1111 1111

MDT10P21

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Register Address Power-On Reset /MCLR Reset WDT Reset

STATUS 03h 0001 1xxx 000# #uuu 000# #uuu

MSR 04h 100x xxxx 100u uuuu 1uuu uuuu

PORT A 05h xxxx xxxx uuuuuuuu uuuu uuuu

PORT B 06h xxxx xxxx uuuu uuuu uuuu uuuu

CMR 07h 0000 0000 uuuu uuuu uuuu uuuu

Note : u＝unchanged, x＝unknown, - ＝unimplemented, read as “0”

#＝value depends on the condition of the following table

Condition Status: bit 4 Status: bit 3

/MCLR reset (not during SLEEP) U u

/MCLR reset during SLEEP 1 0

WDT reset (not during SLEEP) 0 1

WDT reset during SLEEP 0 0

9. Instruction Set

Instruction Code Mnemonic

Operands Function Operating Status

010000 00000000 NOP

No operation

None

010000 00000001 CLRWT Clear Watchdog timer 0→WT TF, PF

010000 00000010 SLEEP Sleep mode 0→WT, stop OSC

TF, PF

010000 00000011 TMODE Load W to TMODE register W→TMODE None

010000 00000100 RET Return Stack→PC None

010000 00000rrr CPIO R Control I/O port register W→CPIO r None

010001 1rrrrrrr STWR R Store W to register W→R None

011000 trrrrrrr LDR R, t Load register R→t Z

111010 iiiiiiii LDWI I Load immediate to W I→W None

010111 trrrrrrr SWAPR R, t Swap halves register [R(0~3)↔R(4~7)]→t None

011001 trrrrrrr INCR R, t Increment register R + 1→t Z

011010 trrrrrrr INCRSZ R, t Increment register, skip if zero R + 1→t None

011011 trrrrrrr ADDWR R, t Add W and register W + R→t C, HC, Z

011100 trrrrrrr SUBWR R, t Subtract W from register R ﹣W→t (R+/W+1→

t) C, HC, Z

011101 trrrrrrr DECR R, t Decrement register R ﹣1→t Z

011110 trrrrrrr DECRSZ R, t Decrement register, skip if zero R ﹣1→t None

010010 trrrrrrr ANDWR R, t AND W and register R ∩ W→t Z

MDT10P21

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Instruction Code Mnemonic

Operands Function Operating Status

110100 iiiiiiii ANDWI i AND W and immediate i ∩ W→W Z

010011 trrrrrrr IORWR R, t Inclu. OR W and register R ∪ W→t Z

110101 iiiiiiii IORWI i Inclu. OR W and immediate i ∪ W→W Z

010100 trrrrrrr XORWR R, t Exclu. OR W and register R ⊕ W→t Z

110110 iiiiiiii XORWI i Exclu. OR W and immediate i ⊕ W→W Z

011111 trrrrrrr COMR R, t Complement register /R→t Z

010110 trrrrrrr RRR R, t Rotate right register R(n) →R(n-1), C→

R(7), R(0)→C C

010101 trrrrrrr RLR R, t Rotate left register R(n)→r(n+1),

C→R(0), R(7)→C C

010000 1xxxxxxx CLRW Clear working register 0→W Z

010001 0rrrrrrr CLRR R Clear register 0→R Z

0000bb brrrrrrr BCR R, b Bit clear 0→R(b) None

0010bb brrrrrrr BSR R, b Bit set 1→R(b) None

0001bb brrrrrrr BTSC R, b Bit Test, skip if clear Skip if R(b)=0 None

0011bb brrrrrrr BTSS R, b Bit Test, skip if set Skip if R(b)=1 None

100nnn nnnnnnnn LCALL n Long CALL subroutine n→PC, PC+1→Stack None

101nnn nnnnnnnn LJUMP n Long JUMP to address n→PC None

110000 nnnnnnnn CALL n Call subroutine n→PC, PC+1→Stack None

110001 iiiiiiii RTIW i Return, place immediate to W Stack→PC,i→W None

11001n nnnnnnnn JUMP n JUMP to address n→PC None

Note : W : Working register b : Bit position

WT : Watchdog timer t : Target

TMODE : TMODE mode register 0 : Working register

CPIO : Control I/O port register 1 : General register

TF : Timer overflow flag R : General register address

PF : Power loss flag C : Carry flag

PC : Program Counter HC : Half carry

OSC : Oscillator Z : Zero flag

Inclu. : Inclusive ‘∪’ / : Complement

Exclu. : Exclusive ‘⊕’ x : Don’t care

AND : Logic AND ‘∩’ i : Immediate data ( 8 bits )

n : Immediate address

MDT10P21

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10. Electrical Characteristics

(Operating temperature at 25℃).

Sym Description Condition Min Typ Max Unit

Vdd Operating voltage 2.3 6.3 V

VIL Input Low Voltage

PA, PB

RTCC, /MCLR

Vdd=5V

-0.6

1.0

V

VIH Input high Voltage

PA, PB

RTCC, /MCLR

Vdd=5V

2.0

3.2

Vdd

V

IIL Input leakage current Vdd=5V +/-1 µA

VOL Output Low Voltage

PA, PB

Vdd=5V, IOL=20mA

Vdd=5V, IOL=5mA

0.4

0.1

V

VOH Output High Voltage

PA, PB

Vdd=5V, IOH= -20mA

Vdd=5V, IOH= -5mA

3.8

4.5

V

Islp Sleep current (WDT disable) Vdd＝2.3 ~ 6.3 V 0.1 1.0 µA

Islp Sleep current (WDT enable) Vdd＝2.3 V

Vdd＝3.0 V

Vdd＝4.0 V

Vdd＝5.0 V

Vdd＝6.3 V

1

3

8

17

36

µA

Vpr Power Edge-detector Reset Voltage 1.1 1.3 V

Twdt The basic WDT time-out cycle time Vdd＝2.3 V

Vdd＝3.0 V

Vdd＝4.0 V

Vdd＝5.0 V

Vdd＝6.3 V

27.0

23.2

20.4

18.4

16.8

mS

TFLT /MCLR filter Vdd＝5.0 V 600 nS

Icc Comparator Supply current (one

comparator)

Vdd=5.0v 15 µA

Vref Input reference voltage Vdd=2.5v ~6.3v Vdd-0.8v V

---

Comparator Response time

V-=Vdd/4, V+=V- ± 0.2v

V-=Vdd/2, V+=V- ± 0.2v

V-=Vdd3/4, V+=V- ± 0.2v

V-=VDD-0.8,V+=V± 0.2v

Vdd=5.0v , V- = Vref

V+ = (PA0~PA3)

8

µS

MDT10P21

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11. Operating Current

Temperature＝25 ℃, the typical value as followings :

11.1 OSC Type＝RC ; WDT－Enable; Comparator － Disable @ Vdd＝5.0 V

Cext. (F) Rext. (Ohm) Frequency (Hz) Current (A)

4.7 K 10.5M 1.35 mA

10.0 K 5.36M 750 µA

3P 47.0 K 1.24M 250 µA

100.0 K 589K 180 µA

300.0 K 200K 130 µA

470.0 K 126K 120 µA

4.7 K 5.6M 770 µA

10.0 K 2.85M 460 µA

20P 47.0 K 640K 190 µA

100.0 K 300K 150 µA

300.0 K 104K 125 µA

470.0 K 64K 115 µA

4.7 K 1.68M 310 µA

10.0 K 834K 210 µA

100P 47.0 K 182K 125 µA

100.0 K 87.6K 118 µA

300.0 K 29.6K 110 µA

470.0 K 18.6K 105 µA

4.7 K 748K 200 µA

10.0 K 367K 155 µA

300P 47.0 K 80K 115 µA

100.0 K 38K 110 µA

300.0 K 12.8K 105 µA

470.0 K 8K 100 µA

MDT10P21

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11.2 OSC Type＝LF (C=20 p); WDT－Disable ; Comparator － Disable

Voltage/Frequency 32 K 455 K 1 M Sleep

2.1 V 3.0uA @2.6v 32.0uA

@2.2v 42.0uA

＜1.0 µA

3.0 V 6.0uA 45uA 60uA ＜1.0 µA

4.0 V 12.0uA 65uA 100uA ＜1.0 µA

5.0 V 30.0uA 100uA 150uA ＜1.0 µA

6.3 V 110uA 185uA 260uA ＜1.0 µA

11.3 OSC Type＝XT (C=10 p); WDT－Enable ; Comparator － Disable

Voltage/Frequency 1 M 4 M 10 M Sleep

2.1 V 65uA 200uA 360uA ＜1.0 µA

3.0 V 136uA 350uA 650uA 3 µA

4.0 V 252uA 550uA 1.0mA 8 µA

5.0 V 422uA 820uA 1.6mA 17 µA

6.3 V 810uA 1.36mA 2.2mA 36 µA

11.4 OSC Type＝HF (C=10 p); WDT－Enable ; Comparator － Disable

Voltage/Frequency 4 M 10 M 20 M Sleep

2.1 V 200uA 450uA @2.2v 940uA

＜1.0 µA

3.0 V 410uA 810uA 1.37mA 3 µA

4.0 V 620uA 1.30mA 2.0mA 8 µA

5.0 V 1mA 1.70mA 3.0mA 17 µA

6.3 V 1.56mA 2.50mA 4.0mA 36 µA

11.5 Power Edge-detector Reset Voltage (Not in Sleep Mode), @ Vdd＝5.0 V

Vpr≦2.1~2.2 V Vpr ﹕Vdd (Power Supply)

MDT10P21

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12. Port A Equivalent Circuit

PA0-PA3

I/O Control

Write

Data Bus

Read

Data O/P

Latch

D

G

D

I/O

Control

Latch

C

K

Q

B

QB

G

QB

D

Input Resistor

Port I/O

Data I/P

Latch

VREF

Compartor Control

+

-

S

0

1

comparator level

TTL input level

PA4

I/O Control

Write

Data Bus

Read

Data O/P

Latch

D

G

D

I/O

Control

Latch

CK

Q

QB

Q

B

G

QBD

Input Resistor

Port I/O

Data I/P

Latch

TTL Input Level

Vref

3

2

1

0

S0 S1

CMR_4

CMR_5

3/4 VDD

1/2 VDD

1/4 VDD

comparator

enable

MDT10P21

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PA5-PA7

I/O Control

Write

Data Bus

Read

Data O/P

Latch

D

G

D

I/O

Control

Latch

CK

Q

QB

Q

B

G

QBDInput Resistor

Port I/O

Data I/P

Latch

TTL Input Level

Port B Equivalent Circuit

I/O Control

Write

Data Bus

Read

Data O/P

Latch

D

G

DI/O

Control

Latch

CK

Q

QB

Q

B

G

QBDInput Resistor

Port I/O

Data I/P

Latch TTL Input Level

MDT10P21

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13. MCLRB and RTCC Input Equivalent Circuit

R ≒ 1 K

Schmitt Trigger

MCLRB

R

≒

1 K

Schmitt Trigger

RTCC

MDT10P21

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14. External Capacitor Selection For Crystal Oscillator

@ Vdd＝5.0 V

Osc. Type Resonator Freq. Capacity Range

20 MHz 10 pF ~ 50 pF

HF 10 MHz 20 pF ~ 50 pF

4 MHz 10 pF ~ 30 pF

10 MHz 10 pF ~ 50 pF

XT 4 MHz 10 pF ~ 50 pF

1 MHz 20 pF ~50 pF

1 MHz 20 pF ~ 30 pF

LF 455 K 20 pF ~30 pF

32 K 20 pF ~30 pF

MDT10P21

OSC1 OSC2

C1 C2

To increase the stability of oscillator and the ability of anti-noise, the above values of the external capacitor are for

reference only, but the higher capacitance also increases the start-up time.