IRLR/U2705
HEXFET® Power MOSFET
S
D
G
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 2.2
RθJA Case-to-Ambient (PCB mount)** ––– 50 °C/W
RθJA Junction-to-Ambient ––– 110
Thermal Resistance
VDSS = 55V
RDS(on) = 0.040Ω
ID = 28A
Description
4/1/03
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D-Pak
TO-252AA I-Pak
TO-251AA
lLogic-Level Gate Drive
lUltra Low On-Resistance
lSurface Mount (IRLR2705)
lStraight Lead (IRLU2705)
lAdvanced Process Technology
lFast Switching
lFully Avalanche Rated
Fifth Generation HEXFETs from International Rectifier utilize advanced
processing techniques to achieve the lowest possible on-resistance per
silicon area. This benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs are well known for,
provides the designer with an extremely efficient device for use in a wide
variety of applications.
The D-PAK is designed for surface mounting using vapor phase, infrared, or
wave soldering techniques. The straight lead version (IRFU series) is for
through-hole mounting applications. Power dissipation levels up to 1.5 watts
are possible in typical surface mount applications.
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 28
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 20 A
IDM Pulsed Drain Current 110
PD @TC = 25°C Power Dissipation 6 8 W
Linear Derating Factor 0.45 W/°C
VGS Gate-to-Source Voltage ± 16 V
EAS Single Pulse Avalanche Energy110 mJ
IAR Avalanche Current16 A
EAR Repetitive Avalanche Energy6.8 mJ
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case ) °C
Absolute Maximum Ratings
PD- 91317C
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S
D
G
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode) ––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 17A, VGS = 0V
trr Reverse Recovery Time ––– 76 11 0 ns TJ = 25°C, IF = 16A
Qrr Reverse RecoveryCharge ––– 190 290 nC di/dt = 100A/µs

ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Source-Drain Ratings and Characteristics
28
110
A
VDD = 25V, starting TJ = 25°C, L = 610µH
RG = 25Ω, IAS = 16A. (See Figure 12)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width ≤ 300µs; duty cycle ≤ 2%.
This is applied for I-PAK, LS of D-PAK is measured between
lead and center of die contact.
Uses IRLZ34N data and test conditions.
ISD ≤ 16A, di/dt ≤ 270A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Notes:
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 55 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient ––– 0.065 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.040 VGS = 10V, ID = 17A
––– ––– 0.051 W VGS = 5.0V, ID = 17A
––– ––– 0.065 VGS = 4.0V, ID = 14A
VGS(th) Gate Threshold Voltage 1.0 ––– 2.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 11 ––– ––– S VDS = 25V, ID = 16A
––– ––– 25 µA VDS = 55V, VGS = 0V
––– ––– 250 VDS = 44V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 16V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -16V
QgTotal Gate Charge ––– ––– 25 ID = 16A
Qgs Gate-to-Source Charge ––– ––– 5.2 nC VDS = 44V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 14 VGS = 5.0V, See Fig. 6 and 13 
td(on) Turn-On Delay Time ––– 8.9 ––– VDD = 28V
trRise Time ––– 100 ––– ns ID = 16A
td(off) Turn-Off Delay Time –– – 21 ––– RG = 6.5Ω, VGS = 5.0V
tfFall Time ––– 29 ––– RD = 1.8Ω, See Fig. 10 
Between lead,
6mm (0.25in.)
from package
and center of die contact
Ciss Input Capacitance ––– 880 ––– VGS = 0V
Coss Output Capacitance ––– 220 ––– pF VDS = 25V
Crss Reverse Transfer Capacitance –– – 9 4 –– – ƒ = 1.0MHz, See Fig. 5
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
nH
IGSS
S
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LSInternal Source Inductance ––– 7.5 –––
RDS(on) Static Drain-to-Source On-Resistance
LDInternal Drain Inductance  4.5 
IDSS Drain-to-Source Leakage Current
Caculated continuous current based on maximum allowable
junction temperature; Package limitation current = 20A.
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Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
0.1
1
10
100
1000
0.1 1 10 100
I , Drain-to-Source Current (A)
D
V , Drain-to-Source Voltage (V)
DS
A
20µs PULSE WIDTH
T = 175°C
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
2.5V
J
0.1
1
10
100
1000
0.1 1 10 100
I , Drai n-to-So urce Cu rrent (A )
D
V , Drain-to-Source Voltage (V)
DS
A
20µs PULSE WIDTH
T = 25°C
J
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
2.5V
0.1
1
10
100
1000
2345678910
T = 25°C
J
GS
V , Gate-to-Source Voltage (V)
D
I , Drain-to-Source Current (A)
T = 175 ° C
J
A
V = 25V
20µs PULSE WIDTH
DS
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
J
T , Junction Temperature (°C)
R , Drain-to-Source On Resis tance
DS(on)
(Normalized)
V = 10V
GS
A
I = 27A
D
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Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0
200
400
600
800
1000
1200
1400
1 10 100
C, Capaci t anc e (pF)
DS
V , Drain-to-Source Voltage (V)
A
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
0
3
6
9
12
15
0 4 8 121620242832
Q , Total Gate Cha rge (nC)
G
V , Gate-to-Source Voltage (V)
GS
A
FOR TEST CIRCUIT
SEE FIGURE 13
I = 16A
V = 44V
V = 28V
D
DS
DS
1
10
100
1000
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
T = 25°C
J
V = 0V
GS
V , Source-to-Drain Voltage (V)
I , Revers e Drain Current ( A )
SD
SD
A
T = 175°C
J
1
10
100
1000
1 10 100
V , Drain-to-Source Voltage (V)
DS
I , Dr ai n Cur r ent (A)
OPERATION IN THIS AREA LIMITED
BY R
D
DS(on)
10µs
100µs
1ms
10ms
A
T = 25°C
T = 175°C
Sing le Pulse
C
J
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Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
5V
+
-
VDD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERM AL RESPONSE)
25 50 75 100 125 150 175
0
5
10
15
20
25
30
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
LIMITED BY PACKAGE
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QG
QGS QGD
VG
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
0
50
100
150
200
250
25 50 75 100 125 150 175
J
E , Single Pulse Avalanche Energy (m J)
AS
Starting T , Junction Temperature (°C)
V = 25V
I
TOP 6.6A
11A
BOTTOM 16A
DD
D
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P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W.
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFETS
* VGS = 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
RG
VDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
*
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Package Outline
TO-252AA Outline
Dimensions are shown in millimeters (inches)
TO-252AA (D-PARK)
Part Marking Information
6.73 ( . 265)
6.35 ( . 250)
- A -
4
1 2 3
6.22 (.245)
5.97 (.235)
- B -
3X 0.89 ( . 035)
0.64 ( . 025)
0.25 (.010) M A M B
4.57 (.180)
2.28 (. 090)
2X 1.14 ( . 045)
0.76 ( . 030)
1.52 (.060)
1.15 (.045)
1.02 ( . 040)
1.64 ( . 025)
5.46 ( . 215)
5.21 ( . 205) 1.27 (.05 0)
0.88 (.03 5)
2.38 ( . 094)
2.19 ( . 086) 1. 14 (.04 5)
0. 89 (.03 5)
0.58 (.023)
0.46 (.018)
6. 45 (.245)
5. 68 (.224)
0.51 ( . 020)
MIN.
0.58 (.023)
0.46 (.018)
LEAD ASSIGNMENTS
1 - GATE
2 - DRAI N
3 - SOURCE
4 - DRAI N
10.42 ( . 410)
9.40 ( . 370)
NOTES:
1 DIM ENSI ONI N G & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSIO N : INCH.
3 CONFORMS TO JEDEC OUTLINE TO-2 52AA.
4 DIM ENSI ONS SHOWN ARE BEFORE SOLDER DI P,
SOLDER DIP MAX . + 0.16 (. 006).
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE
EXAMPLE : THIS IS AN IRFR120
WITH ASSEMBLY
L OT CODE 9U1P FIRST PORTION
OF PART NUMBER
SECOND PORTION
OF PART NUMBER
120
IRFR
9U 1P
A
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Package Outline
TO-251AA Outline
Dimensions are shown in millimeters (inches)
TO-251AA (I-PARK)
Part Marking Information
6.73 (.265)
6.35 (.250)
- A -
6.22 (.245)
5.97 (.235)
- B -
3X 0.89 (.035)
0.64 (.025)
0.25 (. 010) M A M B
2.28 (.090)
1.14 ( . 04 5 )
0.76 ( . 03 0 )
5.46 (.215)
5.21 (.205) 1.27 (.050)
0.88 (.035)
2.38 (.094)
2.19 (.086)
1.14 (.045)
0.89 (.035)
0.58 (.023)
0.46 (.018) LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
NOTES:
1 DI M E N SIONI N G & TO LERANCING PER ANS I Y14 .5M, 1982.
2 CONTROLLI NG DIMENSION : INCH.
3 CONFORMS TO JEDEC OUTLINE TO-252AA.
4 DI M E N SIONS SHOWN ARE BEFORE SO L DER DIP,
SOLDER DIP MAX. +0.16 (.006).
9.65 (.38 0)
8.89 (.35 0)
2X
3X
2.28 (.090)
1.91 (.075)
1.52 (.060)
1.15 (.045)
4
1 2 3
6.45 (.245)
5.68 (.224)
0.58 (.023)
0.46 (.018)
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
L OT CODE
FIRST PORTION
OF PART NUMBE
R
SECOND PORTIO
N
OF PART NUMBER
120
9U 1P
EXAMPLE : THIS IS AN IRFU120
WITH ASSEMBLY
LOT CODE 9U1P
IRFU
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WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/ Data and specifications subject to change without notice. 4/03
Tape & Reel Information
TO-252AA
Dimensions are shown in millimeters (inches)
TR
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
12.1 ( .476 )
11.9 ( .469 ) FEED DIRECTION FEED DIRECT ION
16.3 ( .641 )
15.7 ( .619 )
TRR TRL
NOTES :
1. CONTROLLING DIMENSION : MIL L IMETER.
2. ALL DIME NSI ONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
16 mm
13 INCH
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Note: For the most current drawings please refer to the IR website at:
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