CY74FCT163501CPVCT - Texas Instruments

18-Bit Registered Transceivers

CY74FCT163501

CY74FCT163H501

SCCS047 - January 1998 - Revised March 2000

Data sheet acquired from Cypress Semiconductor Corporation.

Data sheet modiﬁed to remove devices not offered.

Features

• Low power, pin-compatible replacement for LCX and

LPT families

• 5V tolerant inputs and outputs

• 24 mA balanced drive outputs

• Power-off disable outputs permits live insertion

• Edge-rate control circuitry for reduced noise

• FCT-C speed at 4.6 ns

• Latch-up performance exceeds JEDEC standard no. 17

• ESD > 2000V per MIL-STD-883D, Method 3015

• Typical output skew < 250ps

• Industrial temperature range of –40˚C to +85˚C

• TSSOP (19.6-mil pitch) or SSOP (25-mil pitch)

• Typical Volp (ground bounce) performance exceeds Mil

Std 883D

•V

CC = 2.7V to 3.6V

CY74FCT163501 Features:

• Balanced output drivers: 24 mA

• Reduced system switching noise

• Typical VOLP (ground bounce) <0.6V at VCC = 3.3V,

TA= 25˚C

CY74FCT163H501 Features:

• Bus hold retains the last active state

• Devices with bus hold are not recommended for trans-

lating rail-to-rail CMOS signals to 3.3V logic levels

• Eliminates the need for external pull-up or pull-down

resistors

Functional Description

These 18-bit universal bus transceivers can be operated in

transparent, latched or clock modes by combining D-type

latches and D-type ﬂip-ﬂops. Data ﬂow in each direction is

controlled by output enable (OEAB and OEBA), latch enable

(LEAB and LEBA), and clock inputs (CLKAB and CLKBA). For

A-to-B data ﬂow, the device operates in transparent mode

when LEAB is HIGH. When LEAB is LOW, the A data is

latched if CLKAB is held at a HIGH or LOW logic level. If LEAB

is LOW, the A bus data is stored in the latch/ﬂip-ﬂop on the

LOW-to-HIGH transition of CLKAB. OEAB performs the output

enable function on the B port. Data ﬂow from B-to-A is similar

to that of A-to-B and is controlled by OEBA, LEBA, and

CLKBA. The output buffers are designed with a power-off

disable feature to allow live insertion of boards.

THE CY74FCT163501 has 24-mA balanced output drivers

with current limiting resistors in the outputs. This reduces the

need for external terminating resistors, as well as provides for

minimal undershoot and reduced ground bounce. The

CY74FCT163501 is ideal for driving transmission lines.

The CY74FCT163H501 is a 24-mA balanced output part, that

has “bus hold” on the data inputs. The device retains the

input’s last state whenever the input goes to high impedance.

This eliminates the need for pull-up/down resistors and

prevents ﬂoating inputs.

GND

Functional Block Diagram; CY74FCT163501, CY74FCT163H501 Pin Configuration

OEAB

SSOP/TSSOP

Top View

LEAB

GND

VCC

GND

FCT163501-1

GND

A10

A11

A12

VCC

A13

A14

A15

A16

A17

A18

OEBA

LEBA

GND

CLKAB

GND

VCC

GND

B10

B11

B12

B13

B14

B15

VCC

B16

B17

B18

CLKBA

OEAB

CLKBA

LEBA

OEBA

CLKAB

LEAB

A1B1

TO 17 OTHER CHANNELS

FCT163501-2

CY74FCT163501

CY74FCT163H501

Maximum Ratings[6, 7]

(Above which the useful life may be impaired. For user

guidelines, not tested.)

Storage Temperature .....................................−55°C to +125°C

Ambient Temperature with

Power Applied..................................................−55°C to +125°C

DC Input Voltage .................................................−0.5V to +7.0V

DC Output Voltage ..............................................−0.5V to +7.0V

DC Output Current

(Maximum Sink Current/Pin)...........................−60 to +120 mA

Power Dissipation..........................................................1.0W

Static Discharge Voltage............................................>2001V

(per MIL-STD-883, Method 3015)

1. On the 74FCT163H501 these pins have bus hold.

2. A-to-B data ﬂow is shown. B-to-A data ﬂow is similar but uses OEBA, LEBA, and CLKBA.

3. H = HIGH Voltage Level

L = LOW Voltage Level

X = Don’t Care

Z = High-impedance

= LOW-to-HIGH Transition

4. Output level before the indicated steady-state input conditions were established.

5. Output level before the indicated steady-state input conditions were established, provided that CLKAB was HIGH before LEAB went LOW.

6. Operationbeyondthelimitssetforthmayimpairtheusefullifeofthedevice.Unlessotherwisenoted,theselimitsareoverthe operatingfree-air temperaturerange.

7. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.

Pin Description

Name Description

OEAB A-to-B Output Enable Input

OEBA B-to-A Output Enable Input (Active LOW)

LEAB A-to-B Latch Enable Input

LEBA B-to-A Latch Enable Input

CLKAB A-to-B Clock Input

CLKBA B-to-A Clock Input

A A-to-B Data Inputs or B-to-A Three-State

Outputs[1]

B B-to-A Data Inputs or A-to-B Three-State

Outputs[1]

Function Table[2, 3]

Inputs Outputs

OEAB LEAB CLKAB A B

L X X X Z

H H X L L

H H X H H

H L L L

H L H H

H L L X B[4]

H L H X B[5]

Operating Range

Range Ambient

Temperature VCC

Industrial −40°C to +85°C 2.7V to 3.6V

CY74FCT163501

CY74FCT163H501

Electrical Characteristics for Non Bus Hold Devices Over the Operating Range VCC = 2.7V to 3.6V

Parameter Description Test Conditions Min. Typ.[8] Max. Unit

VIH Input HIGH Voltage All Inputs 2.0 5.5 V

VIL Input LOW Voltage 0.8 V

VHInput Hysteresis[9] 100 mV

VIK Input Clamp Diode Voltage VCC=Min., IIN=–18 mA –0.7 –1.2 V

IIH Input HIGH Current VCC=Max., VI=5.5 ±1µA

IIL Input LOW Current VCC=Max., VI=GND ±1µA

IOZH High Impedance Output Current

(Three-State Output pins) VCC=Max., VOUT=5.5V ±1µA

IOZL High Impedance Output Current

(Three-State Output pins) VCC=Max., VOUT=GND ±1µA

IOS Short Circuit Current[10] VCC=Max., VOUT=GND –60 –135 –240 mA

IOFF Power-Off Disable VCC=0V, VOUT≤4.5V ±100 µA

ICC Quiescent Power Supply Current VIN≤0.2V,

VIN>VCC–0.2V VCC=Max. 0.1 10 µA

∆ICC Quiescent Power Supply Current

(TTL inputs HIGH) VIN=VCC–0.6V[11] VCC=Max. 2.0 30 µA

Notes:

8. Typical values are at VCC=3.3V, TA = +25˚C ambient.

9. This parameter is speciﬁed but not tested.

10. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample

and hold techniques are preferable in order to minimize internal chip heating and more accurately reﬂect operational values. Otherwise prolonged shorting of

a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter

tests, IOS tests should be performed last.

11. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.

CY74FCT163501

CY74FCT163H501

Electrical Characteristics For Bus Hold Devices Over the Operating Range VCC=2.7V to 3.6V

Parameter Description Test Conditions Min. Typ.[8] Max. Unit

VIH Input HIGH Voltage All Inputs 2.0 VCC V

VIL Input LOW Voltage 0.8 V

VHInput Hysteresis[9] 100 mV

VIK Input Clamp Diode Voltage VCC=Min., IIN=–18 mA –0.7 –1.2 V

IIH Input HIGH Current VCC=Max., VI=VCC ±100 µA

IIL Input LOW Current VCC=Max., VI=GND ±100 µA

IBBH

IBBL Bus Hold Sustain Current on Bus Hold Input[12] VCC=Min. VI=2.0V –50 µA

VI=0.8V +50 µA

IBHHO

IBHLO BusHoldOverdriveCurrentonBusHoldInput[12] VCC=Max., VI=1.5V ±500 µA

IOZH High Impedance Output Current

(Three-State Output pins) VCC=Max., VOUT=VCC ±1µA

IOZL High Impedance Output Current

(Three-State Output pins) VCC=Max., VOUT=GND ±1µA

IOS Short Circuit Current[10] VCC=Max., VOUT=GND –60 –135 –240 mA

IOFF Power-Off Disable VCC=0V, VOUT≤4.5V ±100 µA

ICC Quiescent Power Supply Current VIN≤0.2V,

VIN>VCC–0.2V VCC=Max. +40 µA

∆ICC Quiescent Power supply Current

(TTL inputs HIGH) VIN=VCC–0.6V[11] VCC=Max. +350 µA

Electrical Characteristics For Balanced Drive Devices Over the Operating Range VCC=2.7V to 3.6V

Parameter Description Test Conditions Min. Typ.[8] Max. Unit

IODL Output LOW Dynamic Current[10] VCC=3.3V, VIN=VIH

or VIL, VOUT=1.5V 45 180 mA

IODH Output HIGH Dynamic Current[10] VCC=3.3V, VIN=VIH

or VIL, VOUT=1.5V –45 –180 mA

VOH Output HIGH Voltage VCC=Min., IOH= –0.1 mA VCC–0.2 V

VCC=3.0V, IOH= –8 mA 2.4[13] 3.0 V

VCC=3.0V, IOH= –24 mA 2.0 3.0 V

VOL Output LOW Voltage VCC=Min., IOL= 0.1mA 0.2 V

VCC=Min., IOL= 24 mA 0.3 0.55

Capacitance[9](TA = +25˚C, f = 1.0 MHz)

Parameter Description Test Conditions Typ.[8] Max. Unit

CIN Input Capacitance VIN = 0V 4.5 6.0 pF

COUT Output Capacitance VOUT = 0V 5.5 8.0 pF

Notes:

12. Pins with bus hold are described in Pin Description.

13. VOH=VCC – 0.6V at rated current.

CY74FCT163501

CY74FCT163H501

Power Supply Characteristics

Sym. Parameter Test Conditions[14] Min. Typ.[8] Max. Unit

ICCD Dynamic Power Supply

Current[15] VCC=Max., Outputs Open

OEAB=OEBA=VCC or GND

One Input Toggling,

50% Duty Cycle

VIN=VCC or

VIN=GND — 75 120 µA/

MHz

ICTotal Power Supply

Current[16] VCC=Max., Outputs Open

f0 =10MHz (CLKAB)

50% Duty Cycle

OEAB=OEBA=VCC

LEAB = GND, One Bit Toggling

f1 = 5MHz, 50% Duty Cycle

VIN=VCC or

VIN=GND — 0.8 1.7 mA

VIN=3.4V or

VIN=GND — 1.3 3.2

VCC=Max., Outputs Open

f0 = 10MHz (CLKAB)

50% Duty Cycle

OEAB=OEBA=VCC

LEAB=GND

Eighteen Bits Toggling

f1=2.5MHz, 50% Duty Cycle

VIN=VCC or

VIN=GND — 3.8 6.5[17]

VIN=3.4V or

VIN=GND — 8.5 20.8[17]

Notes:

14. For conditions shown as Max. or Min., use appropriate value speciﬁed under Electrical Characteristics for the applicable device type.

15. This parameter is not directly testable, but is derived for use in Total Power Supply Current.

16. IC=I

QUIESCENT + IINPUTS + IDYNAMIC

IC=I

CC+∆ICCDHNT+ICCD(f0/2 + f1N1)

ICC = Quiescent Current with CMOS input levels

∆ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V)

DH= Duty Cycle for TTL inputs HIGH

NT= Number of TTL inputs at DH

ICCD = Dynamic Current caused by an input transition pair (HLH or LHL)

f0= Clock frequency for registered devices, otherwise zero

f1= Input signal frequency

N1= Number of inputs changing at f1

All currents are in milliamps and all frequencies are in megahertz.

17. Values for these conditions are examples of the ICC formula. These limits are speciﬁed but not tested.

CY74FCT163501

CY74FCT163H501

Switching Characteristics Over the Operating Range VCC=3.0V to 3.6V[18]

CY74FCT163501C

CY74FCT163H501C

Fig.No.[19]

Parameter Description Min. Max. Unit

fMAX CLKAB or CLKBA frequency[9] — 150 MHz —

tPLH

tPHL Propagation Delay

A to B or B to A 1.5 4.6 ns 1,3

tPLH

tPHL Propagation Delay

LEBA to A, LEAB to B 1.5 5.3 ns 1,5

tPLH

tPHL Propagation Delay

CLKBA to A,

CLKAB to B

1.5 5.3 ns 1,5

tPZH

tPZL Output Enable Time

OEBA to A, OEAB to B 1.5 5.6 ns 1,7,8

tPHZ

tPLZ Output Disable Time

OEBA to A, OEAB to B 1.5 5.2 ns 1,7,8

tSU Set-Up Time,

HIGH or LOW

A to CLKAB,

B to CLKBA

3.0 — ns 4

tHHold Time

HIGH or LOW

A to CLKAB,

B to CLKBA

0 — ns 4

tSU Set-Up Time, HIGH or LOW

A to LEAB,

B to LEBA

Clock LOW 3.0 — ns 4

Clock HIGH 1.5 — ns 4

tHHold Time, HIGH or LOW, A to LEAB,

B to LEBA 1.5 — ns 4

tWLEAB or LEBA Pulse Width HIGH[9] 3.0 — ns 5

tWCLKAB or CLKBA Pulse Width HIGH or LOW[9] 3.0 — ns 5

tSK(O) Output Skew[20] — 0.5 ns —

Notes:

18. Minimum limits are speciﬁed, but not tested, on propagation delays.

19. See “Parameter Measurement Information” in the General Information section.

20. Skew between any two outputs of the same package switching in the same direction. This parameter ensured by design.

CY74FCT163501

CY74FCT163H501

Ordering Information CY74FCT163501T

Speed

(ns) Ordering Code Package

Name Package Type Operating

Range

4.6 CY74FCT163501CPACT Z56 56-Lead (240-Mil) TSSOP Industrial

CY74FCT163501CPVC/PVCT O56 56-Lead (300-Mil) SSOP

Ordering Information CY74FCT163H501T

Speed

(ns) Ordering Code Package

Name Package Type Operating

Range

4.6 74FCT163H501CPACT Z56 56-Lead (240-Mil) TSSOP Industrial

CY74FCT163H501CPVC O56 56-Lead (300-Mil) SSOP

74FCT163H501CPVCT O56 56-Lead (300-Mil) SSOP

Package Diagrams

56-Lead Shrunk Small Outline Package O56

CY74FCT163501

CY74FCT163H501

Package Diagrams (continued)

56-Lead Thin Shrunk Small Outline Package Z56

IMPORTANT NOTICE

Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue

any product or service without notice, and advise customers to obtain the latest version of relevant information

to verify, before placing orders, that information being relied on is current and complete. All products are sold

subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those

pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent

TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily

performed, except those mandated by government requirements.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF

DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL

APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR

WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER

CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO

BE FULLY AT THE CUSTOMER’S RISK.

In order to minimize risks associated with the customer’s applications, adequate design and operating

safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent

that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other

intellectual property right of TI covering or relating to any combination, machine, or process in which such

semiconductor products or services might be or are used. TI’s publication of information regarding any third

party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.